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Add a missing bit field definitions that was lost when stm32_otgfs.h was deleted.

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This commit is contained in:
Gregory Nutt 2016-12-06 09:22:03 -06:00
parent d6437407b1
commit 8e447453e1
1 changed files with 14 additions and 13 deletions
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27
arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h
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@ -475,34 +475,35 @@
# define OTGFS_GINTSTS_DEVMODE (0)
# define OTGFS_GINTSTS_HOSTMODE (OTGFS_GINTSTS_CMOD)
#define OTGFS_GINT_MMIS (1 << 1) /* Bit 1: rc_w1 Mode mismatch interrupt */
#define OTGFS_GINT_OTG (1 << 2) /* Bit 2: ro OTG interrupt */
#define OTGFS_GINT_OTG (1 << 2) /* Bit 2: ro OTG interrupt */
#define OTGFS_GINT_SOF (1 << 3) /* Bit 3: rc_w1 Start of frame */
#define OTGFS_GINT_RXFLVL (1 << 4) /* Bit 4: ro RxFIFO non-empty */
#define OTGFS_GINT_NPTXFE (1 << 5) /* Bit 5: ro Non-periodic TxFIFO empty */
#define OTGFS_GINT_GINAKEFF (1 << 6) /* Bit 6: ro Global IN non-periodic NAK effective */
#define OTGFS_GINT_RXFLVL (1 << 4) /* Bit 4: ro RxFIFO non-empty */
#define OTGFS_GINT_NPTXFE (1 << 5) /* Bit 5: ro Non-periodic TxFIFO empty */
#define OTGFS_GINT_GINAKEFF (1 << 6) /* Bit 6: ro Global IN non-periodic NAK effective */
#define OTGFS_GINT_GONAKEFF (1 << 7) /* Bit 7: Global OUT NAK effective */
#define OTGFS_GINT_RES89 (3 << 8) /* Bits 8-9: Reserved, must be kept at reset value */
#define OTGFS_GINT_RES89 (3 << 8) /* Bits 8-9: Reserved, must be kept at reset value */
#define OTGFS_GINT_ESUSP (1 << 10) /* Bit 10: rc_w1 Early suspend */
#define OTGFS_GINT_USBSUSP (1 << 11) /* Bit 11: rc_w1 USB suspend */
#define OTGFS_GINT_USBRST (1 << 12) /* Bit 12: rc_w1 USB reset */
#define OTGFS_GINT_ENUMDNE (1 << 13) /* Bit 13: rc_w1 Enumeration done */
#define OTGFS_GINT_ISOODRP (1 << 14) /* Bit 14: rc_w1 Isochronous OUT packet dropped interrupt */
#define OTGFS_GINT_EOPF (1 << 15) /* Bit 15: rc_w1 End of periodic frame interrupt */
#define OTGFS_GINT_RES16 (1 << 16) /* Bits 16 Reserved, must be kept at reset value */
#define OTGFS_GINTMSK_EPMISM (1 << 17) /* Bit 17: Reserved in GINT rw Endpoint mismatch interrupt mask */
#define OTGFS_GINT_IEP (1 << 18) /* Bit 18: ro IN endpoint interrupt */
#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: ro OUT endpoint interrupt */
#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: rc_w1Incomplete isochronous IN transfer */
#define OTGFS_GINT_RES16 (1 << 16) /* Bit 16 Reserved, must be kept at reset value */
#define OTGFS_GINTMSK_EPMISM (1 << 17) /* Bit 17: Reserved in GINT rw Endpoint mismatch interrupt mask */
#define OTGFS_GINT_IEP (1 << 18) /* Bit 18: ro IN endpoint interrupt */
#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: ro OUT endpoint interrupt */
#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: rc_w1 Incomplete isochronous IN transfer */
#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: rc_w1 Incomplete isochronous OUT transfer */
#define OTGFS_GINT_IPXFR (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */
#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
# define OTGFS_GINT_RES22 (1 << 22) /* Bits 22: Reserved, must be kept at reset value */
# define OTGFS_GINT_RSTDET (1 << 23) /* Bits 23: asserted when a reset is detected on the USB in partial */
#else
# define OTGFS_GINT_RES2223 (3 << 22) /* Bits 22-23: Reserved, must be kept at reset value */
#endif
#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: ro Host port interrupt */
#define OTGFS_GINT_HC (1 << 25) /* Bit 25: ro Host channels interrupt */
#define OTGFS_GINT_PTXFE (1 << 26) /* Bit 26: ro Periodic TxFIFO empty */
#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: ro Host port interrupt */
#define OTGFS_GINT_HC (1 << 25) /* Bit 25: ro Host channels interrupt */
#define OTGFS_GINT_PTXFE (1 << 26) /* Bit 26: ro Periodic TxFIFO empty */
#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
#define OTGFS_GINT_LPMINT (1 << 27) /* Bit 27 LPM interrupt */
#else