arch/risc-v: Remove unnecessary PMP kconfig options

These options are just wrong and a result of misunderstanding of the
Polarfire SoC spec. There are no feature limitations in the CPU PMP
implementation -> remove any configuration options added.

arch/risc-v/Kconfig

@@ -149,7 +149,6 @@ config ARCH_CHIP_MPFS
 	select ARCH_HAVE_SPI_CS_CONTROL
 	select ARCH_HAVE_PWM_MULTICHAN
 	select ARCH_HAVE_S_MODE
-	select PMP_HAS_LIMITED_FEATURES
 	select ONESHOT
 	select ALARM_ARCH
 	---help---
@@ -321,29 +320,6 @@ config ARCH_USE_S_MODE
 		and/or U-mode (in case of separate kernel-/userspaces). This provides
 		an option to run the kernel in S-mode, if the target supports it.
 
-# MPU has certain architecture dependent configurations, which are presented
-# here. Default is that the full RISC-V PMP specification is supported.
-
-config PMP_HAS_LIMITED_FEATURES
-	bool
-	default n
-
-config ARCH_MPU_MIN_BLOCK_SIZE
-	int "Minimum MPU (PMP) block size"
-	default 4	if !PMP_HAS_LIMITED_FEATURES
-
-config ARCH_MPU_HAS_TOR
-	bool "PMP supports TOR"
-	default y	if !PMP_HAS_LIMITED_FEATURES
-
-config ARCH_MPU_HAS_NO4
-	bool "PMP supports NO4"
-	default y	if !PMP_HAS_LIMITED_FEATURES
-
-config ARCH_MPU_HAS_NAPOT
-	bool "PMP supports NAPOT"
-	default y	if !PMP_HAS_LIMITED_FEATURES
-
 choice
 	prompt "Toolchain Selection"
 	default RISCV_TOOLCHAIN_GNU_RV64

arch/risc-v/src/common/riscv_pmp.c

@@ -50,11 +50,7 @@
 
 /* Minimum supported block size */
 
-#if !defined CONFIG_ARCH_MPU_MIN_BLOCK_SIZE
 #define MIN_BLOCK_SIZE          (PMP_XLEN / 8)
-#else
-#define MIN_BLOCK_SIZE          CONFIG_ARCH_MPU_MIN_BLOCK_SIZE
-#endif
 
 /* Address and block size alignment mask */
 
@@ -101,51 +97,6 @@ typedef struct pmp_entry_s pmp_entry_t;
  * Private Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: pmp_check_addrmatch_type
- *
- * Description:
- *   Test if an address matching type is supported by the architecture.
- *
- * Input Parameters:
- *   type - The type to test.
- *
- * Returned Value:
- *   true if it is, false otherwise.
- *
- ****************************************************************************/
-
-static bool pmp_check_addrmatch_type(uintptr_t type)
-{
-  /* Parameter is potentially unused */
-
-  UNUSED(type);
-#ifdef CONFIG_ARCH_MPU_HAS_TOR
-  if (type == PMPCFG_A_TOR)
-    {
-      return true;
-    }
-
-#endif
-#ifdef CONFIG_ARCH_MPU_HAS_NO4
-  if (type == PMPCFG_A_NA4)
-    {
-      return true;
-    }
-
-#endif
-#ifdef CONFIG_ARCH_MPU_HAS_NAPOT
-  if (type == PMPCFG_A_NAPOT)
-    {
-      return true;
-    }
-#endif
-
-  /* None of the supported types match */
-
-  return false;
-}
-
 /****************************************************************************
  * Name: pmp_check_region_attrs
  *
@@ -464,13 +415,6 @@ int riscv_config_pmp_region(uintptr_t region, uintptr_t attr,
   uintptr_t cfg     = 0;
   uintptr_t type    = (attr & PMPCFG_A_MASK);
 
-  /* Check that the architecture supports address matching type */
-
-  if (pmp_check_addrmatch_type(type) == false)
-    {
-      return -EINVAL;
-    }
-
   /* Check the region attributes */
 
   if (pmp_check_region_attrs(base, size, type) == false)

arch/risc-v/src/mpfs/Kconfig

@@ -797,17 +797,3 @@ config MPFS_CORERMII_ADDRESS
 	int "CoreRMII Phy address"
 	default 1
 	depends on MPFS_HAVE_CORERMII
-
-# Override the default values for MPU / PMP parameters here
-
-config ARCH_MPU_MIN_BLOCK_SIZE
-	default 4096
-
-config ARCH_MPU_HAS_TOR
-	default n
-
-config ARCH_MPU_HAS_NO4
-	default n
-
-config ARCH_MPU_HAS_NAPOT
-	default y