Add support for lo- and hi-res RTC hardware
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4005 42af7a65-404d-4744-a932-0658087f49c3
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@ -6,6 +6,7 @@
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*
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* With extensions, modifications by:
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregroy Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -932,7 +933,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
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}
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}
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#else
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# define stm32_i2c_disablefsmc() (0)
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# define stm32_i2c_disablefsmc(priv) (0)
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# define stm32_i2c_enablefsmc(ahbenr)
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#endif
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@ -33,14 +33,7 @@
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*
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************************************************************************************/
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/** \file
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* \author Uros Platise
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* \brief STM32 Real-Time Clock
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*
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* \addtogroup STM32_RTC
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* \{
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*
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* The STM32 RTC Driver offers standard precision of 1 Hz or High Resolution
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/* The STM32 RTC Driver offers standard precision of 1 Hz or High Resolution
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* operating at rate up to 16384 Hz. It provides UTC time and alarm interface
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* with external output pin (for wake-up).
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*
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@ -53,9 +46,13 @@
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* - time is a combination of clock and upper bits stored in backuped domain
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* with unit of 1 [s]
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*
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* \todo Error Handling in case LSE fails during start-up or during operation.
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* TODO: Error Handling in case LSE fails during start-up or during operation.
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*/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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@ -74,21 +71,78 @@
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#include "stm32_rtc.h"
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#include "stm32_waste.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#if defined(CONFIG_STM32_BKP)
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#ifdef CONFIG_RTC_HIRES
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# ifndef CONFIG_RTC_FREQUENCY
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# error "CONFIG_RTC_FREQUENCY is required for CONFIG_RTC_HIRES"
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# elif CONFIG_RTC_FREQUENCY != 16384
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# error "Only hi-res CONFIG_RTC_FREQUENCY of 16384Hz is supported"
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# endif
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# ifndef CONFIG_STM32_BKP
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# error "CONFIG_STM32_BKP is required for CONFIG_RTC_HIRES"
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# endif
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#else
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# ifndef CONFIG_RTC_FREQUENCY
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# define CONFIG_RTC_FREQUENCY 1
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# endif
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# if CONFIG_RTC_FREQUENCY != 1
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# error "Only lo-res CONFIG_RTC_FREQUENCY of 1Hz is supported"
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# endif
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#endif
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/* RTC/BKP Definitions *************************************************************/
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/* STM32_RTC_PRESCALAR_VALUE
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* RTC pre-scalar value. The RTC is driven by a 32,768Hz input clock. This input
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* value is divided by this value (plus one) to generate the RTC frequency.
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* RTC_TIMEMSB_REG
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* The BKP module register used to hold the RTC overflow value. Overflows are
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* only handled in hi-res mode.
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* RTC_CLOCKS_SHIFT
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* The shift used to convert the hi-res timer LSB to one second. Not used with
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* the lo-res timer.
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*/
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#ifdef CONFIG_RTC_HIRES
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# define STM32_RTC_PRESCALAR_VALUE STM32_RTC_PRESCALER_MIN
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# define RTC_TIMEMSB_REG STM32_BKP_DR1
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# define RTC_CLOCKS_SHIFT 14
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#else
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# define STM32_RTC_PRESCALAR_VALUE STM32_RTC_PRESCALER_SECOND
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#endif
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/************************************************************************************
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* Configuration of the RTC Backup Register (16-bit)
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* Private Types
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************************************************************************************/
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#define RTC_TIMEMSB_REG STM32_BKP_DR1
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struct rtc_regvals_s
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{
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uint16_t cntl;
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uint16_t cnth;
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#ifdef CONFIG_RTC_HIRES
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uint16_t ovf;
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#endif
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};
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/************************************************************************************
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* Private Data
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************************************************************************************/
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/** Variable determines the state of the LSE oscilator.
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* Possible errors:
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/* Callback to use when the alarm expires */
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#ifdef CONFIG_RTC_ALARM
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static alarmcb_t g_alarmcb;
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/* Variable determines the state of the LSE oscilator.
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* Possible errors:
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* - on start-up
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* - during operation, reported by LSE interrupt
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*/
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@ -99,113 +153,265 @@ volatile bool g_rtc_enabled = false;
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_rtc_beginwr
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*
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* Description:
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* Enter configuration mode
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_rtc_beginwr(void)
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{
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/* Previous write is done? */
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while( (getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF)==0 ) up_waste();
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/* Previous write is done? */
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/* Enter Config mode, Set Value and Exit */
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modifyreg16(STM32_RTC_CRL, 0, RTC_CRL_CNF);
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while ((getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF) == 0)
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{
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up_waste();
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}
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/* Enter Config mode, Set Value and Exit */
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modifyreg16(STM32_RTC_CRL, 0, RTC_CRL_CNF);
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}
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/************************************************************************************
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* Name: stm32_rtc_endwr
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*
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* Description:
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* Exit configuration mode
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_rtc_endwr(void)
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{
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modifyreg16(STM32_RTC_CRL, RTC_CRL_CNF, 0);
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modifyreg16(STM32_RTC_CRL, RTC_CRL_CNF, 0);
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}
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/** Wait for registerred to synchronise with RTC module, call after power-up only */
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/************************************************************************************
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* Name: stm32_rtc_wait4rsf
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*
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* Description:
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* Wait for registers to synchronise with RTC module, call after power-up only
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_rtc_wait4rsf(void)
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{
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modifyreg16(STM32_RTC_CRL, RTC_CRL_RSF, 0);
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while( !(getreg16(STM32_RTC_CRL) & RTC_CRL_RSF) ) up_waste();
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modifyreg16(STM32_RTC_CRL, RTC_CRL_RSF, 0);
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while (!(getreg16(STM32_RTC_CRL) & RTC_CRL_RSF))
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{
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up_waste();
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}
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}
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/************************************************************************************
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* Interrupt Service Routines
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* Name: up_rtc_breakout
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*
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* Description:
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* Set the RTC to the provided time.
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*
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* Input Parameters:
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* tp - the time to use
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static int stm32_rtc_overflow_isr(int irq, void *context)
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#ifdef CONFIG_RTC_HIRES
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static void up_rtc_breakout(FAR const struct timespec *tp,
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FAR struct rtc_regvals_s *regvals)
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{
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uint16_t source = getreg16( STM32_RTC_CRL );
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if (source & RTC_CRL_OWF) {
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putreg16( getreg16(RTC_TIMEMSB_REG) + 1, RTC_TIMEMSB_REG );
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}
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if (source & RTC_CRL_ALRF) {
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/* Alarm */
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}
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/* Clear pending flags, leave RSF high */
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putreg16( RTC_CRL_RSF, STM32_RTC_CRL );
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return 0;
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uint64_t frac;
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uint32_t cnt;
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uint16_t ovf;
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/* Break up the time in seconds + milleconds into the correct values for our use */
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frac = ((uint64_t)tp->tv_nsec * CONFIG_RTC_FREQUENCY) / 1000000000;
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cnt = (tp->tv_sec << RTC_CLOCKS_SHIFT) | ((uint32_t)frac & (CONFIG_RTC_FREQUENCY-1));
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ovf = (tp->tv_sec >> (32 - RTC_CLOCKS_SHIFT));
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/* Then return the broken out time */
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regvals->cnth = cnt >> 16;
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regvals->cntl = cnt & 0xffff;
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regvals->ovf = ovf;
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}
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#else
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static inline void up_rtc_breakout(FAR const struct timespec *tp,
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FAR struct rtc_regvals_s *regvals)
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{
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/* The low-res timer is easy... tv_sec holds exactly the value needed by the
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* CNTH/CNTL registers.
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*/
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regvals->cnth = (uint16_t)((uint32_t)tp->tv_sec >> 16);
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regvals->cntl = (uint16_t)((uint32_t)tp->tv_sec & 0xffff);
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}
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#endif
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/************************************************************************************
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* Public Function - Initialization
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* Name: stm32_rtc_interrupt
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*
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* Description:
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* RTC interrupt service routine
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*
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* Input Parameters:
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* irq - The IRQ number that generated the interrupt
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* context - Architecture specific register save information.
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*
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* Returned Value:
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* Zero (OK) on success; A negated errno value on failure.
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*
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************************************************************************************/
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#if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
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static int stm32_rtc_interrupt(int irq, void *context)
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{
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uint16_t source = getreg16(STM32_RTC_CRL);
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#ifdef CONFIG_RTC_HIRES
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if ((source & RTC_CRL_OWF) != 0)
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{
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putreg16(getreg16(RTC_TIMEMSB_REG) + 1, RTC_TIMEMSB_REG);
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}
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#endif
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#ifdef CONFIG_RTC_ALARM
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if ((source & RTC_CRL_ALRF) != 0 && g_alarmcb != NULL)
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{
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/* Alarm callback */
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g_alarmcb();
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g_alarmcb = NULL;
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}
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#endif
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/* Clear pending flags, leave RSF high */
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putreg16(RTC_CRL_RSF, STM32_RTC_CRL);
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return 0;
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}
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: up_rtcinitialize
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*
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* Description:
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* Initialize the hardware RTC per the select configuration. This function is
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* called once during the OS initialization sequence
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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/** Power-up RTC
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*
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* \param prescaler A 20-bit value determines the time base, and is defined as:
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* f = 32768 / (prescaler + 1)
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*
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* \return State of the RTC unit
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*
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* \retval OK If RTC has been successfully configured.
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* \retval ERROR On error, if LSE does not start.
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**/
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int up_rtcinitialize(void)
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{
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/* For this initial version we use predefined value */
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/* For this initial version we use predefined value */
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uint32_t prescaler = STM32_RTC_PRESCALER_MIN;
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uint32_t prescaler = STM32_RTC_PRESCALER_MIN;
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/* Set access to the peripheral, enable power and LSE */
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stm32_pwr_enablebkp();
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stm32_rcc_enablelse();
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// \todo Get state from this function, if everything is
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// okay and whether it is already enabled (if it was disabled
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// reset upper time register)
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g_rtc_enabled = true;
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/* Set access to the peripheral, enable power and LSE */
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// \todo Possible stall? should we set the timeout period? and return with -1
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stm32_rtc_wait4rsf();
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/* Configure prescaler, note that these are write-only registers */
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#ifdef CONFIG_RTC_HIRES
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stm32_pwr_enablebkp();
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#endif
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stm32_rcc_enablelse();
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stm32_rtc_beginwr();
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putreg16(prescaler >> 16, STM32_RTC_PRLH);
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putreg16(prescaler & 0xFFFF, STM32_RTC_PRLL);
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stm32_rtc_endwr();
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/* Configure Overflow Interrupt */
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irq_attach(STM32_IRQ_RTC, stm32_rtc_overflow_isr);
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up_enable_irq(STM32_IRQ_RTC);
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/* TODO: Get state from this function, if everything is
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* okay and whether it is already enabled (if it was disabled
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* reset upper time register)
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*/
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/* Previous write is done? This is required prior writing into CRH */
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while( (getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF)==0 ) up_waste();
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modifyreg16(STM32_RTC_CRH, 0, RTC_CRH_OWIE);
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/* Alarm Int via EXTI Line */
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// STM32_IRQ_RTCALR /* 41: RTC alarm through EXTI line interrupt */
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g_rtc_enabled = true;
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return OK;
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/* TODO: Possible stall? should we set the timeout period? and return with -1 */
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stm32_rtc_wait4rsf();
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/* Configure prescaler, note that these are write-only registers */
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stm32_rtc_beginwr();
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putreg16(prescaler >> 16, STM32_RTC_PRLH);
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putreg16(prescaler & 0xFFFF, STM32_RTC_PRLL);
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stm32_rtc_endwr();
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/* Configure RTC interrupt to catch overflow and alarm interrupts. */
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#if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
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irq_attach(STM32_IRQ_RTC, stm32_rtc_interrupt);
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up_enable_irq(STM32_IRQ_RTC);
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#endif
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/* Previous write is done? This is required prior writing into CRH */
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while ((getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF) == 0)
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{
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up_waste();
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}
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modifyreg16(STM32_RTC_CRH, 0, RTC_CRH_OWIE);
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/* Alarm Int via EXTI Line */
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/* STM32_IRQ_RTCALR 41: RTC alarm through EXTI line interrupt */
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return OK;
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}
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/** Get time (counter) value
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*
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* \return time, where the unit depends on the prescaler value
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**/
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clock_t up_rtc_getclock(void)
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/************************************************************************************
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* Name: up_rtc_time
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*
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* Description:
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* Get the current time in seconds.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* The current time in seconds
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*
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************************************************************************************/
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#ifdef CONFIG_RTC_HIRES
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time_t up_rtc_time(void)
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{
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struct timespec ts;
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/* In the hi-res case, this function is just a wrapper for up_rtc_gettime */
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(void)up_rtc_gettime(&ts);
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return ts.tv_sec;
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}
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#else
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time_t up_rtc_time(void)
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{
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irqstate_t flags;
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uint16_t cnth;
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@ -243,98 +449,176 @@ clock_t up_rtc_getclock(void)
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while (cntl < tmp);
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irqrestore(flags);
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/* Then return the full 32-bit counter value */
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/* Okay.. the samples should be as close together in time as possible and
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* we can be assured that no clock rollover occurred between the samples.
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*
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* Return the time in seconds.
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*/
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return ((uint32_t)cnth << 16) | (uint32_t)cntl;
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return (time_t)cnth << 16 | (time_t)cntl;
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}
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#endif
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/** Set time (counter) value
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*
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* \param time The unit depends on the prescaler value
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**/
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/************************************************************************************
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* Name: up_rtc_gettime
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*
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* Description:
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* Get the current time from the high resolution RTC clock.
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*
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* Input Parameters:
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* tp - The location to return the high resolution time value.
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
|
||||
************************************************************************************/
|
||||
|
||||
void up_rtc_setclock(clock_t newclock)
|
||||
#ifdef CONFIG_RTC_HIRES
|
||||
int up_rtc_gettime(FAR struct timespec *tp)
|
||||
{
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(newclock >> 16, STM32_RTC_CNTH);
|
||||
putreg16(newclock & 0xFFFF, STM32_RTC_CNTL);
|
||||
stm32_rtc_endwr();
|
||||
}
|
||||
irqstate_t flags;
|
||||
uint32_t ls;
|
||||
uint32_t ms;
|
||||
uint16_t ovf;
|
||||
uint16_t cnth;
|
||||
uint16_t cntl;
|
||||
uint16_t tmp;
|
||||
|
||||
time_t up_rtc_gettime(void)
|
||||
/* The RTC counter is read from two 16-bit registers to form one 32-bit
|
||||
* value. Because these are non-atomic operations, many things can happen
|
||||
* between the two reads: This thread could get suspended or interrrupted
|
||||
* or the lower 16-bit counter could rollover between reads. Disabling
|
||||
* interrupts will prevent suspensions and interruptions:
|
||||
*/
|
||||
|
||||
flags = irqsave();
|
||||
|
||||
/* And the following loop will handle any clock rollover events that may
|
||||
* happen between samples. Most of the time (like 99.9%), the following
|
||||
* loop will execute only once. In the rare rollover case, it should
|
||||
* execute no more than 2 times.
|
||||
*/
|
||||
|
||||
do
|
||||
{
|
||||
tmp = getreg16(STM32_RTC_CNTL);
|
||||
cnth = getreg16(STM32_RTC_CNTH);
|
||||
ovf = getreg16(RTC_TIMEMSB_REG);
|
||||
cntl = getreg16(STM32_RTC_CNTL);
|
||||
}
|
||||
|
||||
/* The second sample of CNTL could be less than the first sample of CNTL
|
||||
* only if rollover occurred. In that case, CNTH may or may not be out
|
||||
* of sync. The best thing to do is try again until we know that no
|
||||
* rollover occurred.
|
||||
*/
|
||||
|
||||
while (cntl < tmp);
|
||||
irqrestore(flags);
|
||||
|
||||
/* Okay.. the samples should be as close together in time as possible and
|
||||
* we can be assured that no clock rollover occurred between the samples.
|
||||
*
|
||||
* Create a 32-bit value from the LS and MS 16-bit RTC counter values and
|
||||
* from the MS and overflow 16-bit counter values.
|
||||
*/
|
||||
|
||||
ls = (uint32_t)cnth << 16 | (uint32_t)cntl;
|
||||
ms = (uint32_t)ovf << 16 | (uint32_t)cnth;
|
||||
|
||||
/* Then we can save the time in seconds and fractional seconds. */
|
||||
|
||||
tp->tv_sec = (ms << (32-RTC_CLOCKS_SHIFT-16)) | (ls >> (RTC_CLOCKS_SHIFT+16));
|
||||
tp->tv_nsec = (ls & (CONFIG_RTC_FREQUENCY-1)) * (1000000000/CONFIG_RTC_FREQUENCY);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_rtc_settime
|
||||
*
|
||||
* Description:
|
||||
* Set the RTC to the provided time.
|
||||
*
|
||||
* Input Parameters:
|
||||
* tp - the time to use
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int up_rtc_settime(FAR const struct timespec *tp)
|
||||
{
|
||||
/* Fetch time from LSB (hardware counter) and MSB (backup domain)
|
||||
* Take care on overflow of the LSB:
|
||||
* - it may overflow just after reading the up_rtc_getclock, transition
|
||||
* from 0xFF...FF -> 0x000000
|
||||
* - ISR would be generated to increment the RTC_TIMEMSB_REG
|
||||
* - Wrong result would when: DR+1 and LSB is old, resulting in ~DR+2
|
||||
* instead of just DR+1
|
||||
*/
|
||||
struct rtc_regvals_s regvals;
|
||||
irqstate_t flags;
|
||||
|
||||
irqstate_t irqs = irqsave();
|
||||
|
||||
uint32_t time_lsb = up_rtc_getclock();
|
||||
uint32_t time_msb = getreg16(RTC_TIMEMSB_REG);
|
||||
|
||||
irqrestore( irqs );
|
||||
|
||||
/* Use the upper bits of the LSB and lower bits of the MSB
|
||||
* structured as:
|
||||
* time = time[31:18] from MSB[13:0] | time[17:0] from time_lsb[31:14]
|
||||
*/
|
||||
|
||||
time_lsb >>= RTC_CLOCKS_SHIFT;
|
||||
|
||||
time_msb <<= (32-RTC_CLOCKS_SHIFT);
|
||||
time_msb &= ~((1<<(32-RTC_CLOCKS_SHIFT))-1);
|
||||
|
||||
return time_msb | time_lsb;
|
||||
/* Break out the time values */
|
||||
|
||||
up_rtc_breakout(tp, ®vals);
|
||||
|
||||
/* Then write the broken out values to the RTC counter and BKP overflow register
|
||||
* (hi-res mode only)
|
||||
*/
|
||||
|
||||
flags = irqsave();
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(regvals.cnth, STM32_RTC_CNTH);
|
||||
putreg16(regvals.cntl, STM32_RTC_CNTL);
|
||||
stm32_rtc_endwr();
|
||||
|
||||
#ifdef CONFIG_RTC_HIRES
|
||||
putreg16(regvals.ovf, RTC_TIMEMSB_REG);
|
||||
#endif
|
||||
irqrestore(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
void up_rtc_settime(time_t newtime)
|
||||
/************************************************************************************
|
||||
* Name: up_rtc_setalarm
|
||||
*
|
||||
* Description:
|
||||
* Set up a alarm.
|
||||
*
|
||||
* Input Parameters:
|
||||
* tp - the time to set the alarm
|
||||
* callback - the function to call when the alarm expires.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_RTC_ALARM
|
||||
int up_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback);
|
||||
{
|
||||
/* Do reverse compared to gettime above */
|
||||
|
||||
uint32_t time_lsb = newtime << RTC_CLOCKS_SHIFT |
|
||||
(up_rtc_getclock() & ((1<<RTC_CLOCKS_SHIFT)-1));
|
||||
|
||||
uint32_t time_msb = newtime >> (32-RTC_CLOCKS_SHIFT);
|
||||
|
||||
irqstate_t irqs = irqsave();
|
||||
|
||||
up_rtc_setclock(time_lsb);
|
||||
putreg16( time_msb, RTC_TIMEMSB_REG );
|
||||
|
||||
irqrestore( irqs );
|
||||
}
|
||||
struct rtc_regvals_s regvals;
|
||||
irqstate_t flags;
|
||||
int ret = -EBUSY;
|
||||
|
||||
/** Set ALARM at which time ALARM callback is going to be generated
|
||||
*
|
||||
* The function sets the alarm and return present time at the time
|
||||
* of setting the alarm.
|
||||
*
|
||||
* Note that If actual time has already passed callback will not be
|
||||
* generated and it is up to the higher level code to compare the
|
||||
* returned (actual) time and desired time of alarm.
|
||||
*
|
||||
* \param attime The unit depends on the prescaler value
|
||||
* \return presenttime, where the unit depends on the prescaler value
|
||||
**/
|
||||
clock_t up_rtc_setalarm(clock_t atclock)
|
||||
{
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(atclock >> 16, STM32_RTC_ALRH);
|
||||
putreg16(atclock & 0xFFFF, STM32_RTC_ALRL);
|
||||
stm32_rtc_endwr();
|
||||
|
||||
return up_rtc_getclock();
|
||||
}
|
||||
/* Is there already something waiting on the ALARM? */
|
||||
|
||||
/** Set alarm output pin */
|
||||
void stm32_rtc_settalarmpin(bool activate)
|
||||
{
|
||||
}
|
||||
if (g_alarmcb == NULL)
|
||||
{
|
||||
/* No.. Save the callback function pointer */
|
||||
|
||||
#endif // defined(CONFIG_STM32_BKP)
|
||||
/** \} */
|
||||
g_alarmcb = callback;
|
||||
|
||||
/* Break out the time values */
|
||||
|
||||
up_rtc_breakout(tp, ®vals);
|
||||
|
||||
/* The set the alarm */
|
||||
|
||||
flags = irqsave();
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(regvals.cnth, STM32_RTC_ALRH);
|
||||
putreg16(regvals.cntl, STM32_RTC_ALRL);
|
||||
stm32_rtc_endwr();
|
||||
irqrestore(flags);
|
||||
|
||||
ret = OK;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user