esp32s3/wifi: add support for Wi-Fi (Station mode)
1) Wi-Fi driver libs from Espressif ESP-IDF release/v5.0; 2) Station mode only; 3) WPA2-PSK and WPA3-SAE enabled; Not yet supported (WIP): - SoftAP mode; - 802.11k, 802.11v and 802.11R; - Power Save mode; - BLE Coexistance;
This commit is contained in:
Tiago Medicci Serrano
Petro Karashchenko
parent
1fc73087da
commit
8f2cdc4e60
@ -452,6 +452,7 @@
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#define ESP32S3_CPUINT_NMISET 0x00004000
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#define ESP32S3_CPUINT_MAC 0
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#define ESP32S3_CPUINT_MAC_NMI 1
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#define ESP32S3_CPUINT_TIMER0 6
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#define ESP32S3_CPUINT_SOFTWARE0 7
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#define ESP32S3_CPUINT_PROFILING 11
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1
arch/xtensa/src/esp32s3/.gitignore
vendored
1
arch/xtensa/src/esp32s3/.gitignore
vendored
@ -1 +1,2 @@
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/esp-nuttx-bootloader
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/esp-wireless-drivers-3rdparty
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@ -334,6 +334,24 @@ config ESP32S3_UART2
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select UART2_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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config ESP32S3_WIRELESS
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bool
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default n
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select NET
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select ARCH_PHY_INTERRUPT
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select ESP32S3_RNG
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select ESP32S3_RT_TIMER
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select ESP32S3_TIMER0
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---help---
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Enable Wireless support
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config ESP32S3_WIFI
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bool "Wi-Fi"
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default n
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select ESP32S3_WIRELESS
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---help---
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Enable Wi-Fi support
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config ESP32S3_I2C0
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bool "I2C 0"
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default n
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@ -770,6 +788,158 @@ config ESP32S3_I2CTIMEOMS
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endmenu # I2C Configuration
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menu "Wi-Fi Configuration"
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depends on ESP32S3_WIFI
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menu "ESP WPA-Supplicant"
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config WPA_WAPI_PSK
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bool "Enable WAPI PSK support"
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default n
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---help---
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Select this option to enable WAPI-PSK
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which is a Chinese National Standard Encryption for Wireless LANs (GB 15629.11-2003).
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config WPA_SUITE_B_192
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bool "Enable NSA suite B support with 192-bit key"
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default n
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select ESP_WIFI_GCMP_SUPPORT
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select ESP_WIFI_GMAC_SUPPORT
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---help---
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Select this option to enable 192-bit NSA suite-B.
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This is necessary to support WPA3 192-bit security.
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config ESP_WPA_DEBUG_PRINT
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bool "Print debug messages from Espressif's WPA Supplicant"
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default n
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---help---
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Select this option to print logging information from WPA supplicant,
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this includes handshake information and key hex dumps depending
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on the project logging level.
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Enabling this could increase the build size ~60kb
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depending on the project logging level.
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endmenu # ESP WPA-Supplicant
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choice
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prompt "ESP32S3 Wi-Fi mode"
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default ESP32S3_WIFI_STATION
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config ESP32S3_WIFI_STATION
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bool "Station mode"
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endchoice # ESP32S3 Wi-Fi mode
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config ESP32S3_WIFI_STATIC_RXBUF_NUM
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int "Wi-Fi static RX buffer number"
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default 10
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config ESP32S3_WIFI_DYNAMIC_RXBUF_NUM
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int "Wi-Fi dynamic RX buffer number"
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default 32
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config ESP32S3_WIFI_DYNAMIC_TXBUF_NUM
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int "Wi-Fi dynamic TX buffer number"
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default 32
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config ESP32S3_WIFI_TX_AMPDU
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bool "Wi-Fi TX AMPDU"
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default y
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config ESP32S3_WIFI_RX_AMPDU
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bool "Wi-Fi RX AMPDU"
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default y
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config ESP32S3_WIFI_RXBA_AMPDU_WZ
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int "Wi-Fi RX BA AMPDU windown size"
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default 6
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config ESP_WIFI_GCMP_SUPPORT
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bool "WiFi GCMP Support(GCMP128 and GCMP256)"
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default n
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---help---
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Select this option to enable GCMP support. GCMP support is compulsory for WiFi Suite-B support.
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config ESP_WIFI_GMAC_SUPPORT
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bool "WiFi GMAC Support(GMAC128 and GMAC256)"
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default n
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---help---
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Select this option to enable GMAC support. GMAC support is compulsory for WiFi 192-bit certification.
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config ESP32S3_WIFI_CONNECT_TIMEOUT
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int "Connect timeout in second"
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default 10
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---help---
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Max waiting time of connecting to AP.
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config ESP32S3_WIFI_SCAN_RESULT_SIZE
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int "Scan result buffer"
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default 4096
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---help---
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Maximum scan result buffer size.
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config ESP32S3_WIFI_SAVE_PARAM
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bool "Save Wi-Fi Parameters"
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default n
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depends on ESP32S3_SPIFLASH
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---help---
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If you enable this option, Wi-Fi adapter parameters will be saved
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into the file system instead of computing them each time.
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These parameters mainly contains:
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- SSID
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- Password
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- BSSID
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- PMK(compute when connecting)
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- Author mode
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- MAC address
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- Wi-Fi hardware configuration parameters
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config ESP32S3_WIFI_FS_MOUNTPT
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string "Wi-Fi parameters mount point"
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default "/mnt/esp/wifi"
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depends on ESP32S3_WIFI_SAVE_PARAM
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---help---
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Mount point of Wi-Fi storage file system.
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config ESP32S3_WIFI_MTD_ENCRYPT
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bool "Encrypt Wi-Fi MTD partition"
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default y
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depends on ESP32S3_SECURE_FLASH_ENC_ENABLED
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config ESP32S3_WIFI_MTD_OFFSET
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hex "Wi-Fi MTD partition offset"
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default 0x280000 if !ESP32S3_HAVE_OTA_PARTITION
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default 0x350000 if ESP32S3_HAVE_OTA_PARTITION
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depends on ESP32S3_WIFI_SAVE_PARAM
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---help---
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This is the base address of the Wi-Fi MTD partition.
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config ESP32S3_WIFI_MTD_SIZE
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hex "Wi-Fi MTD partition size"
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default 0xb0000
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depends on ESP32S3_WIFI_SAVE_PARAM
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---help---
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This is the size of the Wi-Fi MTD partition.
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config ESP32S3_WIFI_STA_DISCONNECT_PM
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bool "Power Management for station when disconnected"
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default n
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---help---
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Select this option to enable power management for station when disconnected.
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Chip will do modem-sleep when RF module is not in use anymore.
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config EXAMPLE_WIFI_LISTEN_INTERVAL
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int "Wi-Fi listen interval"
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default 3
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---help---
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Interval for station to listen to beacon from AP. The unit of listen interval is one beacon interval.
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For example, if beacon interval is 100 ms and listen interval is 3, the interval for station to listen
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to beacon is 300 ms.
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endmenu # ESP32S3_WIFI
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menu "Timer/Counter Configuration"
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depends on ESP32S3_TIMER
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@ -125,3 +125,222 @@ ifeq ($(CONFIG_ESP32S3_TOUCH),y)
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CHIP_CSRCS += esp32s3_touch.c
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endif
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ifeq ($(CONFIG_ESP32S3_WIRELESS),y)
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WIRELESS_DRV_REPO = esp-wireless-drivers-3rdparty
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WIRELESS_DRV_BRANCH = release/v2.0
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WIRELESS_DRV_URL = https://github.com/espressif/esp-wireless-drivers-3rdparty.git
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WIRELESS_DRV_PATH = $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(WIRELESS_DRV_REPO)
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chip/$(WIRELESS_DRV_REPO):
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$(Q) echo "Cloning: ESP Wireless Drivers"
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$(Q) git clone --depth=1 --branch $(WIRELESS_DRV_BRANCH) $(WIRELESS_DRV_URL) chip/$(WIRELESS_DRV_REPO)
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context:: chip/$(WIRELESS_DRV_REPO)
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$(Q) echo "ESP Wireless Drivers: ${WIRELESS_DRV_BRANCH}"
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$(Q) git -C chip/$(WIRELESS_DRV_REPO)/esp-idf reset --hard
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$(Q) echo "ESP Wireless Drivers: initialize submodule esp-idf"
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$(Q) git -C chip/$(WIRELESS_DRV_REPO) submodule update --init --depth=1 esp-idf
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$(Q) echo "ESP Wireless Drivers: initialize submodule mbedtls, esp_phy and esp_phy from esp-idf"
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$(Q) git -C chip/$(WIRELESS_DRV_REPO)/esp-idf submodule update --init --depth=1 components/mbedtls/mbedtls components/esp_phy/lib components/esp_wifi/lib
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$(Q) git -C chip/$(WIRELESS_DRV_REPO)/esp-idf/components/mbedtls/mbedtls reset --hard
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$(Q) echo "ESP Wireless Drivers: apply patches for NuttX"
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$(Q) cd chip/$(WIRELESS_DRV_REPO)/esp-idf && git apply ../nuttx/patches/esp-idf/*.patch
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$(Q) cd chip/$(WIRELESS_DRV_REPO)/esp-idf/components/mbedtls/mbedtls && git apply ../../../../nuttx/patches/esp-idf/submodules/mbedtls/*.patch
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distclean::
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$(call DELDIR, chip/$(WIRELESS_DRV_REPO))
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)nuttx$(DELIM)include$(DELIM)esp32s3)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_wifi$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_phy$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_phy$(DELIM)esp32s3$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_common$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_event$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)nvs_flash$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_system$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_timer$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_rom$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)esp32s3)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)soc$(DELIM)esp32s3$(DELIM)include)
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_phy$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)esp_wifi$(DELIM)lib$(DELIM)esp32s3
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EXTRA_LIBS += -lphy
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# Wireless interfaces.
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CHIP_CSRCS += esp32s3_wireless.c
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endif
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ifeq ($(CONFIG_ESP32S3_WIFI),y)
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CHIP_CSRCS += esp32s3_wlan.c esp32s3_wifi_utils.c esp32s3_wifi_adapter.c
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EXTRA_LIBS += -lcore -lnet80211 -lpp
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ifeq ($(CONFIG_WPA_WAPI_PSK),y)
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EXTRA_LIBS += -lwapi
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endif
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## ESP-IDF's mbedTLS
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VPATH += chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)library
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)library)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include)
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### Define Espressif's configs for mbedTLS
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CFLAGS += ${DEFINE_PREFIX}MBEDTLS_CONFIG_FILE="<mbedtls/esp_config.h>"
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CHIP_CSRCS += aes.c
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CHIP_CSRCS += bignum.c
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CHIP_CSRCS += constant_time.c
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CHIP_CSRCS += ctr_drbg.c
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CHIP_CSRCS += ecp.c
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CHIP_CSRCS += ecp_curves.c
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CHIP_CSRCS += entropy.c
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CHIP_CSRCS += md.c
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CHIP_CSRCS += pkcs5.c
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CHIP_CSRCS += platform.c
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CHIP_CSRCS += platform_util.c
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CHIP_CSRCS += sha1.c
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CHIP_CSRCS += sha256.c
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CHIP_CSRCS += sha512.c
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VPATH += chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)mbedtls$(DELIM)port
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CHIP_CSRCS += esp_hardware.c
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CHIP_CSRCS += esp_mem.c
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CHIP_CSRCS += esp_timing.c
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VPATH += chip$(DELIM)esp-wireless-drivers-3rdparty$(DELIM)esp-idf$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)md
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CHIP_CSRCS += esp_md.c
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## WPA Supplicant
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WIFI_WPA_SUPPLICANT = chip$(DELIM)$(WIRELESS_DRV_REPO)$(DELIM)esp-idf$(DELIM)components$(DELIM)wpa_supplicant
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CFLAGS += ${DEFINE_PREFIX}CONFIG_CRYPTO_MBEDTLS
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CFLAGS += ${DEFINE_PREFIX}CONFIG_ECC
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CFLAGS += ${DEFINE_PREFIX}CONFIG_IEEE80211W
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CFLAGS += ${DEFINE_PREFIX}CONFIG_WPA3_SAE
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CFLAGS += ${DEFINE_PREFIX}EAP_PEER_METHOD
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CFLAGS += ${DEFINE_PREFIX}ESPRESSIF_USE
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CFLAGS += ${DEFINE_PREFIX}ESP_PLATFORM
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CFLAGS += ${DEFINE_PREFIX}ESP_SUPPLICANT
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CFLAGS += ${DEFINE_PREFIX}IEEE8021X_EAPOL
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CFLAGS += ${DEFINE_PREFIX}USE_WPA2_TASK
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CFLAGS += ${DEFINE_PREFIX}__ets__
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ifeq ($(CONFIG_ESP_WIFI_GCMP_SUPPORT),y)
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CFLAGS += ${DEFINE_PREFIX}CONFIG_GCMP
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endif
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ifeq ($(CONFIG_ESP_WIFI_GMAC_SUPPORT),y)
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CFLAGS += ${DEFINE_PREFIX}CONFIG_GMAC
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endif
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)include)
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src)
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)ap
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)ap)
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CHIP_CSRCS += ap_config.c
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CHIP_CSRCS += sta_info.c
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CHIP_CSRCS += wpa_auth.c
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CHIP_CSRCS += wpa_auth_ie.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)common
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INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)common)
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CHIP_CSRCS += dragonfly.c
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CHIP_CSRCS += sae.c
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CHIP_CSRCS += wpa_common.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)crypto
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CHIP_CSRCS += aes-ccm.c
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CHIP_CSRCS += aes-gcm.c
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CHIP_CSRCS += aes-omac1.c
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CHIP_CSRCS += aes-unwrap.c
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CHIP_CSRCS += aes-wrap.c
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CHIP_CSRCS += ccmp.c
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CHIP_CSRCS += crypto_ops.c
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CHIP_CSRCS += des-internal.c
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CHIP_CSRCS += dh_groups.c
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CHIP_CSRCS += rc4.c
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CHIP_CSRCS += sha1-prf.c
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CHIP_CSRCS += sha256-kdf.c
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CHIP_CSRCS += sha256-prf.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)eap_peer
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CHIP_CSRCS += chap.c
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CHIP_CSRCS += eap.c
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CHIP_CSRCS += eap_common.c
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CHIP_CSRCS += eap_mschapv2.c
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CHIP_CSRCS += eap_peap.c
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CHIP_CSRCS += eap_peap_common.c
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CHIP_CSRCS += eap_tls.c
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CHIP_CSRCS += eap_tls_common.c
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CHIP_CSRCS += eap_ttls.c
|
||||
CHIP_CSRCS += mschapv2.c
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)rsn_supp
|
||||
|
||||
CHIP_CSRCS += pmksa_cache.c
|
||||
CHIP_CSRCS += wpa.c
|
||||
CHIP_CSRCS += wpa_ie.c
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)utils
|
||||
|
||||
INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)utils)
|
||||
|
||||
CHIP_CSRCS += base64.c
|
||||
CHIP_CSRCS += bitfield.c
|
||||
CHIP_CSRCS += common.c
|
||||
CHIP_CSRCS += ext_password.c
|
||||
CHIP_CSRCS += json.c
|
||||
CHIP_CSRCS += uuid.c
|
||||
CHIP_CSRCS += wpa_debug.c
|
||||
CHIP_CSRCS += wpabuf.c
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)port
|
||||
|
||||
INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)port$(DELIM)include)
|
||||
|
||||
CHIP_CSRCS += eloop.c
|
||||
CHIP_CSRCS += os_xtensa.c
|
||||
|
||||
## ESP Supplicant (Espressif's WPA supplicant extension)
|
||||
|
||||
INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)include)
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src
|
||||
|
||||
INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src)
|
||||
|
||||
CHIP_CSRCS += esp_common.c
|
||||
CHIP_CSRCS += esp_hostap.c
|
||||
CHIP_CSRCS += esp_wpa2.c
|
||||
CHIP_CSRCS += esp_wpa3.c
|
||||
CHIP_CSRCS += esp_wpa_main.c
|
||||
CHIP_CSRCS += esp_wpas_glue.c
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src$(DELIM)crypto
|
||||
|
||||
INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)src$(DELIM)crypto)
|
||||
|
||||
CHIP_CSRCS += crypto_mbedtls.c
|
||||
CHIP_CSRCS += crypto_mbedtls-bignum.c
|
||||
CHIP_CSRCS += crypto_mbedtls-ec.c
|
||||
CHIP_CSRCS += crypto_mbedtls-rsa.c
|
||||
CHIP_CSRCS += tls_mbedtls.c
|
||||
|
||||
endif
|
||||
|
||||
@ -107,6 +107,12 @@
|
||||
#define ESP32S3_MAX_PRIORITY 5
|
||||
#define ESP32S3_PRIO_INDEX(p) ((p) - ESP32S3_MIN_PRIORITY)
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
# define ESP32S3_WIFI_RESERVE_INT (1 << ESP32S3_CPUINT_MAC)
|
||||
#else
|
||||
# define ESP32S3_WIFI_RESERVE_INT 0
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
@ -152,7 +158,9 @@ static uint32_t g_intenable[CONFIG_SMP_NCPUS];
|
||||
* devices.
|
||||
*/
|
||||
|
||||
static uint32_t g_cpu0_freeints = ESP32S3_CPUINT_PERIPHSET;
|
||||
static uint32_t g_cpu0_freeints = ESP32S3_CPUINT_PERIPHSET &
|
||||
~ESP32S3_WIFI_RESERVE_INT;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static uint32_t g_cpu1_freeints = ESP32S3_CPUINT_PERIPHSET;
|
||||
#endif
|
||||
@ -425,10 +433,21 @@ void up_irqinitialize(void)
|
||||
g_irqmap[XTENSA_IRQ_SWINT] = IRQ_MKMAP(0, ESP32S3_CPUINT_SOFTWARE1);
|
||||
g_irqmap[XTENSA_IRQ_SWINT] = IRQ_MKMAP(1, ESP32S3_CPUINT_SOFTWARE1);
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
g_irqmap[ESP32S3_IRQ_MAC] = IRQ_MKMAP(0, ESP32S3_CPUINT_MAC);
|
||||
#endif
|
||||
|
||||
/* Initialize CPU interrupts */
|
||||
|
||||
esp32s3_cpuint_initialize();
|
||||
|
||||
/* Reserve CPU0 interrupt for some special drivers */
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
g_cpu0_intmap[ESP32S3_CPUINT_MAC] = CPUINT_ASSIGN(ESP32S3_IRQ_MAC);
|
||||
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_MAC);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/* Attach and enable the inter-CPU interrupt */
|
||||
|
||||
|
||||
@ -220,7 +220,7 @@ void devrandom_register(void)
|
||||
#ifdef CONFIG_DEV_URANDOM_ARCH
|
||||
void devurandom_register(void)
|
||||
{
|
||||
register_driver("dev/urandom", &g_rngops, 0444, NULL);
|
||||
register_driver("/dev/urandom", &g_rngops, 0444, NULL);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
5675
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
Normal file
5675
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
Normal file
File diff suppressed because it is too large
Load Diff
501
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.h
Normal file
501
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.h
Normal file
@ -0,0 +1,501 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIFI_ADAPTER_H
|
||||
#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIFI_ADAPTER_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/wireless/wireless.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_ESP32S3_WIFI_STATION)
|
||||
# define ESP32S3_WLAN_HAS_STA
|
||||
# define ESP32S3_WLAN_STA_DEVNO 0
|
||||
# define ESP32S3_WLAN_DEVS 1
|
||||
#endif
|
||||
|
||||
#define SSID_MAX_LEN (32)
|
||||
#define PWD_MAX_LEN (64)
|
||||
|
||||
#define CONFIG_IDF_TARGET_ESP32S3 1
|
||||
|
||||
/* Define esp_err_t */
|
||||
|
||||
typedef int esp_err_t;
|
||||
|
||||
/* Wi-Fi event ID */
|
||||
|
||||
enum wifi_adpt_evt_e
|
||||
{
|
||||
WIFI_ADPT_EVT_SCAN_DONE = 0,
|
||||
WIFI_ADPT_EVT_STA_START,
|
||||
WIFI_ADPT_EVT_STA_CONNECT,
|
||||
WIFI_ADPT_EVT_STA_DISCONNECT,
|
||||
WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE,
|
||||
WIFI_ADPT_EVT_STA_STOP,
|
||||
WIFI_ADPT_EVT_AP_START,
|
||||
WIFI_ADPT_EVT_AP_STOP,
|
||||
WIFI_ADPT_EVT_AP_STACONNECTED,
|
||||
WIFI_ADPT_EVT_AP_STADISCONNECTED,
|
||||
WIFI_ADPT_EVT_MAX,
|
||||
};
|
||||
|
||||
/* Wi-Fi event callback function */
|
||||
|
||||
typedef void (*wifi_evt_cb_t)(void *p);
|
||||
|
||||
/* Wi-Fi TX done callback function */
|
||||
|
||||
typedef void (*wifi_txdone_cb_t)(uint8_t *data, uint16_t *len, bool status);
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_adapter_init
|
||||
*
|
||||
* Description:
|
||||
* Initialize ESP32S3 Wi-Fi adapter
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 if success or -1 if fail
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_adapter_init(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_free_eb
|
||||
*
|
||||
* Description:
|
||||
* Free Wi-Fi receive callback input eb pointer
|
||||
*
|
||||
* Input Parameters:
|
||||
* eb - Wi-Fi receive callback input eb pointer
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_wifi_free_eb(void *eb);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_notify_subscribe
|
||||
*
|
||||
* Description:
|
||||
* Enable event notification
|
||||
*
|
||||
* Input Parameters:
|
||||
* pid - Task PID
|
||||
* event - Signal event data pointer
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 if success or -1 if fail
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event);
|
||||
|
||||
#ifdef ESP32S3_WLAN_HAS_STA
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_start
|
||||
*
|
||||
* Description:
|
||||
* Start Wi-Fi station.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_start(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_stop
|
||||
*
|
||||
* Description:
|
||||
* Stop Wi-Fi station.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_stop(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_send_data
|
||||
*
|
||||
* Description:
|
||||
* Use Wi-Fi station interface to send 802.3 frame
|
||||
*
|
||||
* Input Parameters:
|
||||
* pbuf - Packet buffer pointer
|
||||
* len - Packet length
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_send_data(void *pbuf, uint32_t len);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_register_recv_cb
|
||||
*
|
||||
* Description:
|
||||
* Regitser Wi-Fi station receive packet callback function
|
||||
*
|
||||
* Input Parameters:
|
||||
* recv_cb - Receive callback function
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_register_recv_cb(int (*recv_cb)(void *buffer,
|
||||
uint16_t len,
|
||||
void *eb));
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_register_txdone_cb
|
||||
*
|
||||
* Description:
|
||||
* Register the station TX done callback function.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cb - The callback function
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_wifi_sta_register_txdone_cb(wifi_txdone_cb_t cb);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_read_mac
|
||||
*
|
||||
* Description:
|
||||
* Read station interface MAC address from efuse
|
||||
*
|
||||
* Input Parameters:
|
||||
* mac - MAC address buffer pointer
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 if success or -1 if fail
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_read_mac(uint8_t *mac);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_set_password
|
||||
*
|
||||
* Description:
|
||||
* Set/Get Wi-Fi station password
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_password(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_essid
|
||||
*
|
||||
* Description:
|
||||
* Set/Get Wi-Fi station ESSID
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_essid(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_bssid
|
||||
*
|
||||
* Description:
|
||||
* Set/Get Wi-Fi station BSSID
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_bssid(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_connect
|
||||
*
|
||||
* Description:
|
||||
* Trigger Wi-Fi station connection action
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_connect(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_disconnect
|
||||
*
|
||||
* Description:
|
||||
* Trigger Wi-Fi station disconnection action
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_disconnect(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_mode
|
||||
*
|
||||
* Description:
|
||||
* Set/Get Wi-Fi Station mode code.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_mode(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_auth
|
||||
*
|
||||
* Description:
|
||||
* Set/Get station authentication mode params.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_auth(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_freq
|
||||
*
|
||||
* Description:
|
||||
* Get station frequency.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_freq(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_bitrate
|
||||
*
|
||||
* Description:
|
||||
* Get station default bit rate (Mbps).
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_bitrate(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_get_txpower
|
||||
*
|
||||
* Description:
|
||||
* Get station transmit power (dBm).
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_txpower(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_get_channel_range
|
||||
*
|
||||
* Description:
|
||||
* Get station range of channel parameters.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_channel(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_country
|
||||
*
|
||||
* Description:
|
||||
* Configure country info.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_country(struct iwreq *iwr, bool set);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_sta_rssi
|
||||
*
|
||||
* Description:
|
||||
* Get Wi-Fi sensitivity (dBm).
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
* set - true: set data; false: get data
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_sta_rssi(struct iwreq *iwr, bool set);
|
||||
#endif /* ESP32S3_WLAN_HAS_STA */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_stop_callback
|
||||
*
|
||||
* Description:
|
||||
* Callback to stop Wi-Fi
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_wifi_stop_callback(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#undef EXTERN
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIFI_ADAPTER_H */
|
||||
560
arch/xtensa/src/esp32s3/esp32s3_wifi_utils.c
Normal file
560
arch/xtensa/src/esp32s3/esp32s3_wifi_utils.c
Normal file
@ -0,0 +1,560 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/esp32s3_wifi_utils.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
#include <netinet/arp.h>
|
||||
#include <sys/param.h>
|
||||
|
||||
#include <nuttx/kmalloc.h>
|
||||
#include <nuttx/wireless/wireless.h>
|
||||
|
||||
#include "esp32s3_wifi_adapter.h"
|
||||
#include "esp32s3_wifi_utils.h"
|
||||
#include "esp32s3_wireless.h"
|
||||
#include "espidf_wifi.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Helper to get iw_event size */
|
||||
|
||||
#define ESP_IW_EVENT_SIZE(field) \
|
||||
(offsetof(struct iw_event, u) + sizeof(((union iwreq_data *)0)->field))
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI_SCAN_RESULT_SIZE
|
||||
# define WIFI_SCAN_RESULT_SIZE CONFIG_ESP32S3_WIFI_SCAN_RESULT_SIZE
|
||||
#else
|
||||
# define WIFI_SCAN_RESULT_SIZE (4096)
|
||||
#endif
|
||||
|
||||
#define SCAN_TIME_SEC (5)
|
||||
|
||||
/* Maximum number of channels for Wi-Fi 2.4Ghz */
|
||||
|
||||
#define CHANNEL_MAX_NUM (14)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
****************************************************************************/
|
||||
|
||||
enum scan_status_e
|
||||
{
|
||||
ESP_SCAN_DISABLED = 0,
|
||||
ESP_SCAN_RUN,
|
||||
ESP_SCAN_DONE
|
||||
};
|
||||
|
||||
/* Wi-Fi scan result information */
|
||||
|
||||
struct wifi_scan_result
|
||||
{
|
||||
enum scan_status_e scan_status; /* Scan status */
|
||||
sem_t scan_signal; /* Scan notification signal */
|
||||
uint8_t *scan_result; /* Temp buffer that holds results */
|
||||
unsigned int scan_result_size; /* Current size of temp buffer */
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static struct wifi_scan_result g_scan_priv =
|
||||
{
|
||||
.scan_signal = SEM_INITIALIZER(0),
|
||||
};
|
||||
static uint8_t g_channel_num = 0;
|
||||
static uint8_t g_channel_list[CHANNEL_MAX_NUM];
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_start_scan
|
||||
*
|
||||
* Description:
|
||||
* Scan all available APs.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_start_scan(struct iwreq *iwr)
|
||||
{
|
||||
struct wifi_scan_result *priv = &g_scan_priv;
|
||||
wifi_scan_config_t *config = NULL;
|
||||
struct iw_scan_req *req;
|
||||
int ret = 0;
|
||||
int i;
|
||||
uint8_t target_mac[MAC_LEN];
|
||||
uint8_t target_ssid[SSID_MAX_LEN + 1];
|
||||
memset(target_ssid, 0x0, sizeof(SSID_MAX_LEN + 1));
|
||||
|
||||
if (iwr == NULL)
|
||||
{
|
||||
wlerr("ERROR: Invalid ioctl cmd.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (g_scan_priv.scan_status != ESP_SCAN_DISABLED)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
config = kmm_calloc(1, sizeof(wifi_scan_config_t));
|
||||
if (config == NULL)
|
||||
{
|
||||
wlerr("ERROR: Cannot allocate result buffer\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
g_channel_num = 0;
|
||||
memset(g_channel_list, 0x0, CHANNEL_MAX_NUM);
|
||||
|
||||
if (iwr->u.data.pointer &&
|
||||
iwr->u.data.length >= sizeof(struct iw_scan_req))
|
||||
{
|
||||
req = (struct iw_scan_req *)iwr->u.data.pointer;
|
||||
config->scan_type = (req->scan_type == IW_SCAN_TYPE_ACTIVE ?
|
||||
WIFI_SCAN_TYPE_ACTIVE : WIFI_SCAN_TYPE_PASSIVE);
|
||||
if (iwr->u.data.flags & IW_SCAN_THIS_ESSID &&
|
||||
req->essid_len < sizeof(target_ssid))
|
||||
{
|
||||
/* Scan specific ESSID */
|
||||
|
||||
config->show_hidden = true;
|
||||
config->bssid = NULL;
|
||||
memcpy(&target_ssid[0], req->essid, req->essid_len);
|
||||
config->ssid = &target_ssid[0];
|
||||
config->ssid[req->essid_len] = '\0';
|
||||
}
|
||||
|
||||
if (iwr->u.data.flags & IW_SCAN_THIS_FREQ &&
|
||||
req->num_channels > 0)
|
||||
{
|
||||
/* Scan specific channels */
|
||||
|
||||
DEBUGASSERT(req->num_channels <= CHANNEL_MAX_NUM);
|
||||
g_channel_num = req->num_channels;
|
||||
if (req->num_channels == 1)
|
||||
{
|
||||
config->channel = req->channel_list[0].m;
|
||||
}
|
||||
else
|
||||
{
|
||||
for (i = 0; i < req->num_channels; i++)
|
||||
{
|
||||
g_channel_list[i] = req->channel_list[i].m;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
memset(target_mac, 0xff, MAC_LEN);
|
||||
if (memcmp(req->bssid.sa_data, target_mac, MAC_LEN) != 0)
|
||||
{
|
||||
/* Scan specific bssid */
|
||||
|
||||
memcpy(target_mac, req->bssid.sa_data, MAC_LEN);
|
||||
config->bssid = &target_mac[0];
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Default scan parameters */
|
||||
|
||||
wlinfo("INFO: Use default scan parameters\n");
|
||||
config->scan_type = WIFI_SCAN_TYPE_ACTIVE; /* Active scan */
|
||||
}
|
||||
|
||||
esp_wifi_start();
|
||||
ret = esp_wifi_scan_start(config, false);
|
||||
if (ret != OK)
|
||||
{
|
||||
wlerr("ERROR: Scan error, ret: %d\n", ret);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Allocate buffer to store scan result */
|
||||
|
||||
if (priv->scan_result == NULL)
|
||||
{
|
||||
priv->scan_result = kmm_malloc(WIFI_SCAN_RESULT_SIZE);
|
||||
if (priv->scan_result == NULL)
|
||||
{
|
||||
wlerr("ERROR: Cannot allocate result buffer\n");
|
||||
ret = -ENOMEM;
|
||||
}
|
||||
else
|
||||
{
|
||||
memset(priv->scan_result, 0x0, WIFI_SCAN_RESULT_SIZE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (config != NULL)
|
||||
{
|
||||
kmm_free(config);
|
||||
config = NULL;
|
||||
wlinfo("INFO: start scan\n");
|
||||
}
|
||||
|
||||
g_scan_priv.scan_status = ESP_SCAN_RUN;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_get_scan_results
|
||||
*
|
||||
* Description:
|
||||
* Get scan result
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_get_scan_results(struct iwreq *iwr)
|
||||
{
|
||||
int ret = OK;
|
||||
static bool scan_block = false;
|
||||
struct wifi_scan_result *priv = &g_scan_priv;
|
||||
|
||||
if (g_scan_priv.scan_status == ESP_SCAN_RUN)
|
||||
{
|
||||
irqstate_t irqstate = enter_critical_section();
|
||||
if (scan_block == false)
|
||||
{
|
||||
scan_block = true;
|
||||
leave_critical_section(irqstate);
|
||||
nxsem_tickwait(&priv->scan_signal, SEC2TICK(SCAN_TIME_SEC));
|
||||
scan_block = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
leave_critical_section(irqstate);
|
||||
ret = -EINVAL;
|
||||
goto exit_failed;
|
||||
}
|
||||
}
|
||||
else if (g_scan_priv.scan_status == ESP_SCAN_DISABLED)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((iwr == NULL) || (g_scan_priv.scan_status != ESP_SCAN_DONE))
|
||||
{
|
||||
ret = -EINVAL;
|
||||
goto exit_failed;
|
||||
}
|
||||
|
||||
if (priv->scan_result == NULL)
|
||||
{
|
||||
/* Result have already been requested */
|
||||
|
||||
ret = OK;
|
||||
iwr->u.data.length = 0;
|
||||
goto exit_failed;
|
||||
}
|
||||
|
||||
if (iwr->u.data.pointer == NULL ||
|
||||
iwr->u.data.length < priv->scan_result_size)
|
||||
{
|
||||
/* Stat request, return scan_result_size */
|
||||
|
||||
ret = -E2BIG;
|
||||
iwr->u.data.pointer = NULL;
|
||||
iwr->u.data.length = priv->scan_result_size;
|
||||
goto exit_failed;
|
||||
}
|
||||
|
||||
if (priv->scan_result_size <= 0)
|
||||
{
|
||||
ret = OK;
|
||||
iwr->u.data.length = 0;
|
||||
goto exit_free_buffer;
|
||||
}
|
||||
|
||||
/* Copy result to user buffer */
|
||||
|
||||
if (iwr->u.data.length > priv->scan_result_size)
|
||||
{
|
||||
iwr->u.data.length = priv->scan_result_size;
|
||||
}
|
||||
|
||||
memcpy(iwr->u.data.pointer, priv->scan_result, iwr->u.data.length);
|
||||
|
||||
exit_free_buffer:
|
||||
|
||||
/* Free scan result buffer */
|
||||
|
||||
kmm_free(priv->scan_result);
|
||||
priv->scan_result = NULL;
|
||||
priv->scan_result_size = 0;
|
||||
g_scan_priv.scan_status = ESP_SCAN_DISABLED;
|
||||
|
||||
exit_failed:
|
||||
if (ret < 0)
|
||||
{
|
||||
iwr->u.data.length = 0;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_scan_event_parse
|
||||
*
|
||||
* Description:
|
||||
* Parse scan information
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_wifi_scan_event_parse(void)
|
||||
{
|
||||
struct wifi_scan_result *priv = &g_scan_priv;
|
||||
wifi_ap_record_t *ap_list_buffer = NULL;
|
||||
uint16_t bss_total = 0;
|
||||
uint8_t bss_count = 0;
|
||||
bool parse_done = false;
|
||||
|
||||
if (priv->scan_status != ESP_SCAN_RUN)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
esp_wifi_scan_get_ap_num(&bss_total);
|
||||
if (bss_total == 0)
|
||||
{
|
||||
priv->scan_status = ESP_SCAN_DONE;
|
||||
wlinfo("INFO: None AP is scanned\n");
|
||||
nxsem_post(&priv->scan_signal);
|
||||
return;
|
||||
}
|
||||
|
||||
ap_list_buffer = kmm_calloc(bss_total, sizeof(wifi_ap_record_t));
|
||||
if (ap_list_buffer == NULL)
|
||||
{
|
||||
priv->scan_status = ESP_SCAN_DONE;
|
||||
wlerr("ERROR: Failed to calloc buffer to print scan results");
|
||||
nxsem_post(&priv->scan_signal);
|
||||
return;
|
||||
}
|
||||
|
||||
if (esp_wifi_scan_get_ap_records(&bss_total,
|
||||
(wifi_ap_record_t *)ap_list_buffer) == OK)
|
||||
{
|
||||
struct iw_event *iwe;
|
||||
unsigned int result_size;
|
||||
size_t essid_len;
|
||||
size_t essid_len_aligned;
|
||||
bool is_target_channel = true;
|
||||
int i;
|
||||
|
||||
for (bss_count = 0; bss_count < bss_total; bss_count++)
|
||||
{
|
||||
if (g_channel_num > 1)
|
||||
{
|
||||
is_target_channel = false;
|
||||
for (i = 0; i < g_channel_num; i++)
|
||||
{
|
||||
if (g_channel_list[i] == ap_list_buffer[bss_count].primary)
|
||||
{
|
||||
is_target_channel = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
is_target_channel = true;
|
||||
}
|
||||
|
||||
if (is_target_channel == true)
|
||||
{
|
||||
result_size = WIFI_SCAN_RESULT_SIZE - priv->scan_result_size;
|
||||
|
||||
/* Copy BSSID */
|
||||
|
||||
if (result_size < ESP_IW_EVENT_SIZE(ap_addr))
|
||||
{
|
||||
goto scan_result_full;
|
||||
}
|
||||
|
||||
iwe = (struct iw_event *)
|
||||
&priv->scan_result[priv->scan_result_size];
|
||||
iwe->len = ESP_IW_EVENT_SIZE(ap_addr);
|
||||
iwe->cmd = SIOCGIWAP;
|
||||
memcpy(&iwe->u.ap_addr.sa_data,
|
||||
ap_list_buffer[bss_count].bssid,
|
||||
sizeof(ap_list_buffer[bss_count].bssid));
|
||||
iwe->u.ap_addr.sa_family = ARPHRD_ETHER;
|
||||
priv->scan_result_size += ESP_IW_EVENT_SIZE(ap_addr);
|
||||
result_size -= ESP_IW_EVENT_SIZE(ap_addr);
|
||||
|
||||
/* Copy ESSID */
|
||||
|
||||
essid_len = MIN(strlen((const char *)
|
||||
ap_list_buffer[bss_count].ssid), SSID_MAX_LEN);
|
||||
essid_len_aligned = (essid_len + 3) & -4;
|
||||
if (result_size < ESP_IW_EVENT_SIZE(essid) + essid_len_aligned)
|
||||
{
|
||||
goto scan_result_full;
|
||||
}
|
||||
|
||||
iwe = (struct iw_event *)
|
||||
&priv->scan_result[priv->scan_result_size];
|
||||
iwe->len = ESP_IW_EVENT_SIZE(essid) + essid_len_aligned;
|
||||
iwe->cmd = SIOCGIWESSID;
|
||||
iwe->u.essid.flags = 0;
|
||||
iwe->u.essid.length = essid_len;
|
||||
|
||||
/* Special processing for iw_point, set offset
|
||||
* in pointer field.
|
||||
*/
|
||||
|
||||
iwe->u.essid.pointer = (void *)sizeof(iwe->u.essid);
|
||||
memcpy(&iwe->u.essid + 1,
|
||||
ap_list_buffer[bss_count].ssid, essid_len);
|
||||
|
||||
wlinfo("INFO: ssid %s\n", ap_list_buffer[bss_count].ssid);
|
||||
|
||||
priv->scan_result_size +=
|
||||
ESP_IW_EVENT_SIZE(essid) + essid_len_aligned;
|
||||
result_size -= ESP_IW_EVENT_SIZE(essid) + essid_len_aligned;
|
||||
|
||||
/* Copy link quality info */
|
||||
|
||||
if (result_size < ESP_IW_EVENT_SIZE(qual))
|
||||
{
|
||||
goto scan_result_full;
|
||||
}
|
||||
|
||||
iwe = (struct iw_event *)
|
||||
&priv->scan_result[priv->scan_result_size];
|
||||
iwe->len = ESP_IW_EVENT_SIZE(qual);
|
||||
iwe->cmd = IWEVQUAL;
|
||||
iwe->u.qual.qual = 0x00;
|
||||
|
||||
wlinfo("INFO: signal %d\n", ap_list_buffer[bss_count].rssi);
|
||||
|
||||
iwe->u.qual.level = ap_list_buffer[bss_count].rssi;
|
||||
iwe->u.qual.noise = 0x00;
|
||||
iwe->u.qual.updated = IW_QUAL_DBM | IW_QUAL_ALL_UPDATED;
|
||||
|
||||
priv->scan_result_size += ESP_IW_EVENT_SIZE(qual);
|
||||
result_size -= ESP_IW_EVENT_SIZE(qual);
|
||||
|
||||
/* Copy AP mode */
|
||||
|
||||
if (result_size < ESP_IW_EVENT_SIZE(mode))
|
||||
{
|
||||
goto scan_result_full;
|
||||
}
|
||||
|
||||
iwe = (struct iw_event *)
|
||||
&priv->scan_result[priv->scan_result_size];
|
||||
iwe->len = ESP_IW_EVENT_SIZE(mode);
|
||||
iwe->cmd = SIOCGIWMODE;
|
||||
iwe->u.mode = IW_MODE_MASTER;
|
||||
priv->scan_result_size += ESP_IW_EVENT_SIZE(mode);
|
||||
result_size -= ESP_IW_EVENT_SIZE(mode);
|
||||
|
||||
/* Copy AP encryption mode */
|
||||
|
||||
if (result_size < ESP_IW_EVENT_SIZE(data))
|
||||
{
|
||||
goto scan_result_full;
|
||||
}
|
||||
|
||||
iwe = (struct iw_event *)
|
||||
&priv->scan_result[priv->scan_result_size];
|
||||
iwe->len = ESP_IW_EVENT_SIZE(data);
|
||||
iwe->cmd = SIOCGIWENCODE;
|
||||
iwe->u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
|
||||
iwe->u.data.length = 0;
|
||||
iwe->u.essid.pointer = NULL;
|
||||
|
||||
priv->scan_result_size += ESP_IW_EVENT_SIZE(data);
|
||||
result_size -= ESP_IW_EVENT_SIZE(data);
|
||||
|
||||
/* Copy AP channel */
|
||||
|
||||
if (result_size < ESP_IW_EVENT_SIZE(freq))
|
||||
{
|
||||
goto scan_result_full;
|
||||
}
|
||||
|
||||
iwe = (struct iw_event *)
|
||||
&priv->scan_result[priv->scan_result_size];
|
||||
iwe->len = ESP_IW_EVENT_SIZE(freq);
|
||||
iwe->cmd = SIOCGIWFREQ;
|
||||
iwe->u.freq.e = 0;
|
||||
iwe->u.freq.m = ap_list_buffer[bss_count].primary;
|
||||
|
||||
priv->scan_result_size += ESP_IW_EVENT_SIZE(freq);
|
||||
result_size -= ESP_IW_EVENT_SIZE(freq);
|
||||
}
|
||||
}
|
||||
|
||||
parse_done = true;
|
||||
}
|
||||
|
||||
scan_result_full:
|
||||
|
||||
/* Continue instead of break to log dropped AP results */
|
||||
|
||||
if (parse_done == false)
|
||||
{
|
||||
wlerr("ERROR: No more space in scan_result buffer\n");
|
||||
}
|
||||
|
||||
if (ap_list_buffer != NULL)
|
||||
{
|
||||
kmm_free(ap_list_buffer);
|
||||
ap_list_buffer = NULL;
|
||||
}
|
||||
|
||||
priv->scan_status = ESP_SCAN_DONE;
|
||||
nxsem_post(&priv->scan_signal);
|
||||
}
|
||||
104
arch/xtensa/src/esp32s3/esp32s3_wifi_utils.h
Normal file
104
arch/xtensa/src/esp32s3/esp32s3_wifi_utils.h
Normal file
@ -0,0 +1,104 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/esp32s3_wifi_utils.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIFI_UTILS_H
|
||||
#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIFI_UTILS_H
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/net/netdev.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_start_scan
|
||||
*
|
||||
* Description:
|
||||
* Scan all available APs.
|
||||
*
|
||||
* Input Parameters:
|
||||
* iwr - The argument of the ioctl cmd
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_start_scan(struct iwreq *iwr);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_get_scan_results
|
||||
*
|
||||
* Description:
|
||||
* Get scan result
|
||||
*
|
||||
* Input Parameters:
|
||||
* req The argument of the ioctl cmd
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success (positive non-zero values are cmd-specific)
|
||||
* Negated errno returned on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_wifi_get_scan_results(struct iwreq *iwr);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_scan_event_parse
|
||||
*
|
||||
* Description:
|
||||
* Parse scan information
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_wifi_scan_event_parse(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#undef EXTERN
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIFI_UTILS_H */
|
||||
427
arch/xtensa/src/esp32s3/esp32s3_wireless.c
Normal file
427
arch/xtensa/src/esp32s3/esp32s3_wireless.c
Normal file
@ -0,0 +1,427 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/esp32s3_wireless.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/kmalloc.h>
|
||||
|
||||
#include <debug.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "xtensa.h"
|
||||
#include "hardware/esp32s3_soc.h"
|
||||
#include "hardware/esp32s3_syscon.h"
|
||||
#include "hardware/esp32s3_efuse.h"
|
||||
#include "esp32s3_wireless.h"
|
||||
#include "esp_phy_init.h"
|
||||
#include "phy_init_data.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define MAC_ADDR0_REG EFUSE_RD_MAC_SPI_SYS_0_REG
|
||||
#define MAC_ADDR1_REG EFUSE_RD_MAC_SPI_SYS_1_REG
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
static inline void phy_digital_regs_store(void);
|
||||
static inline void phy_digital_regs_load(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Extern Functions declaration
|
||||
****************************************************************************/
|
||||
|
||||
extern uint8_t esp_crc8(const uint8_t *p, uint32_t len);
|
||||
extern void phy_wakeup_init(void);
|
||||
extern void phy_close_rf(void);
|
||||
extern uint8_t phy_dig_reg_backup(bool init, uint32_t *regs);
|
||||
extern int register_chipv7_phy(const esp_phy_init_data_t *init_data,
|
||||
esp_phy_calibration_data_t *cal_data,
|
||||
esp_phy_calibration_mode_t cal_mode);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* Wi-Fi sleep private data */
|
||||
|
||||
static uint32_t g_phy_clk_en_cnt;
|
||||
|
||||
/* Reference count of enabling PHY */
|
||||
|
||||
static uint8_t g_phy_access_ref;
|
||||
|
||||
/* Memory to store PHY digital registers */
|
||||
|
||||
static uint32_t *g_phy_digital_regs_mem = NULL;
|
||||
|
||||
/* Indicate PHY is calibrated or not */
|
||||
|
||||
static bool g_is_phy_calibrated = false;
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: phy_digital_regs_store
|
||||
*
|
||||
* Description:
|
||||
* Store PHY digital registers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void phy_digital_regs_store(void)
|
||||
{
|
||||
if (g_phy_digital_regs_mem == NULL)
|
||||
{
|
||||
g_phy_digital_regs_mem = (uint32_t *)
|
||||
kmm_malloc(SOC_PHY_DIG_REGS_MEM_SIZE);
|
||||
}
|
||||
|
||||
DEBUGASSERT(g_phy_digital_regs_mem != NULL);
|
||||
|
||||
phy_dig_reg_backup(true, g_phy_digital_regs_mem);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: phy_digital_regs_load
|
||||
*
|
||||
* Description:
|
||||
* Load PHY digital registers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void phy_digital_regs_load(void)
|
||||
{
|
||||
if (g_phy_digital_regs_mem != NULL)
|
||||
{
|
||||
phy_dig_reg_backup(false, g_phy_digital_regs_mem);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Functions needed by libphy.a
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_dport_access_reg_read
|
||||
*
|
||||
* Description:
|
||||
* Read register value safely in SMP
|
||||
*
|
||||
* Input Parameters:
|
||||
* reg - Register address
|
||||
*
|
||||
* Returned Value:
|
||||
* Register value
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t IRAM_ATTR esp_dport_access_reg_read(uint32_t reg)
|
||||
{
|
||||
return getreg32(reg);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: phy_printf
|
||||
*
|
||||
* Description:
|
||||
* Output format string and its arguments
|
||||
*
|
||||
* Input Parameters:
|
||||
* format - format string
|
||||
*
|
||||
* Returned Value:
|
||||
* 0
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int phy_printf(const char *format, ...)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG_WIRELESS_INFO
|
||||
va_list arg;
|
||||
|
||||
va_start(arg, format);
|
||||
vsyslog(LOG_INFO, format, arg);
|
||||
va_end(arg);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_enable_clock
|
||||
*
|
||||
* Description:
|
||||
* Enable PHY hardware clock
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_enable_clock(void)
|
||||
{
|
||||
irqstate_t flags;
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
if (g_phy_clk_en_cnt == 0)
|
||||
{
|
||||
modifyreg32(SYSTEM_WIFI_CLK_EN_REG, 0,
|
||||
SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
|
||||
}
|
||||
|
||||
g_phy_clk_en_cnt++;
|
||||
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_disable_clock
|
||||
*
|
||||
* Description:
|
||||
* Disable PHY hardware clock
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_disable_clock(void)
|
||||
{
|
||||
irqstate_t flags;
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
if (g_phy_clk_en_cnt > 0)
|
||||
{
|
||||
g_phy_clk_en_cnt--;
|
||||
if (g_phy_clk_en_cnt == 0)
|
||||
{
|
||||
modifyreg32(SYSTEM_WIFI_CLK_EN_REG,
|
||||
SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M,
|
||||
0);
|
||||
}
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_read_mac
|
||||
*
|
||||
* Description:
|
||||
* Read MAC address from efuse
|
||||
*
|
||||
* Input Parameters:
|
||||
* mac - MAC address buffer pointer
|
||||
* type - MAC address type
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 if success or -1 if fail
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp_read_mac(uint8_t *mac, esp_mac_type_t type)
|
||||
{
|
||||
uint32_t regval[2];
|
||||
uint8_t tmp;
|
||||
uint8_t *data = (uint8_t *)regval;
|
||||
int i;
|
||||
|
||||
if (mac == NULL)
|
||||
{
|
||||
wlerr("mac address param is NULL");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (type > ESP_MAC_BT)
|
||||
{
|
||||
wlerr("Input type is error=%d\n", type);
|
||||
return -1;
|
||||
}
|
||||
|
||||
regval[0] = getreg32(MAC_ADDR0_REG);
|
||||
regval[1] = getreg32(MAC_ADDR1_REG);
|
||||
|
||||
for (i = 0; i < MAC_LEN; i++)
|
||||
{
|
||||
mac[i] = data[5 - i];
|
||||
}
|
||||
|
||||
if (type == ESP_MAC_WIFI_SOFTAP)
|
||||
{
|
||||
tmp = mac[0];
|
||||
for (i = 0; i < 64; i++)
|
||||
{
|
||||
mac[0] = tmp | 0x02;
|
||||
mac[0] ^= i << 2;
|
||||
|
||||
if (mac[0] != tmp)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i >= 64)
|
||||
{
|
||||
wlerr("Failed to generate SoftAP MAC\n");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
if (type == ESP_MAC_BT)
|
||||
{
|
||||
tmp = mac[0];
|
||||
for (i = 0; i < 64; i++)
|
||||
{
|
||||
mac[0] = tmp | 0x02;
|
||||
mac[0] ^= i << 2;
|
||||
|
||||
if (mac[0] != tmp)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
mac[5] += 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_disable
|
||||
*
|
||||
* Description:
|
||||
* Deinitialize PHY hardware
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_disable(void)
|
||||
{
|
||||
irqstate_t flags;
|
||||
flags = enter_critical_section();
|
||||
|
||||
g_phy_access_ref--;
|
||||
|
||||
if (g_phy_access_ref == 0)
|
||||
{
|
||||
/* Disable PHY and RF. */
|
||||
|
||||
phy_close_rf();
|
||||
|
||||
/* Disable PHY temperature sensor */
|
||||
|
||||
phy_xpd_tsens();
|
||||
|
||||
/* Disable Wi-Fi/BT common peripheral clock.
|
||||
* Do not disable clock for hardware RNG.
|
||||
*/
|
||||
|
||||
esp32s3_phy_disable_clock();
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_enable
|
||||
*
|
||||
* Description:
|
||||
* Initialize PHY hardware
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_enable(void)
|
||||
{
|
||||
static bool debug = false;
|
||||
irqstate_t flags;
|
||||
esp_phy_calibration_data_t *cal_data;
|
||||
if (debug == false)
|
||||
{
|
||||
char *phy_version = get_phy_version_str();
|
||||
wlinfo("phy_version %s\n", phy_version);
|
||||
debug = true;
|
||||
}
|
||||
|
||||
cal_data = kmm_zalloc(sizeof(esp_phy_calibration_data_t));
|
||||
if (!cal_data)
|
||||
{
|
||||
wlerr("ERROR: Failed to allocate PHY calibration data buffer.");
|
||||
abort();
|
||||
}
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
if (g_phy_access_ref == 0)
|
||||
{
|
||||
esp32s3_phy_enable_clock();
|
||||
|
||||
if (g_is_phy_calibrated == false)
|
||||
{
|
||||
#if CONFIG_ESP_PHY_ENABLE_USB
|
||||
phy_bbpll_en_usb(true);
|
||||
#endif
|
||||
wlinfo("calibrating");
|
||||
register_chipv7_phy(&phy_init_data, cal_data, PHY_RF_CAL_FULL);
|
||||
g_is_phy_calibrated = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
phy_wakeup_init();
|
||||
phy_digital_regs_load();
|
||||
}
|
||||
}
|
||||
|
||||
g_phy_access_ref++;
|
||||
leave_critical_section(flags);
|
||||
kmm_free(cal_data);
|
||||
}
|
||||
168
arch/xtensa/src/esp32s3/esp32s3_wireless.h
Normal file
168
arch/xtensa/src/esp32s3/esp32s3_wireless.h
Normal file
@ -0,0 +1,168 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/esp32s3_wireless.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIRELESS_H
|
||||
#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIRELESS_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "xtensa_attr.h"
|
||||
|
||||
#include "espidf_wifi.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Note: Don't remove these definitions, they are needed by the 3rdparty IDF
|
||||
* headers
|
||||
*/
|
||||
|
||||
#define CONFIG_ESP32_SUPPORT_MULTIPLE_PHY_INIT_DATA_BIN 0
|
||||
#define CONFIG_MAC_BB_PD 0
|
||||
|
||||
#define MAC_LEN (6)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_read_mac
|
||||
*
|
||||
* Description:
|
||||
* Read MAC address from efuse
|
||||
*
|
||||
* Input Parameters:
|
||||
* mac - MAC address buffer pointer
|
||||
* type - MAC address type
|
||||
*
|
||||
* Returned Value:
|
||||
* 0 if success or -1 if fail
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp_read_mac(uint8_t *mac, esp_mac_type_t type);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_enable
|
||||
*
|
||||
* Description:
|
||||
* Initialize PHY hardware
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_enable(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_disable
|
||||
*
|
||||
* Description:
|
||||
* Deinitialize PHY hardware
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_disable(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_enable_clock
|
||||
*
|
||||
* Description:
|
||||
* Enable PHY clock
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_enable_clock(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_phy_disable_clock
|
||||
*
|
||||
* Description:
|
||||
* Disable PHY clock
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp32s3_phy_disable_clock(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Functions needed by libphy.a
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_dport_access_reg_read
|
||||
*
|
||||
* Description:
|
||||
* Read register value safely in SMP
|
||||
*
|
||||
* Input Parameters:
|
||||
* reg - Register address
|
||||
*
|
||||
* Returned Value:
|
||||
* Register value
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t IRAM_ATTR esp_dport_access_reg_read(uint32_t reg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: phy_printf
|
||||
*
|
||||
* Description:
|
||||
* Output format string and its arguments
|
||||
*
|
||||
* Input Parameters:
|
||||
* format - format string
|
||||
*
|
||||
* Returned Value:
|
||||
* 0
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int phy_printf(const char *format, ...) printf_like(1, 2);
|
||||
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WIRELESS_H */
|
||||
1474
arch/xtensa/src/esp32s3/esp32s3_wlan.c
Normal file
1474
arch/xtensa/src/esp32s3/esp32s3_wlan.c
Normal file
File diff suppressed because it is too large
Load Diff
93
arch/xtensa/src/esp32s3/esp32s3_wlan.h
Normal file
93
arch/xtensa/src/esp32s3/esp32s3_wlan.h
Normal file
@ -0,0 +1,93 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/esp32s3_wlan.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WLAN_H
|
||||
#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WLAN_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "esp32s3_wifi_adapter.h"
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef ESP32S3_WLAN_HAS_STA
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_wlan_sta_set_linkstatus
|
||||
*
|
||||
* Description:
|
||||
* Set Wi-Fi station link status
|
||||
*
|
||||
* Parameters:
|
||||
* linkstatus - true Notifies the networking layer about an available
|
||||
* carrier, false Notifies the networking layer about an
|
||||
* disappeared carrier.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp32s3_wlan_sta_set_linkstatus(bool linkstatus);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_wlan_sta_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the ESP32-S3 WLAN station netcard driver
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; Negated errno on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp32s3_wlan_sta_initialize(void);
|
||||
#endif /* ESP32S3_WLAN_HAS_STA */
|
||||
|
||||
#endif /* CONFIG_ESP32S3_WIFI */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#undef EXTERN
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_WLAN_H */
|
||||
@ -1761,6 +1761,8 @@
|
||||
|
||||
#define RTC_CNTL_RTC_STORE1_REG (DR_REG_RTCCNTL_BASE + 0x54)
|
||||
|
||||
#define RTC_SLOW_CLK_CAL_REG RTC_CNTL_RTC_STORE1_REG
|
||||
|
||||
/* RTC_CNTL_RTC_SCRATCH1 : R/W; bitpos: [31:0]; default: 0;
|
||||
* Reserved register
|
||||
*/
|
||||
|
||||
840
arch/xtensa/src/esp32s3/hardware/esp32s3_syscon.h
Normal file
840
arch/xtensa/src/esp32s3/hardware/esp32s3_syscon.h
Normal file
@ -0,0 +1,840 @@
|
||||
/****************************************************************************
|
||||
* arch/xtensa/src/esp32s3/hardware/esp32s3_syscon.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_SYSCON_H
|
||||
#define __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_SYSCON_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include "esp32s3_soc.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define SYSCON_SYSCLK_CONF_REG (DR_REG_SYSCON_BASE + 0x0)
|
||||
|
||||
/* SYSCON_RST_TICK_CNT : R/W ;bitpos:[12] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_RST_TICK_CNT (BIT(12))
|
||||
#define SYSCON_RST_TICK_CNT_M (BIT(12))
|
||||
#define SYSCON_RST_TICK_CNT_V 0x1
|
||||
#define SYSCON_RST_TICK_CNT_S 12
|
||||
|
||||
/* SYSCON_CLK_EN : R/W ;bitpos:[11] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_CLK_EN (BIT(11))
|
||||
#define SYSCON_CLK_EN_M (BIT(11))
|
||||
#define SYSCON_CLK_EN_V 0x1
|
||||
#define SYSCON_CLK_EN_S 11
|
||||
|
||||
/* SYSCON_CLK_320M_EN : R/W ;bitpos:[10] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_CLK_320M_EN (BIT(10))
|
||||
#define SYSCON_CLK_320M_EN_M (BIT(10))
|
||||
#define SYSCON_CLK_320M_EN_V 0x1
|
||||
#define SYSCON_CLK_320M_EN_S 10
|
||||
|
||||
/* SYSCON_PRE_DIV_CNT : R/W ;bitpos:[9:0] ;default: 10'h1 ; */
|
||||
|
||||
#define SYSCON_PRE_DIV_CNT 0x000003FF
|
||||
#define SYSCON_PRE_DIV_CNT_M ((SYSCON_PRE_DIV_CNT_V)<<(SYSCON_PRE_DIV_CNT_S))
|
||||
#define SYSCON_PRE_DIV_CNT_V 0x3FF
|
||||
#define SYSCON_PRE_DIV_CNT_S 0
|
||||
|
||||
#define SYSCON_TICK_CONF_REG (DR_REG_SYSCON_BASE + 0x4)
|
||||
|
||||
/* SYSCON_TICK_ENABLE : R/W ;bitpos:[16] ;default: 1'd1 ; */
|
||||
|
||||
#define SYSCON_TICK_ENABLE (BIT(16))
|
||||
#define SYSCON_TICK_ENABLE_M (BIT(16))
|
||||
#define SYSCON_TICK_ENABLE_V 0x1
|
||||
#define SYSCON_TICK_ENABLE_S 16
|
||||
|
||||
/* SYSCON_CK8M_TICK_NUM : R/W ;bitpos:[15:8] ;default: 8'd7 ; */
|
||||
|
||||
#define SYSCON_CK8M_TICK_NUM 0x000000FF
|
||||
#define SYSCON_CK8M_TICK_NUM_M ((SYSCON_CK8M_TICK_NUM_V)<<(SYSCON_CK8M_TICK_NUM_S))
|
||||
#define SYSCON_CK8M_TICK_NUM_V 0xFF
|
||||
#define SYSCON_CK8M_TICK_NUM_S 8
|
||||
|
||||
/* SYSCON_XTAL_TICK_NUM : R/W ;bitpos:[7:0] ;default: 8'd39 ; */
|
||||
|
||||
#define SYSCON_XTAL_TICK_NUM 0x000000FF
|
||||
#define SYSCON_XTAL_TICK_NUM_M ((SYSCON_XTAL_TICK_NUM_V)<<(SYSCON_XTAL_TICK_NUM_S))
|
||||
#define SYSCON_XTAL_TICK_NUM_V 0xFF
|
||||
#define SYSCON_XTAL_TICK_NUM_S 0
|
||||
|
||||
#define SYSCON_CLK_OUT_EN_REG (DR_REG_SYSCON_BASE + 0x8)
|
||||
|
||||
/* SYSCON_CLK_XTAL_OEN : R/W ;bitpos:[10] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK_XTAL_OEN (BIT(10))
|
||||
#define SYSCON_CLK_XTAL_OEN_M (BIT(10))
|
||||
#define SYSCON_CLK_XTAL_OEN_V 0x1
|
||||
#define SYSCON_CLK_XTAL_OEN_S 10
|
||||
|
||||
/* SYSCON_CLK40X_BB_OEN : R/W ;bitpos:[9] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK40X_BB_OEN (BIT(9))
|
||||
#define SYSCON_CLK40X_BB_OEN_M (BIT(9))
|
||||
#define SYSCON_CLK40X_BB_OEN_V 0x1
|
||||
#define SYSCON_CLK40X_BB_OEN_S 9
|
||||
|
||||
/* SYSCON_CLK_DAC_CPU_OEN : R/W ;bitpos:[8] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK_DAC_CPU_OEN (BIT(8))
|
||||
#define SYSCON_CLK_DAC_CPU_OEN_M (BIT(8))
|
||||
#define SYSCON_CLK_DAC_CPU_OEN_V 0x1
|
||||
#define SYSCON_CLK_DAC_CPU_OEN_S 8
|
||||
|
||||
/* SYSCON_CLK_ADC_INF_OEN : R/W ;bitpos:[7] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK_ADC_INF_OEN (BIT(7))
|
||||
#define SYSCON_CLK_ADC_INF_OEN_M (BIT(7))
|
||||
#define SYSCON_CLK_ADC_INF_OEN_V 0x1
|
||||
#define SYSCON_CLK_ADC_INF_OEN_S 7
|
||||
|
||||
/* SYSCON_CLK_320M_OEN : R/W ;bitpos:[6] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK_320M_OEN (BIT(6))
|
||||
#define SYSCON_CLK_320M_OEN_M (BIT(6))
|
||||
#define SYSCON_CLK_320M_OEN_V 0x1
|
||||
#define SYSCON_CLK_320M_OEN_S 6
|
||||
|
||||
/* SYSCON_CLK160_OEN : R/W ;bitpos:[5] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK160_OEN (BIT(5))
|
||||
#define SYSCON_CLK160_OEN_M (BIT(5))
|
||||
#define SYSCON_CLK160_OEN_V 0x1
|
||||
#define SYSCON_CLK160_OEN_S 5
|
||||
|
||||
/* SYSCON_CLK80_OEN : R/W ;bitpos:[4] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK80_OEN (BIT(4))
|
||||
#define SYSCON_CLK80_OEN_M (BIT(4))
|
||||
#define SYSCON_CLK80_OEN_V 0x1
|
||||
#define SYSCON_CLK80_OEN_S 4
|
||||
|
||||
/* SYSCON_CLK_BB_OEN : R/W ;bitpos:[3] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK_BB_OEN (BIT(3))
|
||||
#define SYSCON_CLK_BB_OEN_M (BIT(3))
|
||||
#define SYSCON_CLK_BB_OEN_V 0x1
|
||||
#define SYSCON_CLK_BB_OEN_S 3
|
||||
|
||||
/* SYSCON_CLK44_OEN : R/W ;bitpos:[2] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK44_OEN (BIT(2))
|
||||
#define SYSCON_CLK44_OEN_M (BIT(2))
|
||||
#define SYSCON_CLK44_OEN_V 0x1
|
||||
#define SYSCON_CLK44_OEN_S 2
|
||||
|
||||
/* SYSCON_CLK22_OEN : R/W ;bitpos:[1] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK22_OEN (BIT(1))
|
||||
#define SYSCON_CLK22_OEN_M (BIT(1))
|
||||
#define SYSCON_CLK22_OEN_V 0x1
|
||||
#define SYSCON_CLK22_OEN_S 1
|
||||
|
||||
/* SYSCON_CLK20_OEN : R/W ;bitpos:[0] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_CLK20_OEN (BIT(0))
|
||||
#define SYSCON_CLK20_OEN_M (BIT(0))
|
||||
#define SYSCON_CLK20_OEN_V 0x1
|
||||
#define SYSCON_CLK20_OEN_S 0
|
||||
|
||||
#define SYSCON_WIFI_BB_CFG_REG (DR_REG_SYSCON_BASE + 0xC)
|
||||
|
||||
/* SYSCON_WIFI_BB_CFG : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSCON_WIFI_BB_CFG 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_BB_CFG_M ((SYSCON_WIFI_BB_CFG_V)<<(SYSCON_WIFI_BB_CFG_S))
|
||||
#define SYSCON_WIFI_BB_CFG_V 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_BB_CFG_S 0
|
||||
|
||||
#define SYSCON_WIFI_BB_CFG_2_REG (DR_REG_SYSCON_BASE + 0x10)
|
||||
|
||||
/* SYSCON_WIFI_BB_CFG_2 : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSCON_WIFI_BB_CFG_2 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_BB_CFG_2_M ((SYSCON_WIFI_BB_CFG_2_V)<<(SYSCON_WIFI_BB_CFG_2_S))
|
||||
#define SYSCON_WIFI_BB_CFG_2_V 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_BB_CFG_2_S 0
|
||||
|
||||
#define SYSCON_WIFI_CLK_EN_REG (DR_REG_SYSCON_BASE + 0x14)
|
||||
|
||||
/* SYSCON_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
|
||||
|
||||
#define SYSCON_WIFI_CLK_EN 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_CLK_EN_M ((SYSCON_WIFI_CLK_EN_V)<<(SYSCON_WIFI_CLK_EN_S))
|
||||
#define SYSCON_WIFI_CLK_EN_V 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_CLK_EN_S 0
|
||||
|
||||
#define SYSCON_WIFI_RST_EN_REG (DR_REG_SYSCON_BASE + 0x18)
|
||||
|
||||
/* SYSCON_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSCON_WIFI_RST 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_RST_M ((SYSCON_WIFI_RST_V)<<(SYSCON_WIFI_RST_S))
|
||||
#define SYSCON_WIFI_RST_V 0xFFFFFFFF
|
||||
#define SYSCON_WIFI_RST_S 0
|
||||
|
||||
#define SYSTEM_WIFI_CLK_EN_REG SYSCON_WIFI_CLK_EN_REG
|
||||
|
||||
/* SYSTEM_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030 ; */
|
||||
|
||||
#define SYSTEM_WIFI_CLK_EN 0x00FB9FCF
|
||||
#define SYSTEM_WIFI_CLK_EN_M ((SYSTEM_WIFI_CLK_EN_V) << (SYSTEM_WIFI_CLK_EN_S))
|
||||
#define SYSTEM_WIFI_CLK_EN_V 0x00FB9FCF
|
||||
#define SYSTEM_WIFI_CLK_EN_S 0
|
||||
|
||||
/* Mask for all Wifi clock bits, 6 */
|
||||
|
||||
#define SYSTEM_WIFI_CLK_WIFI_EN 0x0
|
||||
#define SYSTEM_WIFI_CLK_WIFI_EN_M ((SYSTEM_WIFI_CLK_WIFI_EN_V)<<(SYSTEM_WIFI_CLK_WIFI_EN_S))
|
||||
#define SYSTEM_WIFI_CLK_WIFI_EN_V 0x0
|
||||
#define SYSTEM_WIFI_CLK_WIFI_EN_S 0
|
||||
|
||||
/* Mask for all Bluetooth clock bits, 11, 16, 17 */
|
||||
|
||||
#define SYSTEM_WIFI_CLK_BT_EN 0x0
|
||||
#define SYSTEM_WIFI_CLK_BT_EN_M ((SYSTEM_WIFI_CLK_BT_EN_V)<<(SYSTEM_WIFI_CLK_BT_EN_S))
|
||||
#define SYSTEM_WIFI_CLK_BT_EN_V 0x0
|
||||
#define SYSTEM_WIFI_CLK_BT_EN_S 0
|
||||
|
||||
/* Mask for clock bits used by both WIFI and Bluetooth,
|
||||
* bit 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23
|
||||
*/
|
||||
|
||||
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
|
||||
|
||||
/* bluetooth baseband bit11 */
|
||||
|
||||
#define SYSTEM_BT_BASEBAND_EN BIT(11)
|
||||
|
||||
/* bluetooth LC bit16 and bit17 */
|
||||
|
||||
#define SYSTEM_BT_LC_EN (BIT(16) | BIT(17))
|
||||
|
||||
/* Remaining single bit clock masks */
|
||||
|
||||
#define SYSTEM_WIFI_CLK_I2C_CLK_EN BIT(5)
|
||||
#define SYSTEM_WIFI_CLK_UNUSED_BIT12 BIT(12)
|
||||
#define SYSTEM_WIFI_CLK_SDIO_HOST_EN BIT(13)
|
||||
#define SYSTEM_WIFI_CLK_EMAC_EN BIT(14)
|
||||
#define SYSTEM_WIFI_CLK_RNG_EN BIT(15)
|
||||
|
||||
#define SYSTEM_CORE_RST_EN_REG SYSTEM_WIFI_RST_EN_REG
|
||||
#define SYSTEM_WIFI_RST_EN_REG SYSCON_WIFI_RST_EN_REG
|
||||
|
||||
/* SYSTEM_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSTEM_WIFI_RST 0xFFFFFFFF
|
||||
#define SYSTEM_WIFI_RST_M ((SYSTEM_WIFI_RST_V) << (SYSTEM_WIFI_RST_S))
|
||||
#define SYSTEM_WIFI_RST_V 0xFFFFFFFF
|
||||
#define SYSTEM_WIFI_RST_S 0
|
||||
|
||||
#define SYSTEM_WIFIBB_RST BIT(0)
|
||||
#define SYSTEM_FE_RST BIT(1)
|
||||
#define SYSTEM_WIFIMAC_RST BIT(2)
|
||||
#define SYSTEM_BTBB_RST BIT(3) /* Bluetooth Baseband */
|
||||
#define SYSTEM_BTMAC_RST BIT(4) /* deprecated */
|
||||
#define SYSTEM_SDIO_RST BIT(5)
|
||||
#define SYSTEM_EMAC_RST BIT(7)
|
||||
#define SYSTEM_MACPWR_RST BIT(8)
|
||||
#define SYSTEM_RW_BTMAC_RST BIT(9) /* Bluetooth MAC */
|
||||
#define SYSTEM_RW_BTLP_RST BIT(10) /* Bluetooth Low Power Module */
|
||||
#define SYSTEM_RW_BTMAC_REG_RST BIT(11) /* Bluetooth MAC Regsiters */
|
||||
#define SYSTEM_RW_BTLP_REG_RST BIT(12) /* Bluetooth Low Power Registers */
|
||||
#define SYSTEM_BTBB_REG_RST BIT(13) /* Bluetooth Baseband Registers */
|
||||
|
||||
#define MODEM_RESET_FIELD_WHEN_PU (SYSTEM_WIFIBB_RST | \
|
||||
SYSTEM_FE_RST | \
|
||||
SYSTEM_WIFIMAC_RST | \
|
||||
SYSTEM_BTBB_RST | \
|
||||
SYSTEM_BTMAC_RST | \
|
||||
SYSTEM_RW_BTMAC_RST | \
|
||||
SYSTEM_RW_BTMAC_REG_RST | \
|
||||
SYSTEM_BTBB_REG_RST)
|
||||
|
||||
#define SYSCON_HOST_INF_SEL_REG (DR_REG_SYSCON_BASE + 0x1C)
|
||||
|
||||
/* SYSCON_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
|
||||
|
||||
#define SYSCON_PERI_IO_SWAP 0x000000FF
|
||||
#define SYSCON_PERI_IO_SWAP_M ((SYSCON_PERI_IO_SWAP_V)<<(SYSCON_PERI_IO_SWAP_S))
|
||||
#define SYSCON_PERI_IO_SWAP_V 0xFF
|
||||
#define SYSCON_PERI_IO_SWAP_S 0
|
||||
|
||||
#define SYSCON_EXT_MEM_PMS_LOCK_REG (DR_REG_SYSCON_BASE + 0x20)
|
||||
|
||||
/* SYSCON_EXT_MEM_PMS_LOCK : R/W ;bitpos:[0] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_EXT_MEM_PMS_LOCK (BIT(0))
|
||||
#define SYSCON_EXT_MEM_PMS_LOCK_M (BIT(0))
|
||||
#define SYSCON_EXT_MEM_PMS_LOCK_V 0x1
|
||||
#define SYSCON_EXT_MEM_PMS_LOCK_S 0
|
||||
|
||||
#define SYSCON_EXT_MEM_WRITEBACK_BYPASS_REG (DR_REG_SYSCON_BASE + 0x24)
|
||||
|
||||
/* SYSCON_WRITEBACK_BYPASS : R/W ;bitpos:[0] ;default: 1'b0 ;
|
||||
* Set 1 to bypass cache writeback request to external memory so that spi
|
||||
* will not check its attribute.
|
||||
*/
|
||||
|
||||
#define SYSCON_WRITEBACK_BYPASS (BIT(0))
|
||||
#define SYSCON_WRITEBACK_BYPASS_M (BIT(0))
|
||||
#define SYSCON_WRITEBACK_BYPASS_V 0x1
|
||||
#define SYSCON_WRITEBACK_BYPASS_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE0_ATTR_REG (DR_REG_SYSCON_BASE + 0x28)
|
||||
|
||||
/* SYSCON_FLASH_ACE0_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE0_ATTR 0x000001FF
|
||||
#define SYSCON_FLASH_ACE0_ATTR_M ((SYSCON_FLASH_ACE0_ATTR_V)<<(SYSCON_FLASH_ACE0_ATTR_S))
|
||||
#define SYSCON_FLASH_ACE0_ATTR_V 0x1FF
|
||||
#define SYSCON_FLASH_ACE0_ATTR_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE1_ATTR_REG (DR_REG_SYSCON_BASE + 0x2C)
|
||||
|
||||
/* SYSCON_FLASH_ACE1_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE1_ATTR 0x000001FF
|
||||
#define SYSCON_FLASH_ACE1_ATTR_M ((SYSCON_FLASH_ACE1_ATTR_V)<<(SYSCON_FLASH_ACE1_ATTR_S))
|
||||
#define SYSCON_FLASH_ACE1_ATTR_V 0x1FF
|
||||
#define SYSCON_FLASH_ACE1_ATTR_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE2_ATTR_REG (DR_REG_SYSCON_BASE + 0x30)
|
||||
|
||||
/* SYSCON_FLASH_ACE2_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE2_ATTR 0x000001FF
|
||||
#define SYSCON_FLASH_ACE2_ATTR_M ((SYSCON_FLASH_ACE2_ATTR_V)<<(SYSCON_FLASH_ACE2_ATTR_S))
|
||||
#define SYSCON_FLASH_ACE2_ATTR_V 0x1FF
|
||||
#define SYSCON_FLASH_ACE2_ATTR_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE3_ATTR_REG (DR_REG_SYSCON_BASE + 0x34)
|
||||
|
||||
/* SYSCON_FLASH_ACE3_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE3_ATTR 0x000001FF
|
||||
#define SYSCON_FLASH_ACE3_ATTR_M ((SYSCON_FLASH_ACE3_ATTR_V)<<(SYSCON_FLASH_ACE3_ATTR_S))
|
||||
#define SYSCON_FLASH_ACE3_ATTR_V 0x1FF
|
||||
#define SYSCON_FLASH_ACE3_ATTR_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE0_ADDR_REG (DR_REG_SYSCON_BASE + 0x38)
|
||||
|
||||
/* SYSCON_FLASH_ACE0_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE0_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE0_ADDR_S_M ((SYSCON_FLASH_ACE0_ADDR_S_V)<<(SYSCON_FLASH_ACE0_ADDR_S_S))
|
||||
#define SYSCON_FLASH_ACE0_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE0_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE1_ADDR_REG (DR_REG_SYSCON_BASE + 0x3C)
|
||||
|
||||
/* SYSCON_FLASH_ACE1_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h10000000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE1_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE1_ADDR_S_M ((SYSCON_FLASH_ACE1_ADDR_S_V)<<(SYSCON_FLASH_ACE1_ADDR_S_S))
|
||||
#define SYSCON_FLASH_ACE1_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE1_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE2_ADDR_REG (DR_REG_SYSCON_BASE + 0x40)
|
||||
|
||||
/* SYSCON_FLASH_ACE2_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h20000000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE2_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE2_ADDR_S_M ((SYSCON_FLASH_ACE2_ADDR_S_V)<<(SYSCON_FLASH_ACE2_ADDR_S_S))
|
||||
#define SYSCON_FLASH_ACE2_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE2_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE3_ADDR_REG (DR_REG_SYSCON_BASE + 0x44)
|
||||
|
||||
/* SYSCON_FLASH_ACE3_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h30000000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE3_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE3_ADDR_S_M ((SYSCON_FLASH_ACE3_ADDR_S_V)<<(SYSCON_FLASH_ACE3_ADDR_S_S))
|
||||
#define SYSCON_FLASH_ACE3_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_FLASH_ACE3_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE0_SIZE_REG (DR_REG_SYSCON_BASE + 0x48)
|
||||
/* SYSCON_FLASH_ACE0_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE0_SIZE 0x0000FFFF
|
||||
#define SYSCON_FLASH_ACE0_SIZE_M ((SYSCON_FLASH_ACE0_SIZE_V)<<(SYSCON_FLASH_ACE0_SIZE_S))
|
||||
#define SYSCON_FLASH_ACE0_SIZE_V 0xFFFF
|
||||
#define SYSCON_FLASH_ACE0_SIZE_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE1_SIZE_REG (DR_REG_SYSCON_BASE + 0x4C)
|
||||
|
||||
/* SYSCON_FLASH_ACE1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE1_SIZE 0x0000FFFF
|
||||
#define SYSCON_FLASH_ACE1_SIZE_M ((SYSCON_FLASH_ACE1_SIZE_V)<<(SYSCON_FLASH_ACE1_SIZE_S))
|
||||
#define SYSCON_FLASH_ACE1_SIZE_V 0xFFFF
|
||||
#define SYSCON_FLASH_ACE1_SIZE_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE2_SIZE_REG (DR_REG_SYSCON_BASE + 0x50)
|
||||
|
||||
/* SYSCON_FLASH_ACE2_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE2_SIZE 0x0000FFFF
|
||||
#define SYSCON_FLASH_ACE2_SIZE_M ((SYSCON_FLASH_ACE2_SIZE_V)<<(SYSCON_FLASH_ACE2_SIZE_S))
|
||||
#define SYSCON_FLASH_ACE2_SIZE_V 0xFFFF
|
||||
#define SYSCON_FLASH_ACE2_SIZE_S 0
|
||||
|
||||
#define SYSCON_FLASH_ACE3_SIZE_REG (DR_REG_SYSCON_BASE + 0x54)
|
||||
|
||||
/* SYSCON_FLASH_ACE3_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_FLASH_ACE3_SIZE 0x0000FFFF
|
||||
#define SYSCON_FLASH_ACE3_SIZE_M ((SYSCON_FLASH_ACE3_SIZE_V)<<(SYSCON_FLASH_ACE3_SIZE_S))
|
||||
#define SYSCON_FLASH_ACE3_SIZE_V 0xFFFF
|
||||
#define SYSCON_FLASH_ACE3_SIZE_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE0_ATTR_REG (DR_REG_SYSCON_BASE + 0x58)
|
||||
|
||||
/* SYSCON_SRAM_ACE0_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE0_ATTR 0x000001FF
|
||||
#define SYSCON_SRAM_ACE0_ATTR_M ((SYSCON_SRAM_ACE0_ATTR_V)<<(SYSCON_SRAM_ACE0_ATTR_S))
|
||||
#define SYSCON_SRAM_ACE0_ATTR_V 0x1FF
|
||||
#define SYSCON_SRAM_ACE0_ATTR_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE1_ATTR_REG (DR_REG_SYSCON_BASE + 0x5C)
|
||||
|
||||
/* SYSCON_SRAM_ACE1_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE1_ATTR 0x000001FF
|
||||
#define SYSCON_SRAM_ACE1_ATTR_M ((SYSCON_SRAM_ACE1_ATTR_V)<<(SYSCON_SRAM_ACE1_ATTR_S))
|
||||
#define SYSCON_SRAM_ACE1_ATTR_V 0x1FF
|
||||
#define SYSCON_SRAM_ACE1_ATTR_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE2_ATTR_REG (DR_REG_SYSCON_BASE + 0x60)
|
||||
|
||||
/* SYSCON_SRAM_ACE2_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE2_ATTR 0x000001FF
|
||||
#define SYSCON_SRAM_ACE2_ATTR_M ((SYSCON_SRAM_ACE2_ATTR_V)<<(SYSCON_SRAM_ACE2_ATTR_S))
|
||||
#define SYSCON_SRAM_ACE2_ATTR_V 0x1FF
|
||||
#define SYSCON_SRAM_ACE2_ATTR_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE3_ATTR_REG (DR_REG_SYSCON_BASE + 0x64)
|
||||
|
||||
/* SYSCON_SRAM_ACE3_ATTR : R/W ;bitpos:[8:0] ;default: 9'hff ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE3_ATTR 0x000001FF
|
||||
#define SYSCON_SRAM_ACE3_ATTR_M ((SYSCON_SRAM_ACE3_ATTR_V)<<(SYSCON_SRAM_ACE3_ATTR_S))
|
||||
#define SYSCON_SRAM_ACE3_ATTR_V 0x1FF
|
||||
#define SYSCON_SRAM_ACE3_ATTR_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE0_ADDR_REG (DR_REG_SYSCON_BASE + 0x68)
|
||||
|
||||
/* SYSCON_SRAM_ACE0_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE0_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE0_ADDR_S_M ((SYSCON_SRAM_ACE0_ADDR_S_V)<<(SYSCON_SRAM_ACE0_ADDR_S_S))
|
||||
#define SYSCON_SRAM_ACE0_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE0_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE1_ADDR_REG (DR_REG_SYSCON_BASE + 0x6C)
|
||||
|
||||
/* SYSCON_SRAM_ACE1_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h10000000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE1_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE1_ADDR_S_M ((SYSCON_SRAM_ACE1_ADDR_S_V)<<(SYSCON_SRAM_ACE1_ADDR_S_S))
|
||||
#define SYSCON_SRAM_ACE1_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE1_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE2_ADDR_REG (DR_REG_SYSCON_BASE + 0x70)
|
||||
|
||||
/* SYSCON_SRAM_ACE2_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h20000000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE2_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE2_ADDR_S_M ((SYSCON_SRAM_ACE2_ADDR_S_V)<<(SYSCON_SRAM_ACE2_ADDR_S_S))
|
||||
#define SYSCON_SRAM_ACE2_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE2_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE3_ADDR_REG (DR_REG_SYSCON_BASE + 0x74)
|
||||
|
||||
/* SYSCON_SRAM_ACE3_ADDR_S : R/W ;bitpos:[31:0] ;default: 32'h30000000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE3_ADDR_S 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE3_ADDR_S_M ((SYSCON_SRAM_ACE3_ADDR_S_V)<<(SYSCON_SRAM_ACE3_ADDR_S_S))
|
||||
#define SYSCON_SRAM_ACE3_ADDR_S_V 0xFFFFFFFF
|
||||
#define SYSCON_SRAM_ACE3_ADDR_S_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE0_SIZE_REG (DR_REG_SYSCON_BASE + 0x78)
|
||||
|
||||
/* SYSCON_SRAM_ACE0_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE0_SIZE 0x0000FFFF
|
||||
#define SYSCON_SRAM_ACE0_SIZE_M ((SYSCON_SRAM_ACE0_SIZE_V)<<(SYSCON_SRAM_ACE0_SIZE_S))
|
||||
#define SYSCON_SRAM_ACE0_SIZE_V 0xFFFF
|
||||
#define SYSCON_SRAM_ACE0_SIZE_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE1_SIZE_REG (DR_REG_SYSCON_BASE + 0x7C)
|
||||
|
||||
/* SYSCON_SRAM_ACE1_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE1_SIZE 0x0000FFFF
|
||||
#define SYSCON_SRAM_ACE1_SIZE_M ((SYSCON_SRAM_ACE1_SIZE_V)<<(SYSCON_SRAM_ACE1_SIZE_S))
|
||||
#define SYSCON_SRAM_ACE1_SIZE_V 0xFFFF
|
||||
#define SYSCON_SRAM_ACE1_SIZE_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE2_SIZE_REG (DR_REG_SYSCON_BASE + 0x80)
|
||||
|
||||
/* SYSCON_SRAM_ACE2_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE2_SIZE 0x0000FFFF
|
||||
#define SYSCON_SRAM_ACE2_SIZE_M ((SYSCON_SRAM_ACE2_SIZE_V)<<(SYSCON_SRAM_ACE2_SIZE_S))
|
||||
#define SYSCON_SRAM_ACE2_SIZE_V 0xFFFF
|
||||
#define SYSCON_SRAM_ACE2_SIZE_S 0
|
||||
|
||||
#define SYSCON_SRAM_ACE3_SIZE_REG (DR_REG_SYSCON_BASE + 0x84)
|
||||
|
||||
/* SYSCON_SRAM_ACE3_SIZE : R/W ;bitpos:[15:0] ;default: 16'h1000 ; */
|
||||
|
||||
#define SYSCON_SRAM_ACE3_SIZE 0x0000FFFF
|
||||
#define SYSCON_SRAM_ACE3_SIZE_M ((SYSCON_SRAM_ACE3_SIZE_V)<<(SYSCON_SRAM_ACE3_SIZE_S))
|
||||
#define SYSCON_SRAM_ACE3_SIZE_V 0xFFFF
|
||||
#define SYSCON_SRAM_ACE3_SIZE_S 0
|
||||
|
||||
#define SYSCON_SPI_MEM_PMS_CTRL_REG (DR_REG_SYSCON_BASE + 0x88)
|
||||
|
||||
/* SYSCON_SPI_MEM_REJECT_CDE : RO ;bitpos:[6:2] ;default: 5'h0 ; */
|
||||
|
||||
#define SYSCON_SPI_MEM_REJECT_CDE 0x0000001F
|
||||
#define SYSCON_SPI_MEM_REJECT_CDE_M ((SYSCON_SPI_MEM_REJECT_CDE_V)<<(SYSCON_SPI_MEM_REJECT_CDE_S))
|
||||
#define SYSCON_SPI_MEM_REJECT_CDE_V 0x1F
|
||||
#define SYSCON_SPI_MEM_REJECT_CDE_S 2
|
||||
|
||||
/* SYSCON_SPI_MEM_REJECT_CLR : WOD ;bitpos:[1] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_SPI_MEM_REJECT_CLR (BIT(1))
|
||||
#define SYSCON_SPI_MEM_REJECT_CLR_M (BIT(1))
|
||||
#define SYSCON_SPI_MEM_REJECT_CLR_V 0x1
|
||||
#define SYSCON_SPI_MEM_REJECT_CLR_S 1
|
||||
|
||||
/* SYSCON_SPI_MEM_REJECT_INT : RO ;bitpos:[0] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_SPI_MEM_REJECT_INT (BIT(0))
|
||||
#define SYSCON_SPI_MEM_REJECT_INT_M (BIT(0))
|
||||
#define SYSCON_SPI_MEM_REJECT_INT_V 0x1
|
||||
#define SYSCON_SPI_MEM_REJECT_INT_S 0
|
||||
|
||||
#define SYSCON_SPI_MEM_REJECT_ADDR_REG (DR_REG_SYSCON_BASE + 0x8C)
|
||||
|
||||
/* SYSCON_SPI_MEM_REJECT_ADDR : RO ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
||||
#define SYSCON_SPI_MEM_REJECT_ADDR 0xFFFFFFFF
|
||||
#define SYSCON_SPI_MEM_REJECT_ADDR_M ((SYSCON_SPI_MEM_REJECT_ADDR_V)<<(SYSCON_SPI_MEM_REJECT_ADDR_S))
|
||||
#define SYSCON_SPI_MEM_REJECT_ADDR_V 0xFFFFFFFF
|
||||
#define SYSCON_SPI_MEM_REJECT_ADDR_S 0
|
||||
|
||||
#define SYSCON_SDIO_CTRL_REG (DR_REG_SYSCON_BASE + 0x90)
|
||||
|
||||
/* SYSCON_SDIO_WIN_ACCESS_EN : R/W ;bitpos:[0] ;default: 1'h0 ; */
|
||||
|
||||
#define SYSCON_SDIO_WIN_ACCESS_EN (BIT(0))
|
||||
#define SYSCON_SDIO_WIN_ACCESS_EN_M (BIT(0))
|
||||
#define SYSCON_SDIO_WIN_ACCESS_EN_V 0x1
|
||||
#define SYSCON_SDIO_WIN_ACCESS_EN_S 0
|
||||
|
||||
#define SYSCON_REDCY_SIG0_REG (DR_REG_SYSCON_BASE + 0x94)
|
||||
|
||||
/* SYSCON_REDCY_ANDOR : RO ;bitpos:[31] ;default: 1'h0 ; */
|
||||
|
||||
#define SYSCON_REDCY_ANDOR (BIT(31))
|
||||
#define SYSCON_REDCY_ANDOR_M (BIT(31))
|
||||
#define SYSCON_REDCY_ANDOR_V 0x1
|
||||
#define SYSCON_REDCY_ANDOR_S 31
|
||||
|
||||
/* SYSCON_REDCY_SIG0 : R/W ;bitpos:[30:0] ;default: 31'h0 ; */
|
||||
|
||||
#define SYSCON_REDCY_SIG0 0x7FFFFFFF
|
||||
#define SYSCON_REDCY_SIG0_M ((SYSCON_REDCY_SIG0_V)<<(SYSCON_REDCY_SIG0_S))
|
||||
#define SYSCON_REDCY_SIG0_V 0x7FFFFFFF
|
||||
#define SYSCON_REDCY_SIG0_S 0
|
||||
|
||||
#define SYSCON_REDCY_SIG1_REG (DR_REG_SYSCON_BASE + 0x98)
|
||||
|
||||
/* SYSCON_REDCY_NANDOR : RO ;bitpos:[31] ;default: 1'h0 ; */
|
||||
|
||||
#define SYSCON_REDCY_NANDOR (BIT(31))
|
||||
#define SYSCON_REDCY_NANDOR_M (BIT(31))
|
||||
#define SYSCON_REDCY_NANDOR_V 0x1
|
||||
#define SYSCON_REDCY_NANDOR_S 31
|
||||
|
||||
/* SYSCON_REDCY_SIG1 : R/W ;bitpos:[30:0] ;default: 31'h0 ; */
|
||||
|
||||
#define SYSCON_REDCY_SIG1 0x7FFFFFFF
|
||||
#define SYSCON_REDCY_SIG1_M ((SYSCON_REDCY_SIG1_V)<<(SYSCON_REDCY_SIG1_S))
|
||||
#define SYSCON_REDCY_SIG1_V 0x7FFFFFFF
|
||||
#define SYSCON_REDCY_SIG1_S 0
|
||||
|
||||
#define SYSCON_FRONT_END_MEM_PD_REG (DR_REG_SYSCON_BASE + 0x9C)
|
||||
|
||||
/* SYSCON_FREQ_MEM_FORCE_PD : R/W ;bitpos:[7] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_FREQ_MEM_FORCE_PD (BIT(7))
|
||||
#define SYSCON_FREQ_MEM_FORCE_PD_M (BIT(7))
|
||||
#define SYSCON_FREQ_MEM_FORCE_PD_V 0x1
|
||||
#define SYSCON_FREQ_MEM_FORCE_PD_S 7
|
||||
|
||||
/* SYSCON_FREQ_MEM_FORCE_PU : R/W ;bitpos:[6] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_FREQ_MEM_FORCE_PU (BIT(6))
|
||||
#define SYSCON_FREQ_MEM_FORCE_PU_M (BIT(6))
|
||||
#define SYSCON_FREQ_MEM_FORCE_PU_V 0x1
|
||||
#define SYSCON_FREQ_MEM_FORCE_PU_S 6
|
||||
|
||||
/* SYSCON_DC_MEM_FORCE_PD : R/W ;bitpos:[5] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_DC_MEM_FORCE_PD (BIT(5))
|
||||
#define SYSCON_DC_MEM_FORCE_PD_M (BIT(5))
|
||||
#define SYSCON_DC_MEM_FORCE_PD_V 0x1
|
||||
#define SYSCON_DC_MEM_FORCE_PD_S 5
|
||||
|
||||
/* SYSCON_DC_MEM_FORCE_PU : R/W ;bitpos:[4] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_DC_MEM_FORCE_PU (BIT(4))
|
||||
#define SYSCON_DC_MEM_FORCE_PU_M (BIT(4))
|
||||
#define SYSCON_DC_MEM_FORCE_PU_V 0x1
|
||||
#define SYSCON_DC_MEM_FORCE_PU_S 4
|
||||
|
||||
/* SYSCON_PBUS_MEM_FORCE_PD : R/W ;bitpos:[3] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_PBUS_MEM_FORCE_PD (BIT(3))
|
||||
#define SYSCON_PBUS_MEM_FORCE_PD_M (BIT(3))
|
||||
#define SYSCON_PBUS_MEM_FORCE_PD_V 0x1
|
||||
#define SYSCON_PBUS_MEM_FORCE_PD_S 3
|
||||
|
||||
/* SYSCON_PBUS_MEM_FORCE_PU : R/W ;bitpos:[2] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_PBUS_MEM_FORCE_PU (BIT(2))
|
||||
#define SYSCON_PBUS_MEM_FORCE_PU_M (BIT(2))
|
||||
#define SYSCON_PBUS_MEM_FORCE_PU_V 0x1
|
||||
#define SYSCON_PBUS_MEM_FORCE_PU_S 2
|
||||
|
||||
/* SYSCON_AGC_MEM_FORCE_PD : R/W ;bitpos:[1] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_AGC_MEM_FORCE_PD (BIT(1))
|
||||
#define SYSCON_AGC_MEM_FORCE_PD_M (BIT(1))
|
||||
#define SYSCON_AGC_MEM_FORCE_PD_V 0x1
|
||||
#define SYSCON_AGC_MEM_FORCE_PD_S 1
|
||||
|
||||
/* SYSCON_AGC_MEM_FORCE_PU : R/W ;bitpos:[0] ;default: 1'b1 ; */
|
||||
|
||||
#define SYSCON_AGC_MEM_FORCE_PU (BIT(0))
|
||||
#define SYSCON_AGC_MEM_FORCE_PU_M (BIT(0))
|
||||
#define SYSCON_AGC_MEM_FORCE_PU_V 0x1
|
||||
#define SYSCON_AGC_MEM_FORCE_PU_S 0
|
||||
|
||||
#define SYSCON_SPI_MEM_ECC_CTRL_REG (DR_REG_SYSCON_BASE + 0xA0)
|
||||
|
||||
/* SYSCON_SRAM_PAGE_SIZE : R/W ;bitpos:[21:20] ;default: 2'd2 ;
|
||||
* Set the page size of the used MSPI external RAM.
|
||||
* 0: 256 bytes. 1: 512 bytes. 2: 1024 bytes. 3: 2048 bytes.
|
||||
*/
|
||||
|
||||
#define SYSCON_SRAM_PAGE_SIZE 0x00000003
|
||||
#define SYSCON_SRAM_PAGE_SIZE_M ((SYSCON_SRAM_PAGE_SIZE_V)<<(SYSCON_SRAM_PAGE_SIZE_S))
|
||||
#define SYSCON_SRAM_PAGE_SIZE_V 0x3
|
||||
#define SYSCON_SRAM_PAGE_SIZE_S 20
|
||||
|
||||
/* SYSCON_FLASH_PAGE_SIZE : R/W ;bitpos:[19:18] ;default: 2'd0 ;
|
||||
* Set the page size of the used MSPI flash. 0: 256 bytes. 1: 512 bytes.
|
||||
* 2: 1024 bytes. 3: 2048 bytes.
|
||||
*/
|
||||
|
||||
#define SYSCON_FLASH_PAGE_SIZE 0x00000003
|
||||
#define SYSCON_FLASH_PAGE_SIZE_M ((SYSCON_FLASH_PAGE_SIZE_V)<<(SYSCON_FLASH_PAGE_SIZE_S))
|
||||
#define SYSCON_FLASH_PAGE_SIZE_V 0x3
|
||||
#define SYSCON_FLASH_PAGE_SIZE_S 18
|
||||
|
||||
#define SYSCON_CLKGATE_FORCE_ON_REG (DR_REG_SYSCON_BASE + 0xA8)
|
||||
|
||||
/* SYSCON_SRAM_CLKGATE_FORCE_ON : R/W ;bitpos:[13:3] ;default: ~11'b0 ; */
|
||||
|
||||
#define SYSCON_SRAM_CLKGATE_FORCE_ON 0x000007FF
|
||||
#define SYSCON_SRAM_CLKGATE_FORCE_ON_M ((SYSCON_SRAM_CLKGATE_FORCE_ON_V)<<(SYSCON_SRAM_CLKGATE_FORCE_ON_S))
|
||||
#define SYSCON_SRAM_CLKGATE_FORCE_ON_V 0x7FF
|
||||
#define SYSCON_SRAM_CLKGATE_FORCE_ON_S 3
|
||||
|
||||
/* SYSCON_ROM_CLKGATE_FORCE_ON : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
|
||||
|
||||
#define SYSCON_ROM_CLKGATE_FORCE_ON 0x00000007
|
||||
#define SYSCON_ROM_CLKGATE_FORCE_ON_M ((SYSCON_ROM_CLKGATE_FORCE_ON_V)<<(SYSCON_ROM_CLKGATE_FORCE_ON_S))
|
||||
#define SYSCON_ROM_CLKGATE_FORCE_ON_V 0x7
|
||||
#define SYSCON_ROM_CLKGATE_FORCE_ON_S 0
|
||||
|
||||
#define SYSCON_MEM_POWER_DOWN_REG (DR_REG_SYSCON_BASE + 0xAC)
|
||||
|
||||
/* SYSCON_SRAM_POWER_DOWN : R/W ;bitpos:[13:3] ;default: 11'b0 ; */
|
||||
|
||||
#define SYSCON_SRAM_POWER_DOWN 0x000007FF
|
||||
#define SYSCON_SRAM_POWER_DOWN_M ((SYSCON_SRAM_POWER_DOWN_V)<<(SYSCON_SRAM_POWER_DOWN_S))
|
||||
#define SYSCON_SRAM_POWER_DOWN_V 0x7FF
|
||||
#define SYSCON_SRAM_POWER_DOWN_S 3
|
||||
|
||||
/* SYSCON_ROM_POWER_DOWN : R/W ;bitpos:[2:0] ;default: 3'b0 ; */
|
||||
|
||||
#define SYSCON_ROM_POWER_DOWN 0x00000007
|
||||
#define SYSCON_ROM_POWER_DOWN_M ((SYSCON_ROM_POWER_DOWN_V)<<(SYSCON_ROM_POWER_DOWN_S))
|
||||
#define SYSCON_ROM_POWER_DOWN_V 0x7
|
||||
#define SYSCON_ROM_POWER_DOWN_S 0
|
||||
|
||||
#define SYSCON_MEM_POWER_UP_REG (DR_REG_SYSCON_BASE + 0xB0)
|
||||
|
||||
/* SYSCON_SRAM_POWER_UP : R/W ;bitpos:[13:3] ;default: ~11'b0 ; */
|
||||
|
||||
#define SYSCON_SRAM_POWER_UP 0x000007FF
|
||||
#define SYSCON_SRAM_POWER_UP_M ((SYSCON_SRAM_POWER_UP_V)<<(SYSCON_SRAM_POWER_UP_S))
|
||||
#define SYSCON_SRAM_POWER_UP_V 0x7FF
|
||||
#define SYSCON_SRAM_POWER_UP_S 3
|
||||
|
||||
/* SYSCON_ROM_POWER_UP : R/W ;bitpos:[2:0] ;default: ~3'b0 ; */
|
||||
|
||||
#define SYSCON_ROM_POWER_UP 0x00000007
|
||||
#define SYSCON_ROM_POWER_UP_M ((SYSCON_ROM_POWER_UP_V)<<(SYSCON_ROM_POWER_UP_S))
|
||||
#define SYSCON_ROM_POWER_UP_V 0x7
|
||||
#define SYSCON_ROM_POWER_UP_S 0
|
||||
|
||||
#define SYSCON_RETENTION_CTRL_REG (DR_REG_SYSCON_BASE + 0xB4)
|
||||
|
||||
/* SYSCON_NOBYPASS_CPU_ISO_RST : R/W ;bitpos:[27] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_NOBYPASS_CPU_ISO_RST (BIT(27))
|
||||
#define SYSCON_NOBYPASS_CPU_ISO_RST_M (BIT(27))
|
||||
#define SYSCON_NOBYPASS_CPU_ISO_RST_V 0x1
|
||||
#define SYSCON_NOBYPASS_CPU_ISO_RST_S 27
|
||||
|
||||
/* SYSCON_RETENTION_CPU_LINK_ADDR : R/W ;bitpos:[26:0] ;default: 27'd0 ; */
|
||||
|
||||
#define SYSCON_RETENTION_CPU_LINK_ADDR 0x07FFFFFF
|
||||
#define SYSCON_RETENTION_CPU_LINK_ADDR_M ((SYSCON_RETENTION_CPU_LINK_ADDR_V)<<(SYSCON_RETENTION_CPU_LINK_ADDR_S))
|
||||
#define SYSCON_RETENTION_CPU_LINK_ADDR_V 0x7FFFFFF
|
||||
#define SYSCON_RETENTION_CPU_LINK_ADDR_S 0
|
||||
|
||||
#define SYSCON_RETENTION_CTRL1_REG (DR_REG_SYSCON_BASE + 0xB8)
|
||||
|
||||
/* SYSCON_RETENTION_TAG_LINK_ADDR : R/W ;bitpos:[26:0] ;default: 27'd0 ; */
|
||||
|
||||
#define SYSCON_RETENTION_TAG_LINK_ADDR 0x07FFFFFF
|
||||
#define SYSCON_RETENTION_TAG_LINK_ADDR_M ((SYSCON_RETENTION_TAG_LINK_ADDR_V)<<(SYSCON_RETENTION_TAG_LINK_ADDR_S))
|
||||
#define SYSCON_RETENTION_TAG_LINK_ADDR_V 0x7FFFFFF
|
||||
#define SYSCON_RETENTION_TAG_LINK_ADDR_S 0
|
||||
|
||||
#define SYSCON_RETENTION_CTRL2_REG (DR_REG_SYSCON_BASE + 0xBC)
|
||||
|
||||
/* SYSCON_RET_ICACHE_ENABLE : R/W ;bitpos:[31] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_RET_ICACHE_ENABLE (BIT(31))
|
||||
#define SYSCON_RET_ICACHE_ENABLE_M (BIT(31))
|
||||
#define SYSCON_RET_ICACHE_ENABLE_V 0x1
|
||||
#define SYSCON_RET_ICACHE_ENABLE_S 31
|
||||
|
||||
/* SYSCON_RET_ICACHE_START_POINT : R/W ;bitpos:[29:22] ;default: 8'd0 ; */
|
||||
|
||||
#define SYSCON_RET_ICACHE_START_POINT 0x000000FF
|
||||
#define SYSCON_RET_ICACHE_START_POINT_M ((SYSCON_RET_ICACHE_START_POINT_V)<<(SYSCON_RET_ICACHE_START_POINT_S))
|
||||
#define SYSCON_RET_ICACHE_START_POINT_V 0xFF
|
||||
#define SYSCON_RET_ICACHE_START_POINT_S 22
|
||||
|
||||
/* SYSCON_RET_ICACHE_VLD_SIZE : R/W ;bitpos:[20:13] ;default: 8'hff ; */
|
||||
|
||||
#define SYSCON_RET_ICACHE_VLD_SIZE 0x000000FF
|
||||
#define SYSCON_RET_ICACHE_VLD_SIZE_M ((SYSCON_RET_ICACHE_VLD_SIZE_V)<<(SYSCON_RET_ICACHE_VLD_SIZE_S))
|
||||
#define SYSCON_RET_ICACHE_VLD_SIZE_V 0xFF
|
||||
#define SYSCON_RET_ICACHE_VLD_SIZE_S 13
|
||||
|
||||
/* SYSCON_RET_ICACHE_SIZE : R/W ;bitpos:[11:4] ;default: 8'hff ; */
|
||||
|
||||
#define SYSCON_RET_ICACHE_SIZE 0x000000FF
|
||||
#define SYSCON_RET_ICACHE_SIZE_M ((SYSCON_RET_ICACHE_SIZE_V)<<(SYSCON_RET_ICACHE_SIZE_S))
|
||||
#define SYSCON_RET_ICACHE_SIZE_V 0xFF
|
||||
#define SYSCON_RET_ICACHE_SIZE_S 4
|
||||
|
||||
#define SYSCON_RETENTION_CTRL3_REG (DR_REG_SYSCON_BASE + 0xC0)
|
||||
|
||||
/* SYSCON_RET_DCACHE_ENABLE : R/W ;bitpos:[31] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_RET_DCACHE_ENABLE (BIT(31))
|
||||
#define SYSCON_RET_DCACHE_ENABLE_M (BIT(31))
|
||||
#define SYSCON_RET_DCACHE_ENABLE_V 0x1
|
||||
#define SYSCON_RET_DCACHE_ENABLE_S 31
|
||||
|
||||
/* SYSCON_RET_DCACHE_START_POINT : R/W ;bitpos:[30:22] ;default: 9'd0 ; */
|
||||
|
||||
#define SYSCON_RET_DCACHE_START_POINT 0x000001FF
|
||||
#define SYSCON_RET_DCACHE_START_POINT_M ((SYSCON_RET_DCACHE_START_POINT_V)<<(SYSCON_RET_DCACHE_START_POINT_S))
|
||||
#define SYSCON_RET_DCACHE_START_POINT_V 0x1FF
|
||||
#define SYSCON_RET_DCACHE_START_POINT_S 22
|
||||
|
||||
/* SYSCON_RET_DCACHE_VLD_SIZE : R/W ;bitpos:[21:13] ;default: 9'h1ff ; */
|
||||
|
||||
#define SYSCON_RET_DCACHE_VLD_SIZE 0x000001FF
|
||||
#define SYSCON_RET_DCACHE_VLD_SIZE_M ((SYSCON_RET_DCACHE_VLD_SIZE_V)<<(SYSCON_RET_DCACHE_VLD_SIZE_S))
|
||||
#define SYSCON_RET_DCACHE_VLD_SIZE_V 0x1FF
|
||||
#define SYSCON_RET_DCACHE_VLD_SIZE_S 13
|
||||
|
||||
/* SYSCON_RET_DCACHE_SIZE : R/W ;bitpos:[12:4] ;default: 9'h1ff ; */
|
||||
|
||||
#define SYSCON_RET_DCACHE_SIZE 0x000001FF
|
||||
#define SYSCON_RET_DCACHE_SIZE_M ((SYSCON_RET_DCACHE_SIZE_V)<<(SYSCON_RET_DCACHE_SIZE_S))
|
||||
#define SYSCON_RET_DCACHE_SIZE_V 0x1FF
|
||||
#define SYSCON_RET_DCACHE_SIZE_S 4
|
||||
|
||||
#define SYSCON_RETENTION_CTRL4_REG (DR_REG_SYSCON_BASE + 0xC4)
|
||||
|
||||
/* SYSCON_RETENTION_INV_CFG : R/W ;bitpos:[31:0] ;default: ~32'h0 ; */
|
||||
|
||||
#define SYSCON_RETENTION_INV_CFG 0xFFFFFFFF
|
||||
#define SYSCON_RETENTION_INV_CFG_M ((SYSCON_RETENTION_INV_CFG_V)<<(SYSCON_RETENTION_INV_CFG_S))
|
||||
#define SYSCON_RETENTION_INV_CFG_V 0xFFFFFFFF
|
||||
#define SYSCON_RETENTION_INV_CFG_S 0
|
||||
|
||||
#define SYSCON_RETENTION_CTRL5_REG (DR_REG_SYSCON_BASE + 0xC8)
|
||||
|
||||
/* SYSCON_RETENTION_DISABLE : R/W ;bitpos:[0] ;default: 1'b0 ; */
|
||||
|
||||
#define SYSCON_RETENTION_DISABLE (BIT(0))
|
||||
#define SYSCON_RETENTION_DISABLE_M (BIT(0))
|
||||
#define SYSCON_RETENTION_DISABLE_V 0x1
|
||||
#define SYSCON_RETENTION_DISABLE_S 0
|
||||
|
||||
#define SYSCON_DATE_REG (DR_REG_SYSCON_BASE + 0x3FC)
|
||||
|
||||
/* SYSCON_DATE : R/W ;bitpos:[31:0] ;default: 32'h2101150 ;
|
||||
* Version control.
|
||||
*/
|
||||
|
||||
#define SYSCON_DATE 0xFFFFFFFF
|
||||
#define SYSCON_DATE_M ((SYSCON_DATE_V)<<(SYSCON_DATE_S))
|
||||
#define SYSCON_DATE_V 0xFFFFFFFF
|
||||
#define SYSCON_DATE_S 0
|
||||
|
||||
#endif /* __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_SYSCON_H */
|
||||
73
boards/xtensa/esp32s3/common/include/esp32s3_board_wlan.h
Normal file
73
boards/xtensa/esp32s3/common/include/esp32s3_board_wlan.h
Normal file
@ -0,0 +1,73 @@
|
||||
/****************************************************************************
|
||||
* boards/xtensa/esp32s3/common/include/esp32s3_board_wlan.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_XTENSA_ESP32S3_COMMON_INCLUDE_ESP32S3_BOARD_WLAN_H
|
||||
#define __BOARDS_XTENSA_ESP32S3_COMMON_INCLUDE_ESP32S3_BOARD_WLAN_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_wlan_init
|
||||
*
|
||||
* Description:
|
||||
* Configure the wireless subsystem.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; A negated errno value is returned
|
||||
* to indicate the nature of any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_wlan_init(void);
|
||||
|
||||
#endif /* CONFIG_ESP32S3_WIFI */
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_XTENSA_ESP32S3_COMMON_INCLUDE_ESP32S3_BOARD_WLAN_H */
|
||||
@ -18,6 +18,8 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Default entry point: */
|
||||
|
||||
ENTRY(__start);
|
||||
@ -74,6 +76,13 @@ SECTIONS
|
||||
|
||||
*(.iram1 .iram1.*)
|
||||
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
*(.phyiram .phyiram.*)
|
||||
|
||||
/* align + add 16B for CPU dummy speculative instr. fetch */
|
||||
|
||||
. = ALIGN(4) + 16;
|
||||
@ -148,6 +157,8 @@ SECTIONS
|
||||
KEEP (*(.jcr))
|
||||
*(.dram1 .dram1.*)
|
||||
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
|
||||
_edata = ABSOLUTE(.);
|
||||
. = ALIGN(4);
|
||||
|
||||
@ -204,6 +215,13 @@ SECTIONS
|
||||
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
#ifdef CONFIG_ESP32S3_WIRELESS
|
||||
*(.rodata_wlog_verbose.*)
|
||||
*(.rodata_wlog_debug.*)
|
||||
*(.rodata_wlog_info.*)
|
||||
*(.rodata_wlog_warning.*)
|
||||
*(.rodata_wlog_error.*)
|
||||
#endif
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
|
||||
@ -32,6 +32,10 @@ ifeq ($(CONFIG_ESP32S3_SPIFLASH),y)
|
||||
CSRCS += esp32s3_board_spiflash.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ESP32S3_WIFI),y)
|
||||
CSRCS += esp32s3_board_wlan.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_I2C_DRIVER),y)
|
||||
CSRCS += esp32s3_board_i2c.c
|
||||
endif
|
||||
|
||||
@ -46,6 +46,16 @@
|
||||
#include "esp32s3_spiflash_mtd.h"
|
||||
#include "esp32s3-devkit.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI_MTD_ENCRYPT
|
||||
# define WIFI_ENCRYPT true
|
||||
#else
|
||||
# define WIFI_ENCRYPT false
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
@ -245,6 +255,72 @@ static int setup_nxffs(struct mtd_dev_s *mtd, const char *mnt_pt)
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: init_wifi_partition
|
||||
*
|
||||
* Description:
|
||||
* Initialize partition that is dedicated to Wi-Fi.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI_SAVE_PARAM
|
||||
static int init_wifi_partition(void)
|
||||
{
|
||||
int ret = OK;
|
||||
struct mtd_dev_s *mtd;
|
||||
|
||||
mtd = esp32s3_spiflash_alloc_mtdpart(CONFIG_ESP32S3_WIFI_MTD_OFFSET,
|
||||
CONFIG_ESP32S3_WIFI_MTD_SIZE,
|
||||
WIFI_ENCRYPT);
|
||||
if (!mtd)
|
||||
{
|
||||
ferr("Failed to alloc MTD partition of SPI Flash\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
#if defined (CONFIG_ESP32S3_SPIFLASH_SMARTFS)
|
||||
|
||||
ret = setup_smartfs(1, mtd, CONFIG_ESP32S3_WIFI_FS_MOUNTPT);
|
||||
if (ret < 0)
|
||||
{
|
||||
ferr("Failed to setup smartfs\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_ESP32S3_SPIFLASH_LITTLEFS)
|
||||
|
||||
const char *path = "/dev/mtdblock1";
|
||||
ret = setup_littlefs(path, mtd, CONFIG_ESP32S3_WIFI_FS_MOUNTPT, 0777);
|
||||
if (ret < 0)
|
||||
{
|
||||
ferr("Failed to setup littlefs\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_ESP32S3_SPIFLASH_SPIFFS)
|
||||
|
||||
const char *path = "/dev/mtdblock1";
|
||||
ret = setup_spiffs(path, mtd, CONFIG_ESP32S3_WIFI_FS_MOUNTPT, 0777);
|
||||
if (ret < 0)
|
||||
{
|
||||
ferr("Failed to setup spiffs\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
ferr("No supported FS selected. Wi-Fi partition "
|
||||
"should be mounted before Wi-Fi initialization\n");
|
||||
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: init_storage_partition
|
||||
*
|
||||
@ -344,6 +420,14 @@ int board_spiflash_init(void)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI_SAVE_PARAM
|
||||
ret = init_wifi_partition();
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
ret = init_storage_partition();
|
||||
if (ret < 0)
|
||||
{
|
||||
|
||||
73
boards/xtensa/esp32s3/common/src/esp32s3_board_wlan.c
Normal file
73
boards/xtensa/esp32s3/common/src/esp32s3_board_wlan.c
Normal file
@ -0,0 +1,73 @@
|
||||
/****************************************************************************
|
||||
* boards/xtensa/esp32s3/common/src/esp32s3_board_wlan.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdio.h>
|
||||
#include <fcntl.h>
|
||||
#include <unistd.h>
|
||||
#include <sys/stat.h>
|
||||
#include <syslog.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/wireless/wireless.h>
|
||||
|
||||
#include "esp32s3_spiflash.h"
|
||||
#include "esp32s3_wlan.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_wlan_init
|
||||
*
|
||||
* Description:
|
||||
* Configure the wireless subsystem.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; A negated errno value is returned
|
||||
* to indicate the nature of any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_wlan_init(void)
|
||||
{
|
||||
int ret = OK;
|
||||
|
||||
#ifdef ESP32S3_WLAN_HAS_STA
|
||||
ret = esp32s3_wlan_sta_initialize();
|
||||
if (ret)
|
||||
{
|
||||
wlerr("ERROR: Failed to initialize Wi-Fi station\n");
|
||||
return ret;
|
||||
}
|
||||
#endif /* ESP32S3_WLAN_HAS_STA */
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
83
boards/xtensa/esp32s3/esp32s3-devkit/configs/wapi/defconfig
Normal file
83
boards/xtensa/esp32s3/esp32s3-devkit/configs/wapi/defconfig
Normal file
@ -0,0 +1,83 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_ARCH_LEDS is not set
|
||||
# CONFIG_NDEBUG is not set
|
||||
# CONFIG_NSH_ARGCAT is not set
|
||||
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
|
||||
CONFIG_ALLOW_BSD_COMPONENTS=y
|
||||
CONFIG_ARCH="xtensa"
|
||||
CONFIG_ARCH_BOARD="esp32s3-devkit"
|
||||
CONFIG_ARCH_BOARD_COMMON=y
|
||||
CONFIG_ARCH_BOARD_ESP32S3_DEVKIT=y
|
||||
CONFIG_ARCH_CHIP="esp32s3"
|
||||
CONFIG_ARCH_CHIP_ESP32S3=y
|
||||
CONFIG_ARCH_CHIP_ESP32S3WROOM1=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARCH_XTENSA=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16717
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEFAULT_TASK_STACKSIZE=4096
|
||||
CONFIG_DRIVERS_IEEE80211=y
|
||||
CONFIG_DRIVERS_WIRELESS=y
|
||||
CONFIG_ESP32S3_RT_TIMER_TASK_STACK_SIZE=4096
|
||||
CONFIG_ESP32S3_SPIFLASH=y
|
||||
CONFIG_ESP32S3_SPIFLASH_SPIFFS=y
|
||||
CONFIG_ESP32S3_UART0=y
|
||||
CONFIG_ESP32S3_WIFI=y
|
||||
CONFIG_ESP32S3_WIFI_SAVE_PARAM=y
|
||||
CONFIG_EXAMPLES_RANDOM=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=3072
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_INIT_STACKSIZE=8192
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_IOB_NBUFFERS=124
|
||||
CONFIG_IOB_THROTTLE=24
|
||||
CONFIG_NAME_MAX=48
|
||||
CONFIG_NETDB_DNSCLIENT=y
|
||||
CONFIG_NETDEV_LATEINIT=y
|
||||
CONFIG_NETDEV_PHY_IOCTL=y
|
||||
CONFIG_NETDEV_WIRELESS_IOCTL=y
|
||||
CONFIG_NETUTILS_IPERF=y
|
||||
CONFIG_NET_BROADCAST=y
|
||||
CONFIG_NET_ETH_PKTSIZE=1514
|
||||
CONFIG_NET_ICMP=y
|
||||
CONFIG_NET_ICMP_SOCKET=y
|
||||
CONFIG_NET_TCP=y
|
||||
CONFIG_NET_TCP_DELAYED_ACK=y
|
||||
CONFIG_NET_TCP_WRITE_BUFFERS=y
|
||||
CONFIG_NET_UDP=y
|
||||
CONFIG_NET_UDP_WRITE_BUFFERS=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=2048
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_PTHREAD_MUTEX_TYPES=y
|
||||
CONFIG_RAM_SIZE=114688
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_LPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SIG_DEFAULT=y
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
CONFIG_START_YEAR=2011
|
||||
CONFIG_SYSTEM_DHCPC_RENEW=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_SYSTEM_PING=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_TLS_TASK_NELEM=4
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WIRELESS=y
|
||||
CONFIG_WIRELESS_WAPI=y
|
||||
CONFIG_WIRELESS_WAPI_CMDTOOL=y
|
||||
CONFIG_WIRELESS_WAPI_STACKSIZE=8192
|
||||
@ -42,6 +42,10 @@
|
||||
# include "esp32s3_board_tim.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
# include "esp32s3_board_wlan.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_RT_TIMER
|
||||
# include "esp32s3_rt_timer.h"
|
||||
#endif
|
||||
@ -206,6 +210,15 @@ int esp32s3_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI
|
||||
ret = board_wlan_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIDEO_FB
|
||||
ret = fb_register(0, 0);
|
||||
if (ret < 0)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user