Add code changes from Uros
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3507 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
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c5118a85cf
commit
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Load Diff
@ -1,6 +1,6 @@
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unsigned char romfs_img[] = {
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0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x02, 0x00,
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0x95, 0x7e, 0x5e, 0x1a, 0x4e, 0x53, 0x48, 0x49, 0x6e, 0x69, 0x74, 0x56,
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0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x02, 0x10,
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0xad, 0x5b, 0x65, 0xae, 0x4e, 0x53, 0x48, 0x49, 0x6e, 0x69, 0x74, 0x56,
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0x6f, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49,
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0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x97,
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0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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@ -15,34 +15,34 @@ unsigned char romfs_img[] = {
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x60,
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0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xfe, 0xe0, 0x2e, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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@ -1,4 +1,4 @@
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echo "VSN NuttX 6.1, www.netClamps.com"
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echo "Versatile Sensor Node V1.2, www.netClamps.com"
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# Create a RAMDISK and mount it at XXXRDMOUNTPOUNTXXX
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#mkrd -m XXXMKRDMINORXXX -s XXMKRDSECTORSIZEXXX XXMKRDBLOCKSXXX
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@ -69,6 +69,9 @@ CONFIGURED_APPS += vsn/ramtron
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# Provide UNIX style free
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CONFIGURED_APPS += vsn/free
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# Provide System Information Utilityu
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CONFIGURED_APPS += vsn/sysinfo
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# Provide JAVA Virtual Machine (the Darjeeling JVM)
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#CONFIGURED_APPS += vsn/jvm
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@ -161,8 +161,9 @@ CONFIG_STM32_I2C1=y
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CONFIG_STM32_I2C2=y
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CONFIG_STM32_USB=n
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CONFIG_STM32_CAN=n
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CONFIG_STM32_BKP=n
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CONFIG_STM32_PWR=n
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# Note that in order to enable RTC, BKP and PWR must be enabled
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CONFIG_STM32_BKP=y
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CONFIG_STM32_PWR=y
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CONFIG_STM32_DAC=n
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# APB2:
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CONFIG_STM32_ADC1=n
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@ -253,6 +254,11 @@ CONFIG_SSI_POLLWAIT=y
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#
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CONFIG_I2C=y
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#
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# OS support for hardware RTC
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#
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CONFIG_RTC=y
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#
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# General build options
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#
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@ -870,3 +876,11 @@ CONFIG_APPS_DIR="../apps"
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# Provide /dev/ramX and then: mount -t binfs /dev/ram0 /bin
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CONFIG_APPS_BINDIR=y
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# Application configuration
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CONFIG_APPS_DIR="../apps"
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# Application configuration
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CONFIG_APPS_DIR="../apps"
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@ -70,8 +70,13 @@
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#include <nuttx/config.h>
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#include <nuttx/fs.h>
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#include <nuttx/i2c/i2c.h>
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#include <semaphore.h>
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#include <nuttx/clock.h>
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#include <nuttx/time.h>
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#include <nuttx/rtc.h>
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#include <nuttx/i2c/i2c.h>
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#include <nuttx/i2c/st_lis331dl.h>
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#include <stdio.h>
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#include <stdlib.h>
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@ -80,7 +85,7 @@
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#include <errno.h>
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#include "vsn.h"
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#include <nuttx/i2c/st_lis331dl.h>
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/****************************************************************************
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@ -297,10 +302,7 @@ int sif_anout_init(void)
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{
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vsn_sif.tim3 = stm32_tim_init(3);
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vsn_sif.tim8 = stm32_tim_init(8);
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vsn_sif.i2c1 = up_i2cinitialize(1);
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vsn_sif.i2c2 = up_i2cinitialize(2);
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if (!vsn_sif.tim3 || !vsn_sif.tim8) return ERROR;
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// Use the TIM3 as PWM modulated analogue output
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@ -318,12 +320,15 @@ int sif_anout_init(void)
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STM32_TIM_ENABLEINT(vsn_sif.tim8, 0);
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STM32_TIM_SETPERIOD(vsn_sif.tim8, 4096);
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, 0);
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, 5000);
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STM32_TIM_SETCLOCK(vsn_sif.tim8, 36e6);
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STM32_TIM_SETMODE(vsn_sif.tim8, STM32_TIM_MODE_UP);
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STM32_TIM_SETCHANNEL(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
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vsn_sif.i2c1 = up_i2cinitialize(1);
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vsn_sif.i2c2 = up_i2cinitialize(2);
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return OK;
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}
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@ -470,7 +475,7 @@ int sif_init(void)
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sif_gpios_reset();
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if ( sif_anout_init() != OK ) return -1;
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/* If everything is okay, register the driver */
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(void)register_driver("/dev/sif0", &devsif_fops, 0666, NULL);
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@ -502,28 +507,41 @@ int sif_main(int argc, char *argv[])
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, val);
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return 0;
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}
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else if (!strcmp(argv[1], "time") && argc == 3) {
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int val = atoi(argv[2]);
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up_rtc_settime(val);
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}
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else if (!strcmp(argv[1], "i2c") && argc == 3) {
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int val = atoi(argv[2]);
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struct st_lis331dl_dev_s * lis = st_lis331dl_init(vsn_sif.i2c1, val);
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I2C_SETFREQUENCY(vsn_sif.i2c2, 100000);
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struct st_lis331dl_dev_s * lis = st_lis331dl_init(vsn_sif.i2c2, val);
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if (lis) {
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struct st_lis331dl_vector_s * a;
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int i;
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uint32_t time_stamp = clock_systimer();
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/* Set to 400 Hz : 3 = 133 Hz/axis */
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st_lis331dl_setconversion(lis, false, true);
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/* Sample some values */
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for (i=0; i<200000; i++) {
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for (i=0; i<1000; ) {
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if ( (a = st_lis331dl_getreadings(lis)) ) {
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i++;
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printf("%d %d %d\n", a->x, a->y, a->z);
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}
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else if (errno != 11) {
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printf("Readings errno %d\n", errno);
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break;
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}
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fflush(stdout);
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usleep(10000);
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}
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printf("Time diff = %d\n", clock_systimer() - time_stamp);
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st_lis331dl_deinit(lis);
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}
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else printf("Exit point: errno=%d\n", errno);
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@ -533,6 +551,7 @@ int sif_main(int argc, char *argv[])
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}
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fprintf(stderr, "%s:\tinit\n\tgpio\tA B\n\tpwr\tval\n", argv[0]);
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fprintf(stderr, "test = %.8x, test irq = %.8x\n", test, test_irq);
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fprintf(stderr, "time = %d / %d, time = %d\n",
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up_rtc_gettime(), up_rtc_getclock(), time(NULL) );
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return -1;
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}
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