Cosmetic cleanup
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@ -104,11 +104,6 @@
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# define CONFIG_SAMA5_NLLDESC SAM_NDMACHAN
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#endif
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/* Register values **********************************************************/
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#define XDMAC_CH_CC_BOTHDSCR \
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(XDMAC_CH_CC_SRCDSCR | XDMAC_CH_CC_DSTDSCR)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -135,7 +130,7 @@ struct sam_xdmach_s
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uint32_t cc; /* Pre-calculated CC register for transfer */
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dma_callback_t callback; /* Callback invoked when the DMA completes */
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void *arg; /* Argument passed to callback function */
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uint32_t rxaddr; /* RX memory address */
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uint32_t rxaddr; /* RX memory address to be invalidated */
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size_t rxsize; /* Size of RX memory region */
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struct chnext_view1_s *llhead; /* DMA link list head */
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struct chnext_view1_s *lltail; /* DMA link list head */
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@ -931,7 +926,8 @@ static size_t sam_maxtransfer(struct sam_xdmach_s *xdmach)
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*
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****************************************************************************/
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static uint32_t sam_ntxtransfers(struct sam_xdmach_s *xdmach, uint32_t dmasize)
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static uint32_t sam_ntxtransfers(struct sam_xdmach_s *xdmach,
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uint32_t dmasize)
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{
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unsigned int srcwidth;
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@ -1653,12 +1649,6 @@ static inline int sam_multiple(struct sam_xdmach_s *xdmach)
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DEBUGASSERT(llhead != NULL && llhead->csa != 0);
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/* Check the first and last Channel Control (CC) Register values */
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DEBUGASSERT((llhead->cc & XDMAC_CH_CC_BOTHDSCR) == 0);
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DEBUGASSERT((xdmach->lltail->cc & XDMAC_CH_CC_BOTHDSCR) ==
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XDMAC_CH_CC_BOTHDSCR);
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/* 1. Read the XDMAC Global Channel Status Register (XDMAC_GS) to choose a
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* free channel.
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*
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