Purely cosmetic changes from review of last PR.
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@ -127,7 +127,6 @@
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# endif
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#endif /* HAVE_UART_CONSOLE */
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#if defined(HAVE_LPUART_CONSOLE)
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# if ((CONSOLE_FREQ / (CONSOLE_BAUD * 32)) > (LPUART_BAUD_SBR_MASK >> LPUART_BAUD_SBR_SHIFT))
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# error "LPUART Console: Baud rate not obtainable with this input clock!"
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@ -140,17 +139,6 @@
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LPUART_BAUD_M10 | LPUART_BAUD_MAEN2 | \
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LPUART_BAUD_MAEN2)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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@ -161,13 +149,12 @@
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*/
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#ifdef CONFIG_KINETIS_UARTFIFOS
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static uint8_t g_sizemap[8] = {1, 4, 8, 16, 32, 64, 128, 0};
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static uint8_t g_sizemap[8] =
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{
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1, 4, 8, 16, 32, 64, 128, 0
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -314,6 +301,7 @@ void kinetis_lowsetup(void)
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CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
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# endif
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#endif /* HAVE_UART_DEVICE */
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#if HAVE_LPUART_DEVICE
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/* Clocking Source for LPUARTs 0 selected in SIM_SOPT2 */
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@ -521,6 +509,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
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{
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depth = (3 * depth) >> 2;
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}
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putreg8(depth , uart_base+KINETIS_UART_RWFIFO_OFFSET);
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depth = g_sizemap[(regval & UART_PFIFO_TXFIFOSIZE_MASK) >> UART_PFIFO_TXFIFOSIZE_SHIFT];
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@ -528,6 +517,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
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{
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depth = (depth >> 2);
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}
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putreg8(depth, uart_base+KINETIS_UART_TWFIFO_OFFSET);
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/* Enable RX and TX FIFOs */
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@ -552,7 +542,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
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/* Now we can (re-)enable the transmitter and receiver */
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regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
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regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
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regval |= (UART_C2_RE | UART_C2_TE);
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putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
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}
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@ -635,6 +625,7 @@ void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud,
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osrreg = osr;
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}
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}
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UNUSED(actual_baud);
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DEBUGASSERT(actual_baud-baud < (baud /100) * 2);
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DEBUGASSERT(sbrreg != 0 && sbrreg < 8192);
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@ -66,6 +66,7 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Some sanity checks *******************************************************/
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/* Is there at least one LPUART enabled and configured as a RS-232 device? */
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@ -107,35 +108,35 @@
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/* Pick ttys1. This could be any of LPUART0-1 excluding the console LPUART. */
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#if defined(CONFIG_KINETIS_LPUART0) && !defined(LPUART0_ASSIGNED)
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# define TTYS1_DEV g_lpuart0port /* LPUART0 is ttyS1 */
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# define LPUART0_ASSIGNED 1
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# define TTYS1_DEV g_lpuart0port /* LPUART0 is ttyS1 */
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# define LPUART0_ASSIGNED 1
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#elif defined(CONFIG_KINETIS_LPUART1) && !defined(LPUART1_ASSIGNED)
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# define TTYS1_DEV g_lpuart1port /* LPUART1 is ttyS1 */
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# define LPUART1_ASSIGNED 1
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# define TTYS1_DEV g_lpuart1port /* LPUART1 is ttyS1 */
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# define LPUART1_ASSIGNED 1
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#endif
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#define LPUART_CTRL_ERROR_INTS (LPUART_CTRL_ORIE | LPUART_CTRL_FEIE | \
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LPUART_CTRL_NEIE | LPUART_CTRL_PEIE)
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#define LPUART_CTRL_ERROR_INTS (LPUART_CTRL_ORIE | LPUART_CTRL_FEIE | \
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LPUART_CTRL_NEIE | LPUART_CTRL_PEIE)
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#define LPUART_CTRL_RX_INTS LPUART_CTRL_RIE
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#define LPUART_CTRL_RX_INTS LPUART_CTRL_RIE
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#define LPUART_CTRL_TX_INTS LPUART_CTRL_TIE
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#define LPUART_CTRL_TX_INTS LPUART_CTRL_TIE
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#define LPUART_CTRL_ALL_INTS (LPUART_CTRL_TX_INTS | LPUART_CTRL_RX_INTS | \
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LPUART_CTRL_MA1IE | LPUART_CTRL_MA1IE | \
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LPUART_CTRL_ILIE | LPUART_CTRL_TCIE)
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#define LPUART_CTRL_ALL_INTS (LPUART_CTRL_TX_INTS | LPUART_CTRL_RX_INTS | \
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LPUART_CTRL_MA1IE | LPUART_CTRL_MA1IE | \
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LPUART_CTRL_ILIE | LPUART_CTRL_TCIE)
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#define LPUART_STAT_ERRORS (LPUART_STAT_OR | LPUART_STAT_FE | \
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LPUART_STAT_PF | LPUART_STAT_NF)
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#define LPUART_STAT_ERRORS (LPUART_STAT_OR | LPUART_STAT_FE | \
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LPUART_STAT_PF | LPUART_STAT_NF)
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/* The LPUART does not have an common set of aligned bits for the interrupt
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* enable and the status. So map the ctrl to the stat bits
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*/
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#define LPUART_CTRL_TR_INTS (LPUART_CTRL_TX_INTS | LPUART_CTRL_RX_INTS)
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#define LPUART_CTRL2STAT(c) ((((c) & LPUART_CTRL_ERROR_INTS) >> 8) | \
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((c) & (LPUART_CTRL_TR_INTS)))
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#define LPUART_CTRL_TR_INTS (LPUART_CTRL_TX_INTS | LPUART_CTRL_RX_INTS)
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#define LPUART_CTRL2STAT(c) ((((c) & LPUART_CTRL_ERROR_INTS) >> 8) | \
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((c) & (LPUART_CTRL_TR_INTS)))
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/****************************************************************************
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* Private Types
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@ -277,7 +278,8 @@ static uart_dev_t g_lpuart1port =
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* Name: kinetis_serialin
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****************************************************************************/
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static inline uint32_t kinetis_serialin(struct kinetis_dev_s *priv, int offset)
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static inline uint32_t kinetis_serialin(struct kinetis_dev_s *priv,
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int offset)
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{
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return getreg32(priv->uartbase + offset);
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}
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@ -286,7 +288,8 @@ static inline uint32_t kinetis_serialin(struct kinetis_dev_s *priv, int offset)
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* Name: kinetis_serialout
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****************************************************************************/
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static inline void kinetis_serialout(struct kinetis_dev_s *priv, int offset, uint32_t value)
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static inline void kinetis_serialout(struct kinetis_dev_s *priv, int offset,
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uint32_t value)
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{
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putreg32(value, priv->uartbase + offset);
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}
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@ -403,14 +406,15 @@ static void kinetis_shutdown(struct uart_dev_s *dev)
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* Name: kinetis_attach
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*
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* Description:
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* Configure the LPUART to operation in interrupt driven mode. This method is
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* called when the serial port is opened. Normally, this is just after the
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* the setup() method is called, however, the serial console may operate in
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* a non-interrupt driven mode during the boot phase.
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* Configure the LPUART to operation in interrupt driven mode. This
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* method is called when the serial port is opened. Normally, this is
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* just after the the setup() method is called, however, the serial
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* console may operate in a non-interrupt driven mode during the boot phase.
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*
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* RX and TX interrupts are not enabled when by the attach method (unless the
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* hardware supports multiple levels of interrupt enabling). The RX and TX
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* interrupts are not enabled until the txint() and rxint() methods are called.
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* RX and TX interrupts are not enabled when by the attach method (unless
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* the hardware supports multiple levels of interrupt enabling). The RX
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* and TX interrupts are not enabled until the txint() and rxint() methods
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* are called.
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*
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****************************************************************************/
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@ -436,9 +440,9 @@ static int kinetis_attach(struct uart_dev_s *dev)
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* Name: kinetis_detach
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*
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* Description:
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* Detach LPUART interrupts. This method is called when the serial port is
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* closed normally just before the shutdown method is called. The exception
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* is the serial console which is never shutdown.
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* Detach LPUART interrupts. This method is called when the serial port
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* is closed normally just before the shutdown method is called. The
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* exception is the serial console which is never shutdown.
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*
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****************************************************************************/
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@ -460,9 +464,9 @@ static void kinetis_detach(struct uart_dev_s *dev)
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* Name: kinetis_interrupts
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*
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* Description:
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* This is the LPUART status interrupt handler. It will be invoked when an
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* interrupt received on the 'irq' It should call uart_transmitchars or
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* uart_receivechar to perform the appropriate data transfers. The
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* This is the LPUART status interrupt handler. It will be invoked when
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* an interrupt received on the 'irq' It should call uart_transmitchars
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* or uart_receivechar to perform the appropriate data transfers. The
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* interrupt handling logic must be able to map the 'irq' number into the
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* Appropriate uart_dev_s structure in order to call these functions.
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*
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@ -471,7 +475,7 @@ static void kinetis_detach(struct uart_dev_s *dev)
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static int kinetis_interrupt(int irq, void *context)
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{
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struct uart_dev_s *dev = NULL;
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struct kinetis_dev_s *priv;
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struct kinetis_dev_s *priv;
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uint32_t stat;
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uint32_t ctrl;
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@ -622,6 +626,7 @@ static int kinetis_receive(struct uart_dev_s *dev, uint32_t *status)
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struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
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uint32_t regval;
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int data;
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/* Get error status information:
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*
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* OR: Receiver Overrun Flag. To clear OR, when STAT read with OR set,
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@ -653,6 +658,7 @@ static int kinetis_receive(struct uart_dev_s *dev, uint32_t *status)
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{
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kinetis_serialout(priv, KINETIS_LPUART_STAT_OFFSET, regval);
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}
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return data;
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}
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@ -672,8 +678,8 @@ static void kinetis_rxint(struct uart_dev_s *dev, bool enable)
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flags = enter_critical_section();
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if (enable)
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{
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/* Receive an interrupt when their is anything in the Rx data register (or an Rx
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* related error occurs).
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/* Receive an interrupt when their is anything in the Rx data register
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* (or an Rx related error occurs).
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*/
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#ifndef CONFIG_SUPPRESS_SERIAL_INTS
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@ -898,4 +904,3 @@ int up_putc(int ch)
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}
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#endif /* USE_SERIALDRIVER */
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@ -60,7 +60,6 @@
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* is 12 MHz oscillator
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*
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* X501 a High-frequency, low-power Xtal
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*
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*/
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#define BOARD_EXTAL_LP 1
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@ -99,10 +98,10 @@
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#define BOARD_OUTDIV3 3 /* FlexBus = MCG / 3, 60 MHz */
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#define BOARD_OUTDIV4 7 /* Flash clock = MCG / 7, 25.7 MHz */
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#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
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#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
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#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
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#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
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#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
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#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
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#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
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#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
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/* Use BOARD_MCG_FREQ as the output SIM_SOPT2 MUX selected by
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* SIM_SOPT2[PLLFLLSEL]
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@ -138,11 +137,11 @@
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BOARD_SIM_CLKDIV3_PLLFLLDIV * \
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BOARD_SIM_CLKDIV3_PLLFLLFRAC)
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#define BOARD_LPUART0_CLKSRC SIM_SOPT2_LPUARTSRC_MCGCLK
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#define BOARD_LPUART0_FREQ BOARD_SIM_CLKDIV3_FREQ
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#define BOARD_LPUART0_CLKSRC SIM_SOPT2_LPUARTSRC_MCGCLK
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#define BOARD_LPUART0_FREQ BOARD_SIM_CLKDIV3_FREQ
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#define BOARD_TPM_CLKSRC SIM_SOPT2_TPMSRC_MCGCLK
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#define BOARD_TPM_FREQ BOARD_SIM_CLKDIV3_FREQ
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#define BOARD_TPM_CLKSRC SIM_SOPT2_TPMSRC_MCGCLK
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#define BOARD_TPM_FREQ BOARD_SIM_CLKDIV3_FREQ
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/* SDHC clocking ********************************************************************/
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