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Documentation: migrate STM32F1

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===============
CloudController
===============
This README discusses issues unique to NuttX configurations for the CloudController
development board featuring the STMicro STM32F107VCT MCU.
Features of the CloudController board include:
- STM32F107VCT
- 10/100M PHY (DM9161AEP)
- USB OTG
- USART connectos (USART1-2)
- SPI Flash (W25X16)
- (3) LEDs (LED1-3)
- (3) Buttons (KEY1-3, USERKEY2, USERKEY, TEMPER, WAKEUP)
- 5V/3.3V power conversion
- SWD
STM32F107VCT Pin Usage
======================
::
== ==== ============== ===================================================================
PN NAME SIGNAL NOTES
== ==== ============== ===================================================================
**23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground.
24 PA1 MII_RX_CLK
RMII_REF_CLK
25 PA2 MII_MDIO
26 PA3 315M_VT
29 PA4 DAC_OUT1 To CON5(CN14)
30 PA5 DAC_OUT2 To CON5(CN14). JP10
SPI1_SCK To the SD card, SPI FLASH
31 PA6 SPI1_MISO To the SD card, SPI FLASH
32 PA7 SPI1_MOSI To the SD card, SPI FLASH
67 PA8 MCO To DM9161AEP PHY
68 PA9 USB_VBUS MINI-USB-AB. JP3
USART1_TX MAX3232 to CN5
69 PA10 USB_ID MINI-USB-AB. JP5
USART1_RX MAX3232 to CN5
70 PA11 USB_DM MINI-USB-AB
71 PA12 USB_DP MINI-USB-AB
72 PA13 TMS/SWDIO
76 PA14 TCK/SWCLK
77 PA15 TDI
== ==== ============== ===================================================================
== ==== ============== ===================================================================
PN NAME SIGNAL NOTES
== ==== ============== ===================================================================
35 PB0 ADC_IN1 To CON5(CN14)
36 PB1 ADC_IN2 To CON5(CN14)
37 PB2 DATA_LE To TFT LCD (CN13)
BOOT1 JP13
89 PB3 TDO/SWO
90 PB4 TRST
91 PB5 CAN2_RX
92 PB6 CAN2_TX JP11
I2C1_SCL
93 PB7 I2C1_SDA
95 PB8 USB_PWR Drives USB VBUS
96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
47 PB10 USERKEY Connected to KEY2
48 PB11 MII_TX_EN Ethernet PHY
51 PB12 I2S_WS Audio DAC
MII_TXD0 Ethernet PHY
52 PB13 I2S_CK Audio DAC
MII_TXD1 Ethernet PHY
53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14.
54 PB15 I2S_DIN Audio DAC
== ==== ============== ===================================================================
== ==== ============== ===================================================================
PN NAME SIGNAL NOTES
== ==== ============== ===================================================================
15 PC0 POTENTIO_METER
16 PC1 MII_MDC Ethernet PHY
17 PC2 WIRELESS_INT
18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
33 PC4 USERKEY2 Connected to KEY1
34 PC5 TP_INT JP6. To TFT LCD (CN13) module
MII_INT Ethernet PHY
63 PC6 I2S_MCK Audio DAC. Active low: Pulled high
64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high
65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high
66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high
78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module
79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module
80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module
7 PC13 TAMPER Connected to KEY3
8 PC14 OSC32_IN Y1 32.768Khz XTAL
9 PC15 OSC32_OUT Y1 32.768Khz XTAL
== ==== ============== ===================================================================
== ==== ============== ===================================================================
PN NAME SIGNAL NOTES
== ==== ============== ===================================================================
81 PD0 CAN1_RX
82 PD1 CAN1_TX
83 PD2 LED1 Active low: Pulled high
84 PD3 LED2 Active low: Pulled high
85 PD4 LED3 Active low: Pulled high
86 PD5 485_TX Same as USART2_TX but goes to SP3485
USART2_TX MAX3232 to CN6
87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
USART2_RX MAX3232 to CN6
88 PD7 LED4 Active low: Pulled high
485_DIR SP3485 read enable (not)
55 PD8 MII_RX_DV Ethernet PHY
RMII_CRSDV Ethernet PHY
56 PD9 MII_RXD0 Ethernet PHY
57 PD10 MII_RXD1 Ethernet PHY
58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
60 PD13 LCD_RS To TFT LCD (CN13)
61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14.
62 PD15 LCD_RD To TFT LCD (CN13)
== ==== ============== ===================================================================
== ==== ============== ===================================================================
PN NAME SIGNAL NOTES
== ==== ============== ===================================================================
97 PE0 DB00 To TFT LCD (CN13)
98 PE1 DB01 To TFT LCD (CN13)
1 PE2 DB02 To TFT LCD (CN13)
2 PE3 DB03 To TFT LCD (CN13)
3 PE4 DB04 To TFT LCD (CN13)
4 PE5 DB05 To TFT LCD (CN13)
5 PE6 DB06 To TFT LCD (CN13)
38 PE7 DB07 To TFT LCD (CN13)
39 PE8 DB08 To TFT LCD (CN13)
40 PE9 DB09 To TFT LCD (CN13)
41 PE10 DB10 To TFT LCD (CN13)
42 PE11 DB11 To TFT LCD (CN13)
43 PE12 DB12 To TFT LCD (CN13)
44 PE13 DB13 To TFT LCD (CN13)
45 PE14 DB14 To TFT LCD (CN13)
46 PE15 DB15 To TFT LCD (CN13)
== ==== ============== ===================================================================
== ==== ============== ===================================================================
PN NAME SIGNAL NOTES
== ==== ============== ===================================================================
73 N/C
12 OSC_IN Y2 25Mhz XTAL
13 OSC_OUT Y2 25Mhz XTAL
94 BOOT0 JP15 (3.3V or GND)
14 RESET S5
6 VBAT JP14 (3.3V or battery)
49 VSS_1 GND
74 VSS_2 GND
99 VSS_3 GND
27 VSS_4 GND
10 VSS_5 GND
19 VSSA VSSA
20 VREF- VREF-
== ==== ============== ===================================================================
LEDs
====
The Cloudctrl board has four LEDs labeled LED1, LED2, LED3 and LED4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
=================== ======================= ======= ======= ======= ======
SYMBOL Meaning LED1[1] LED2 LED3 LED4[4]
=================== ======================= ======= ======= ======= ======
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt[2] ON N/C N/C OFF
LED_SIGNAL In a signal handler[3] N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode
=================== ======================= ======= ======= ======= ======
[1] If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
[2] The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
[3] LED2 may also flicker normally if signals are processed.
[4] LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Cloudctrl-specific Configuration Options
============================================
..
CONFIG_ARCH - Identifies the arch/ subdirectory. This should be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact chip:
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=shenzhou (for the Cloudctrl development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SHENZHOU=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_ETHMAC
CONFIG_STM32_OTGFS
CONFIG_STM32_IWDG
CONFIG_STM32_PWR -- Required for RTC
APB1 (low speed)
----------------
CONFIG_STM32_BKP
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_CAN2
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_WWDG
APB2 (high speed)
-----------------
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32107xxx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
CONFIG_STM32_MII - Support Ethernet MII interface
CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface
CONFIG_STM32_RMII - Support Ethernet RMII interface
CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface
CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select full duplex mode. Default: half-duplex
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select 100 MBps speed. Default: 10 Mbps
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
defined. The PHY status register address may diff from PHY to PHY. This
configuration sets the address of the PHY status register.
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides bit mask indicating 10 or 100MBps speed.
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provide bit mask indicating full or half duplex modes.
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the mode bits indicating full duplex mode.
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
but some hooks are indicated with this condition.
Cloudctrl CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
Cloudctrl LCD Hardware Configuration
The LCD driver supports the following LCDs on the STM324xG_EVAL board:
AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
AM-240320D5TOQW01H (LCD_ILI9325)
Configuration options.
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
For the Cloudctrl board, the edge opposite from the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse
landscape" support. Default is this 320x240 "landscape"
orientation
For the Cloudctrl board, the edge next to the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_ILI9320_DISABLE (includes ILI9321)
CONFIG_STM32_ILI9325_DISABLE
STM32 USB OTG FS Host Driver Support
Pre-requisites
CONFIG_USBHOST - Enable USB host support
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
CONFIG_STM32_SYSCFG - Needed
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
Default 128 (512 bytes)
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
in 32-bit words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
debug. Depends on CONFIG_DEBUG_FEATURES.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
packets. Depends on CONFIG_DEBUG_FEATURES.
Configurations
==============
Each Cloudctrl configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh shenzhou:<subdir>
Where <subdir> is one of the following:
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables both the serial and telnet NSH interfaces.::
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
CONFIG_NSH_DHCPC=n : DHCP is disabled
CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2
CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1
NOTES:
1. This example assumes that a network is connected. During its
initialization, it will try to negotiate the link speed. If you have
no network connected when you reset the board, there will be a long
delay (maybe 30 seconds?) before anything happens. That is the timeout
before the networking finally gives up and decides that no network is
available.
2. Enabling the ADC example:
The only internal signal for ADC testing is the potentiometer input:
ADC1_IN10(PC0) Potentiometer
External signals are also available on CON5 CN14:
ADC_IN8 (PB0) CON5 CN14 Pin2
ADC_IN9 (PB1) CON5 CN14 Pin1
The signal selection is hard-coded in boards/shenzhou/src/up_adc.c: The
potentiometer input (only) is selected.
These selections will enable sampling the potentiometer input at 100Hz using
Timer 1:
CONFIG_ANALOG=y : Enable analog device support
CONFIG_ADC=y : Enable generic ADC driver support
CONFIG_ADC_DMA=n : ADC DMA is not supported
CONFIG_STM32_ADC1=y : Enable ADC 1
CONFIG_STM32_TIM1=y : Enable Timer 1
CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC
CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
nxwm
----
This is a special configuration setup for the NxWM window manager
UnitTest. The NxWM window manager can be found here::
apps/graphics/NxWidgets/nxwm
The NxWM unit test can be found at::
apps/graphics/NxWidgets/UnitTests/nxwm
NOTE: JP6 selects between the touchscreen interrupt and the MII
interrupt. It should be positioned 1-2 to enable the touchscreen
interrupt.
NOTE: Reading from the LCD is not currently supported by this
configuration. The hardware will support reading from the LCD
and drivers/lcd/ssd1289.c also supports reading from the LCD.
This limits some graphics capabilities.
Reading from the LCD is not supported only because it has not
been test. If you get inspired to test this feature, you can
turn the LCD read functionality on by setting::
-CONFIG_LCD_NOGETRUN=y
+# CONFIG_LCD_NOGETRUN is not set
-CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_WRITEONLY is not set
thttpd
------
This builds the THTTPD web server example using the THTTPD and
the apps/examples/thttpd application.
NOTE: This example can only be built using older GCC toolchains
due to incompatibilities introduced in later GCC releases.

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==============
ET-STM32 Stamp
==============
This README discusses issues/thoughts unique to NuttX configuration(s) for the
ET-STM32 Stamp board from Futurlec (https://www.futurlec.com/ET-STM32_Stamp.shtml).
Microprocessor: 32-bit ARM Cortex M3 at 72MHz STM32F103RET6
Memory: 512 KB Flash and 64 KB SRAM
I/O Pins Out: 48
ADCs: 16 (at 12-bit resolution)
DACs: 2 (at 12-bit resolution)
Peripherals: RTC, 4 timers, 2 I2Cs, 3 SPI ports, 1 on-board UART (upto 5 channels)
Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces
Please see link below for board specific details:
https://www.futurlec.com/ET-STM32_Stamp_Technical.shtml
This configuration supports the ET-STM32 Stamp module.
Development Environment
=======================
Either Linux (recommended), Mac or Cygwin on Windows can be used for the development
environment. The source has been built only using the GNU (Cortex M) toolchain.
Other toolchains will likely cause problems.
WSL (Windows Subsystem for Linux) was used to develop, compile and test the NuttX
build for the ET-STM32 Stamp platform.
Flashing/Programming
====================
Prerequisites:
1. The ET-STM32 Stamp module from Futurlec.
2. An RS232 connection cable such as the one in this link: (Part code: RS232CONN):
https://www.futurlec.com/DevBoardAccessories.shtml
It has a 4-pin connection header on one end and an RS-232 (DB9) female connector on
the other. The 4-pin connector can be directly plugged onto the Stamp module.
3. An RS232 to USB converter cable. Ensure that a suitable driver is installed for
the converter cable. When the cable is plugged in (for example), my PC lists the
assigned port with this name: "USB-SERIAL CH340 (COM2)".
Assuming Windows 10, navigate to: This PC -> Manage -> Device Manager -> Ports.
4. ST's Flash loader demonstrator tool. You can download it from here:
https://www.st.com/en/development-tools/flasher-stm32.html
To install the NuttX firmware (nuttx.bin) on the ET-STM32 Stamp:
1. First, power the Stamp module with a 3.3 VDC power supply. I made my own
Stamp module fixture using a 3.3 VDC switching regulator, a prototype PCB card
and some solder.
2. Insert the RS232CONN into the 4-pin on-board header. The other end should be
connected to the USB port of the PC using the RS232-USB converter.
3. Set the BOOT1 jumper on your board to the ISP position.
4. Press the BOOT0 switch. The green "BOOT0=1" LED should light up.
5. Reset the board by pressing on the RESET button.
6. Using the ST Flash loader demonstrator to download the NuttX binary image.
7. Wait until programming is completed and press "Finish". Toggle the
BOOT0 switch again. Reset the board.
You will now be presented with the NuttShell (NSH). Enjoy.
Configurations
==============
Information Common to All Configurations
----------------------------------------
The ET-STM32 Stamp configuration is maintained in a sub-directory and can be
selected as follow::
tools/configure.sh et-stm32-stamp:<subdir>
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.::
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be in one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
Configuration Sub-directories
-----------------------------
nsh:
----
This configuration directory provide the basic NuttShell (NSH).
A serial console is provided on USART1.

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===========
fire-stm2v2
===========
This README discusses issues unique to NuttX configurations for the M3
Wildfire development board (STM32F103VET6). See http://firestm32.taobao.com
This configuration should support both the version 2 and version 3 of the
Wildfire board (using NuttX configuration options). However, only version 2
has been verified.
Pin Configuration
=================
..
=== ====== ============== ===================================================================
PIN NAME SIGNAL NOTES
=== ====== ============== ===================================================================
1 PE2 PE2=C=RCLK Camera (P9)
2 PE3 PE3=USB=M USB2.0
3 PE4 PE4=BEEP LS1 Bell (v2)
PE4 10Mbps ENC28J60 Interrupt (v3)
4 PE5 (no name) 10Mbps ENC28J60 Interrupt (v2)
PE5 KEY1, Low when closed (pulled high if open) (v3)
5 PE6
6 VBAT BT1 Battery (BT1)
7 PC13 Header 7X2
8 PC14 PC14/OSC32=IN Y2 32.768KHz
9 PC15 PC15/OSC32=OUT Y2 32.768KHz
10 VSS_5 DGND
11 VDD_5 3V3
12 OSC_IN Y1 8MHz
13 OSC_OUT Y1 8MHz
14 NRST REST1 Reset switch
15 PC0
16 PC1 PC1/ADC123=IN11 Potentiometer (R16)
17 PC2
18 PC3 PC3=LED1 LED1, Active low (pulled high)
19 VSSA DGND
20 VREF= DGND
21 VREF+ 3V3
22 VDDA 3V3
23 PA0 PA0=C=VSYNC Camera (P9)
24 PA1 PC1/ADC123=IN1
25 PA2 PA2=US2=TX MAX3232, DB9 D7
=== ====== ============== ===================================================================
=== ====== ============== ===================================================================
PIN NAME SIGNAL NOTES
=== ====== ============== ===================================================================
26 PA3 PA3=US2=RX MAX3232, DB9 D7
27 VSS_4 DGND
28 VDD_4 3V3
29 PA4 PA4=SPI1=NSS 10Mbit ENC28J60, SPI 2M FLASH
30 PA5 PA5=SPI1=SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
31 PA6 PA6=SPI1=MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
32 PA7 PA7=SPI1=MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
33 PC4 PC4=LED2 LED2, Active low (pulled high)
34 PC5 PC5=LED3 LED3, Active low (pulled high)
35 PB0 PB0=KEY1 KEY1, Low when closed (pulled high if open) (v2)
PB0 Header P5 (v3)
36 PB1 PB1=KEY2 KEY2, Low when closed (pulled high if open)
37 PB2 BOOT1/DGND
38 PE7 PE7=FSMC_D4 2.4" TFT + Touchscreen
39 PE8 PE8=FSMC_D5 2.4" TFT + Touchscreen
40 PE9 PE9=FSMC_D6 2.4" TFT + Touchscreen
41 PE10 PE10=FSMC_D7 2.4" TFT + Touchscreen
42 PE11 PE11=FSMC_D8 2.4" TFT + Touchscreen
43 PE12 PE12=FSMC_D9 2.4" TFT + Touchscreen
44 PE13 PE13=FSMC_D10 2.4" TFT + Touchscreen
45 PE14 PE14=FSMC_D11 2.4" TFT + Touchscreen
46 PE15 PE15=FSMC_D12 2.4" TFT + Touchscreen
47 PB10 PB10=C=DO_2 Camera (P9)
48 PB11 PB11=MP3=RST MP3
PB11=C=DO_3 Camera (P9)
49 VSS_1 DGND
50 VDD_1 3V3
=== ====== ============== ===================================================================
=== ====== ============== ===================================================================
PIN NAME SIGNAL NOTES
=== ====== ============== ===================================================================
51 PB12 PB12=SPI2=NSS MP3
PB12=C=DO_4 Camera (P9)
52 PB13 PB13=SPI2=SCK MP3
PB13=C=DO_5 Camera (P9)
53 PB14 PB14=SPI2=MISO MP3
PB14=C=DO_6 Camera (P9)
54 PB15 PB15=SPI2=MOSI MP3
PB15=C=DO_7 Camera (P9)
55 PD8 PD8=FSMC_D13 2.4" TFT + Touchscreen
56 PD9 PD9=FSMC_D14 2.4" TFT + Touchscreen
57 PD10 PD10=FSMC_D15 2.4" TFT + Touchscreen
58 PD11 PD11=FSMC_A16 2.4" TFT + Touchscreen
59 PD12 C=LED_EN Camera (P9)
60 PD13 PD13=LCD/LIGHT 2.4" TFT + Touchscreen
61 PD14 PD14=FSMC_D0 2.4" TFT + Touchscreen
62 PD15 PD15=FSMC_D1 2.4" TFT + Touchscreen
63 PC6 PC6=MP3=XDCS MP3
PC6=C=SIO_C Camera (P9)
64 PC7 PC7=MP3=DREQ MP3
PC7=C=SIO_D Camera (P9)
65 PC8 PC8=SDIO=D0 SD card, pulled high
66 PC9 PC9=SDIO=D1 SD card, pulled high
67 PA8 PA8=C=XCLK Camera (P9)
68 PA9 PA9=US1=TX MAX3232, DB9 D8
69 PA10 PA10=US1=RX MAX3232, DB9 D8
70 PA11 PA11=USBDM USB2.0
71 PA12 PA12=USBDP USB2.0
72 PA13 PA13=JTMS JTAG
73 N/C
74 VSS_2 DGND
75 VDD_2 3V3
=== ====== ============== ===================================================================
=== ====== ============== ===================================================================
PIN NAME SIGNAL NOTES
=== ====== ============== ===================================================================
76 PA14 PA14=JTCK JTAG
77 PA15 PA15=JTDI JTAG
78 PC10 PC10=SDIO=D2 SD card, pulled high
79 PC11 PC10=SDIO=D3 SD card, pulled high
80 PC12 PC12=SDIO=CLK SD card
81 PD0 PD0=FSMC_D2 2.4" TFT + Touchscreen
82 PD1 PD1=FSMC_D3 2.4" TFT + Touchscreen
83 PD2 PD2=SDIO=CMD SD card, pulled high
84 PD3 PD3=C=WEN Camera (P9)
85 PD4 PD4=FSMC_NOE 2.4" TFT + Touchscreen
86 PD5 PD5=FSMC_NWE 2.4" TFT + Touchscreen
87 PD6 PD6=C=OE Camera (P9)
88 PD7 PD7=FSMC_NE1 2.4" TFT + Touchscreen
89 PB3 PB3=JTDO JTAG
90 PB4 PB4=NJTRST JTAG
91 PB5 PB5=C=WRST Camera (P9)
92 PB6 PB6=I2C1=SCL 2.4" TFT + Touchscreen, AT24C02
93 PB7 PB7=I2C1=SDA 2.4" TFT + Touchscreen, AT24C02
94 BOOT0 SW3 3V3 or DGND
95 PB8 PB8=CAN=RX CAN transceiver, Header 2H
PB8=C=DO_0 Camera (P9)
96 PB9 PB9=CAN=TX CAN transceiver, Header 2H
PB9=C=DO_1 Camera (P9)
97 PE0 PE0=C=RRST Camera (P9)
98 PE1 PE1=FSMC_NBL1 2.4" TFT + Touchscreen
99 VSS_3 DGND
100 VDD_3 3V3
=== ====== ============== ===================================================================
DFU and JTAG
============
Enbling Support for the DFU Bootloader
--------------------------------------
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line::
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed
to make space for the DFU loader and 0x08003000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for the
configuration.
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU
file (nuttx.dfu)... see below for details.
2. Connect the M3 Wildfire board to your computer using a USB cable.
3. Start the DFU loader on the M3 Wildfire board. You do this by
resetting the board while holding the *Key* button. Windows should
recognize that the DFU loader has been installed.
3. Run the DFU SE program to load nuttx.dfu into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo directory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.hex in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will end up with a file called
nuttx.dfu that you can use with the STMicro DFU SE program.
Enabling JTAG
-------------
If you are not using the DFU, then you will probably also need to enable
JTAG support. By default, all JTAG support is disabled but there NuttX
configuration options to enable JTAG in various different ways.
These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO
MAPR register. These bits are used to configure the SWJ and trace alternate
function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the
Cortex debug port. The default state in this port is for all JTAG support
to be disabled.::
CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full
SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable
full SWJ (JTAG-DP + SW-DP) but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP
disabled and SW-DP enabled.
The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100
which disable JTAG-DP and SW-DP.
OpenOCD
=======
I have also used OpenOCD with the M3 Wildfire. In this case, I used
the Olimex USB ARM OCD. See the script in boards/arm/stm32/fire-stm32v2/tools/oocd.sh
for more information. Using the script:
- Start the OpenOCD GDB server::
cd <nuttx-build-directory>
boards/arm/stm32/fire-stm32v2/tools/oocd.sh $PWD
- Load NuttX::
cd <nuttx-built-directory>
arm-none-eabi-gdb nuttx
gdb> target remote localhost:3333
gdb> mon reset
gdb> mon halt
gdb> load nuttx
- Running NuttX::
gdb> mon reset
gdb> c
LEDs
====
The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3. These LEDs are not
used by the NuttX port unless CONFIG_ARCH_LEDS is defined. In that case, the
usage by the board port is defined in include/board.h and src/up_autoleds.c.
The LEDs are used to encode OS-related events as follows::
/* LED1 LED2 LED3 */
#define LED_STARTED 0 /* OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* ON OFF OFF */
#define LED_IRQSENABLED 2 /* OFF ON OFF */
#define LED_STACKCREATED 3 /* OFF OFF OFF */
#define LED_INIRQ 4 /* NC NC ON (momentary) */
#define LED_SIGNAL 5 /* NC NC ON (momentary) */
#define LED_ASSERTION 6 /* NC NC ON (momentary) */
#define LED_PANIC 7 /* NC NC ON (2Hz flashing) */
#undef LED_IDLE /* Sleep mode indication not supported */
RTC
===
The STM32 RTC may configured using the following settings.::
CONFIG_RTC - Enables general support for a hardware RTC. Specific
architectures may require other specific settings.
CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
second, usually supporting a 32-bit time_t value. In this case,
the RTC is used to &quot;seed&quot; the normal NuttX timer and the
NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES
is enabled in the NuttX configuration, then the RTC provides higher
resolution time and completely replaces the system timer for purpose of
date and time.
CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES
is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
A callback function will be executed when the alarm goes off.
In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts
are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
A BKP register is incremented on each overflow interrupt creating, effectively,
a 48-bit RTC counter.
In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
(because the next overflow is not expected until the year 2106).
WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
M3 Wildfire-specific Configuration Options
============================================
..
CONFIG_ARCH - Identifies the arch/ subdirectory. This should be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact chip:
CONFIG_ARCH_CHIP_STM32
CONFIG_ARCH_CHIP_STM32F103VE
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=fire-stm32v2 (for the M3 Wildfire development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_FIRE_STM32V2=y (Version 2)
CONFIG_ARCH_BOARD_FIRE_STM32V3=y (Version 3)
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operationof delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN1
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
Alternate pin mappings. The M3 Wildfire board requires only CAN1 remapping
On the M3 Wildfire board pin PB9 is wired as TX and pin PB8 is wired as RX.
Which then makes the proper connection through the CAN transceiver SN65HVD230
out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH.
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_REMAP1
CONFIG_STM32_CAN1_REMAP2
CONFIG_STM32_CAN2_REMAP
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_SDIO_DMA - Support DMA data transfers. Requires
CONFIG_STM32_SDIO and CONFIG_STM32_DMA2.
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
M3 Wildfire CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
M3 Wildfire LCD Hardware Configuration
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
(this setting is informative only... not used).
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support. In this orientation, the M3 Wildfire's
LCD ribbon cable is at the bottom of the display. Default is
320x240 "landscape" orientation.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support. In this orientation, the
M3 Wildfire's LCD ribbon cable is at the top of the display.
Default is 320x240 "landscape" orientation.
CONFIG_LCD_BACKLIGHT - Define to support a backlight.
CONFIG_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an
adjustable backlight will be provided using timer 1 to generate
various pulse widthes. The granularity of the settings is
determined by CONFIG_LCD_MAXPOWER. If CONFIG_LCD_PWM (or
CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight
is provided.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_AM240320_DISABLE
CONFIG_STM32_SPFD5408B_DISABLE
Configurations
==============
Each M3 Wildfire configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh fire-stm32v2:<subdir>
Where <subdir> is one of the following:
nsh
---
Configure the NuttShell (nsh) located at examples/nsh. The nsh configuration
contains support for some built-in applications that can be enabled by making
some additional minor change to the configuration file.
Reconfiguring: This configuration uses to the kconfig-mconf configuration tool
to control the configuration. See the section entitled "NuttX Configuration
Tool" in the top-level README.txt file.
Start Delays: If no SD card is present in the slot, or if the network is not
connected, then there will be long start-up delays before you get the NSH
prompt. If I am focused on ENC28J60 debug, I usually disable MMC/SD so that
I don't have to bother with the SD card::
CONFIG_STM32_SDIO=n
CONFIG_MMCSD=n
STATUS: The board port is basically functional. Not all features have been
verified. The ENC28J60 network is not yet functional. Networking is
enabled by default in this configuration for testing purposes. To use this
configuration, the network must currently be disabled. To do this using
the kconfig-mconf configuration tool::
> make menuconfig
Then de-select "Networking Support" -> "Networking Support"
PDATE: The primary problem with the ENC29J60 is a v2 board issue: The
SPI FLASH and the ENC28J60 shared the same SPI chip select signal (PA4-SPI1-NSS).
In order to finish the debug of the ENC28J60, it may be necessary to lift
the SPI FLASH chip select pin from the board.

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=============
HY-MiniSTM32V
=============
This README discusses issues unique to NuttX configurations for the
HY-MiniSTM32V development board.
ST Bootloader
=============
A bootloader code is available in an internal boot ROM memory (called
'system memory' in STM documentation) in all STM32 MCUs. For the F103xx
this bootloader can be used to upload & flash a firmware image through
the USART1.
Notes:
- The bootloader is activated by the BOOT0 / BOOT1 pins after a MCU reset.
See STM application note 2606 for more details.
- On the hymini-stm32 board the USART1 is connected to a PL2303
USB<->serial converter.
To enter bootloader mode in the hymini-stm32 board:
- Press the 'boot0' button (located next to 'reset' button)
- While boot0 button is pressed, reset the board through the reset button.
- Once you pressed / released the 'reset' button, the MCU has (re)started
in bootloader mode (and you can then release the boot0 button).
A flash utility must be used on your development workstation to upload / flash
a firmware image. (The 'stm32flash' open source tool, available at
http://stm32flash.googlecode.com/ has been used successfully).
LEDs
====
The HY-MiniSTM32 board provides only two controllable LEDs labeled LED1 and LED2.
Usage of these LEDs is defined in include/board.h and src/up_leds.c.
They are encoded as follows::
=================== ======================= ======= =======
SYMBOL Meaning LED1* LED2
=================== ======================= ======= =======
LED_STARTED NuttX has been started OFF OFF
LED_HEAPALLOCATE Heap has been allocated ON OFF
LED_IRQSENABLED Interrupts enabled OFF ON
LED_STACKCREATED Idle stack created ON OFF
LED_INIRQ In an interrupt** OFF N/C
LED_SIGNAL In a signal handler*** N/C ON
LED_ASSERTION An assertion failed ON ON
LED_PANIC The system has crashed BLINK BLINK
LED_IDLE STM32 is is sleep mode (Optional, not used)
=================== ======================= ======= =======
* If NuttX starts correctly, normal state is to have LED1 on and LED2 off.
** LED1 is turned off during interrupt.
*** LED2 is turned on during signal handler.
RTC
===
The STM32 RTC may configured using the following settings.::
CONFIG_RTC - Enables general support for a hardware RTC. Specific
architectures may require other specific settings.
CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
second, usually supporting a 32-bit time_t value. In this case,
the RTC is used to &quot;seed&quot; the normal NuttX timer and the
NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES
is enabled in the NuttX configuration, then the RTC provides higher
resolution time and completely replaces the system timer for purpose of
date and time.
CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES
is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
A callback function will be executed when the alarm goes off
In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts
are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
A BKP register is incremented on each overflow interrupt creating, effectively,
a 48-bit RTC counter.
In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
(because the next overflow is not expected until the year 2106.
WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
HY-Mini specific Configuration Options
======================================
::
CONFIG_ARCH - Identifies the arch/ subdirectory. This should be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact chip:
CONFIG_ARCH_CHIP_STM32F103VC
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=hymini-stm32v (for the HY-Mini development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x0000C000 (48Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3 (required for PWM control of LCD backlight)
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_IWDG
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN1
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
The Timer3 alternate mapping is required for PWM control of LCD backlight
CONFIG_STM32_TIM3_PARTIAL_REMAP=y
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
Others alternate pin mappings available:
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_REMAP1
CONFIG_STM32_CAN1_REMAP2
CONFIG_STM32_CAN2_REMAP
STM32F103V specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
Note: USART1 is connected to a PL2303 serial to USB converter.
So USART1 is available through USB port labeled CN3 on the board.
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
and CONFIG_STM32_DMA2.
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
CONFIG_MMCSD_HAVE_CARDDETECT - Select if SDIO driver card detection
is 100% accurate (it is on the HY-MiniSTM32V)
HY-MiniSTM32V CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
HY-MiniSTM32V LCD Hardware Configuration. The HY-Mini board may be delivered with
either an SSD1289 or an R61505U LCD controller.
CONFIG_LCD_R61505U - Selects the R61505U LCD controller.
CONFIG_LCD_SSD1289 - Selects the SSD1289 LCD controller.
The following options apply for either LCD controller:
CONFIG_NX_LCDDRIVER - To be defined to include LCD driver
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. In this orientation, the HY-MiniSTM32V's
LCD used connector is at the right of the display.
Default is this 320x240 "landscape" orientation
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support. In this orientation, the HY-MiniSTM32V's
LCD used connector is at the bottom of the display. Default is
320x240 "landscape" orientation.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support. In this orientation, the
HY-MiniSTM32V's LCD used connector is at the top of the display.
Default is 320x240 "landscape" orientation.
CONFIG_LCD_BACKLIGHT - Define to support an adjustable backlight
using timer 3. The granularity of the settings is determined
by CONFIG_LCD_MAXPOWER. Requires CONFIG_STM32_TIM3.
Configurations
==============
NOTES:
- All configurations described below are using the mconf-based
configuration tool. To change their configuration using that tool, you
should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
- All configurations use a generic GNU EABI toolchain for Linux by
default.
- They are all configured to generate a binary image that can be flashed
through the STM32 internal bootloader.
Each HY-MiniSTM32V configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh hymini-stm32v:<subdir>
Where <subdir> is one of the following:
nsh and nsh2
------------
Configure the NuttShell (nsh) located at examples/nsh.
Differences between the two NSH configurations::
=========== ======================= ================================
nsh nsh2
=========== ======================= ================================
Serial Debug output: USART1 Debug output: USART1
Console: NSH output: USART1 NSH output: USART1 (2)
=========== ======================= ================================
microSD Yes (5) Yes (5)
Support
=========== ======================= ================================
FAT FS CONFIG_FAT_LCNAMES=y CONFIG_FAT_LCNAMES=y
Config CONFIG_FAT_LFN=n CONFIG_FAT_LFN=y (3)
=========== ======================= ================================
LCD Driver No Yes
Support
=========== ======================= ================================
RTC Support No Yes
=========== ======================= ================================
Support for No Yes
Built=in
Apps
=========== ======================= ================================
Built=in None apps/examples/nx
Apps apps/examples/nxhello
apps/system/usbmsc (4)
apps/examples/nximage
=========== ======================= ================================
(1) You will probably need to the PATH environment variable to set
up the correct PATH variable for whichever toolchain you may use.
(2) When any other device other than /dev/console is used for a user
interface, (1) linefeeds (\n) will not be expanded to carriage return
/ linefeeds \r\n). You will need to configure your terminal program
to account for this. And (2) input is not automatically echoed so
you will have to turn local echo on.
(3) Microsoft holds several patents related to the design of
long file names in the FAT file system. Please refer to the
details in the top-level NOTICE file. Please do not use FAT
long file name unless you are familiar with these patent issues.
(4) When built as an NSH add-on command (CONFIG_NSH_BUILTIN_APPS=y),
Caution should be used to assure that the SD drive is not in use when
the USB storage device is configured. Specifically, the SD driver
should be unmounted like::
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Card is mounted in NSH
...
nsh> umount /mnd/sdcard # Unmount before connecting USB!!!
nsh> msconn # Connect the USB storage device
...
nsh> msdis # Disconnect USB storate device
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Restore the mount
Failure to do this could result in corruption of the SD card format.
(5) Option CONFIG_NSH_ARCHINIT must be enabled in order to call the SDIO slot
initialization code.
usbmsc
------
This configuration directory exercises the USB mass storage
class driver at system/usbmsc. See examples/README.txt for
more information.
usbnsh
------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
NOTES:
1. This configuration does have UART2 output enabled and set up as
the system logging device::
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on UART2 unless you enable
some debug output or enable the USB monitor.
2. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (UART2 in this
configuration)::
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing::
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console
usbserial
---------
This configuration directory exercises the USB serial class
driver at examples/usbserial. See examples/README.txt for
more information.::
CONFIG_HOST_LINUX=y : Linux host
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Linux
USB debug output can be enabled as by changing the following
settings in the configuration file::
-CONFIG_DEBUG_FEATURES=n
-CONFIG_DEBUG_INFO=n
-CONFIG_DEBUG_USB=n
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_USB=y
-CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n
-CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
+CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
By default, the usbserial example uses the Prolific PL2303
serial/USB converter emulation. The example can be modified
serial/USB converter emulation. The example can be modified
to use the CDC/ACM serial class by making the following changes
to the configuration file::
-CONFIG_PL2303=y
+CONFIG_PL2303=n
-CONFIG_CDCACM=n
+CONFIG_CDCACM=y

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=====
maple
=====
This README discusses issues unique to NuttX configurations for the
maple board from LeafLabs (http://leaflabs.com).
Microprocessor: 32-bit ARM Cortex M3 at 72MHz STM32F103RBT6 (STM32F103CBT6 for mini version)
Memory: 120 KB Flash and 20 KB SRAM
I/O Pins Out: 43 (34 for mini version)
ADCs: 9 (at 12-bit resolution)
Peripherals: 4 timers, 2 I2Cs, 2 SPI ports, 3 USARTs
Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces
Please see below link for a list of maple devices and documentations.
http://leaflabs.com/devices
http://leaflabs.com/docs
This config supports Maple and Maple Mini.
Development Environment
=======================
Either Linux (recommended), Mac or Cygwin on Windows can be used for the development
environment. The source has been built only using the GNU toolchain (see below).
Other toolchains will likely cause problems.
DFU
===
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line::
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08005000. This offset is needed
to make space for the DFU loader and 0x08005000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for each
configuration. In LeafLabs case, we are using maple bootloader:
http://leaflabs.com/docs/bootloader.html
For Linux or Mac
-----------------
While on Linux or Mac, we can use dfu-util to upload nuttx binary.
1. Make sure we have installed dfu-util. (From yum, apt-get or build from source.)
2. Start the DFU loader (bootloader) on the maple board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Flash the nuttx.bin to the board use dfu-util. Here's an example::
$ dfu-util -a1 -d 1eaf:0003 -D nuttx.bin -R
For anything not clear, we can refer to LeafLabs official document:
http://leaflabs.com/docs/unix-toolchain.html
For Windows
------------
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Connect the maple board to your computer using a USB
cable.
2. Start the DFU loader on the maple board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Run the DFU SE program to load nuttx.bin into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo directory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.hex in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will end up with a file called
nuttx.dfu that you can use with the STMicro DFU SE program.
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each Maple configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh maple:<subdir>
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.::
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
Configuration Sub-directories
-----------------------------
nsh
---
This configuration directory provide the basic NuttShell (NSH).
A serial console is provided on USART1.
NOTES:
1. Currently configured for the STM32F103CB. But this is easily reconfigured::
CONFIG_ARCH_CHIP_STM32F103RB=n
CONFIG_ARCH_CHIP_STM32F103CB=y
2. Support for the I2C tool has been disabled, but can be restored
with following configure options::
System Type -> Peripherals
CONFIG_STM32_I2C1=y
CONFIG_STM32_I2C2=y
CONFIG_STM32_I2CTIMEOSEC=1
CONFIG_STM32_I2CTIMEOMS=500
CONFIG_STM32_I2CTIMEOTICKS=500
Drivers
CONFIG_I2C=y
Applications -> System Add-Ons
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_I2CTOOL_MINBUS=1
CONFIG_I2CTOOL_MAXBUS=2
CONFIG_I2CTOOL_MINADDR=0x0
CONFIG_I2CTOOL_MAXADDR=0xf0
CONFIG_I2CTOOL_MAXREGADDR=0xff
CONFIG_I2CTOOL_DEFFREQ=100000
nx
--
This configuration has been used to bring up the Sharp Memory LCD
on a custom board. This NX configuration was used for testing that
LCD. Debug output will appear on USART1.
NOTES:
1. Currently configured for the STM32F103CB. But this is easily reconfigured::
CONFIG_ARCH_CHIP_STM32F103RB=n
CONFIG_ARCH_CHIP_STM32F103CB=y
2. You won't be able to buy a Sharp Memory LCD to use with your
Maple. If you want one, you will have to make one yourself.
usbnsh
------
This is an alternative NuttShell (NSH) configuration that uses a USB
serial console for interaction.
NOTES:
1. Currently configured for the STM32F103CB. But this is easily reconfigured::
CONFIG_ARCH_CHIP_STM32F103RB=n
CONFIG_ARCH_CHIP_STM32F103CB=y
2. Support for the I2C tool has been disabled, but can be restored
with following configure options::
System Type -> Peripherals
CONFIG_STM32_I2C1=y
CONFIG_STM32_I2C2=y
CONFIG_STM32_I2CTIMEOSEC=1
CONFIG_STM32_I2CTIMEOMS=500
CONFIG_STM32_I2CTIMEOTICKS=500
Drivers
CONFIG_I2C=y
Applications -> System Add-Ons
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_I2CTOOL_MINBUS=1
CONFIG_I2CTOOL_MAXBUS=2
CONFIG_I2CTOOL_MINADDR=0x0
CONFIG_I2CTOOL_MAXADDR=0xf0
CONFIG_I2CTOOL_MAXREGADDR=0xff
CONFIG_I2CTOOL_DEFFREQ=100000

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Nucleo-64 Boards
================
ST Nucleo F103RB
================
The Nucleo-F103RB is a member of the Nucleo-64 board family. The Nucleo-64
is a standard board for use with several STM32 parts in the LQFP64 package.
Variants include
Order code Targeted STM32
------------- --------------
NUCLEO-F030R8 STM32F030R8T6
NUCLEO-F070RB STM32F070RBT6
NUCLEO-F072RB STM32F072RBT6
NUCLEO-F091RC STM32F091RCT6
NUCLEO-F103RB STM32F103RBT6
NUCLEO-F302R8 STM32F302R8T6
NUCLEO-F303RE STM32F303RET6
NUCLEO-F334R8 STM32F334R8T6
NUCLEO-F401RE STM32F401RET6
NUCLEO-F410RB STM32F410RBT6
NUCLEO-F411RE STM32F411RET6
NUCLEO-F446RE STM32F446RET6
NUCLEO-L053R8 STM32L053R8T6
NUCLEO-L073RZ STM32L073RZT6
NUCLEO-L152RE STM32L152RET6
NUCLEO-L452RE STM32L452RET6
NUCLEO-L476RG STM32L476RGT6
The Nucleo-F103RB is a member of the Nucleo-64 board family.
Configurations
==============
ihm07m1_b16:
------------
ihm07m1_b16:
------------
These examples are dedicated for the X-NUCLEO-IHM07M1 expansion board
based on L6230 DMOS driver for three-phase brushless DC motors.
These examples are dedicated for the X-NUCLEO-IHM07M1 expansion board
based on L6230 DMOS driver for three-phase brushless DC motors.
X-NUCLEO-IHM07M1 must be configured to work with FOC and 3-shunt
resistors. See ST documentation for details.
X-NUCLEO-IHM07M1 must be configured to work with FOC and 3-shunt
resistors. See ST documentation for details.
Pin configuration for the X-NUCLEO-IHM07M1 (TIM1 configuration):
Pin configuration for the X-NUCLEO-IHM07M1 (TIM1 configuration):
============== ================ =================
Board Function Chip Function Chip Pin Number
------------- ---------------- -----------------
============== ================ =================
Phase U high TIM1_CH1 PA8
Phase U enable GPIO_PC10 PC10
Phase V high TIM1_CH2 PA9
@ -76,6 +56,7 @@ Configurations
DEBUG2 GPIO PC6
DEBUG3 GPIO PC5
DEBUG4 GPIO PC8
============== ================ =================
Current shunt resistance = 0.33
Current sense gain = -1.53 (inverted current)

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===============
olimexino-stm32
===============

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===========
Shenzhou IV
===========
This README discusses issues unique to NuttX configurations for the Shenzhou
IV development board from www.armjishu.com featuring the STMicro STM32F107VCT
MCU. As of this writing, there are five models of the Shenzhou board:
1. Shenzhou I (STM32F103RB)
2. Shenzhou II (STM32F103VC)
3. Shenzhou III (STM32F103ZE)
4. Shenzhou IV (STM32F107VC)
5. Shenzhou king ((STM32F103ZG, core board + IO expansion board)).
Support is currently provided for the Shenzhou IV only. Features of the
Shenzhou IV board include:
- STM32F107VCT
- 10/100M PHY (DM9161AEP)
- TFT LCD Connector
- USB OTG
- CAN (CAN1=2)
- USART connectos (USART1-2)
- RS-485
- SD card slot
- Audio DAC (PCM1770)
- SPI Flash (W25X16)
- (4) LEDs (LED1-4)
- 2.4G Wireless (NRF24L01 SPI module)
- 315MHz Wireless (module)
- (4) Buttons (KEY1-4, USERKEY2, USERKEY, TEMPER, WAKEUP)
- VBUS/external +4V select
- 5V/3.3V power conversion
- Extension connector
- JTAG
STM32F107VCT Pin Usage
======================
..
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground.
24 PA1 MII_RX_CLK
RMII_REF_CLK
25 PA2 MII_MDIO
26 PA3 315M_VT
29 PA4 DAC_OUT1 To CON5(CN14)
30 PA5 DAC_OUT2 To CON5(CN14). JP10
SPI1_SCK To the SD card, SPI FLASH
31 PA6 SPI1_MISO To the SD card, SPI FLASH
32 PA7 SPI1_MOSI To the SD card, SPI FLASH
67 PA8 MCO To DM9161AEP PHY
68 PA9 USB_VBUS MINI-USB-AB. JP3
USART1_TX MAX3232 to CN5
69 PA10 USB_ID MINI-USB-AB. JP5
USART1_RX MAX3232 to CN5
70 PA11 USB_DM MINI-USB-AB
71 PA12 USB_DP MINI-USB-AB
72 PA13 TMS/SWDIO
76 PA14 TCK/SWCLK
77 PA15 TDI
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
35 PB0 ADC_IN1 To CON5(CN14)
36 PB1 ADC_IN2 To CON5(CN14)
37 PB2 DATA_LE To TFT LCD (CN13)
BOOT1 JP13
89 PB3 TDO/SWO
90 PB4 TRST
91 PB5 CAN2_RX
92 PB6 CAN2_TX JP11
I2C1_SCL
93 PB7 I2C1_SDA
95 PB8 USB_PWR Drives USB VBUS
96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
47 PB10 USERKEY Connected to KEY2
48 PB11 MII_TX_EN Ethernet PHY
51 PB12 I2S_WS Audio DAC
MII_TXD0 Ethernet PHY
52 PB13 I2S_CK Audio DAC
MII_TXD1 Ethernet PHY
53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14.
54 PB15 I2S_DIN Audio DAC
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
15 PC0 POTENTIO_METER
16 PC1 MII_MDC Ethernet PHY
17 PC2 WIRELESS_INT
18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
33 PC4 USERKEY2 Connected to KEY1
34 PC5 TP_INT JP6. To TFT LCD (CN13) module
MII_INT Ethernet PHY
63 PC6 I2S_MCK Audio DAC. Active low: Pulled high
64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high
65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high
66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high
78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module
79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module
80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module
7 PC13 TAMPER Connected to KEY3
8 PC14 OSC32_IN Y1 32.768Khz XTAL
9 PC15 OSC32_OUT Y1 32.768Khz XTAL
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
81 PD0 CAN1_RX
82 PD1 CAN1_TX
83 PD2 LED1 Active low: Pulled high
84 PD3 LED2 Active low: Pulled high
85 PD4 LED3 Active low: Pulled high
86 PD5 485_TX Same as USART2_TX but goes to SP3485
USART2_TX MAX3232 to CN6
87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
USART2_RX MAX3232 to CN6
88 PD7 LED4 Active low: Pulled high
485_DIR SP3485 read enable (not)
55 PD8 MII_RX_DV Ethernet PHY
RMII_CRSDV Ethernet PHY
56 PD9 MII_RXD0 Ethernet PHY
57 PD10 MII_RXD1 Ethernet PHY
58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
60 PD13 LCD_RS To TFT LCD (CN13)
61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14.
62 PD15 LCD_RD To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
97 PE0 DB00 To TFT LCD (CN13)
98 PE1 DB01 To TFT LCD (CN13)
1 PE2 DB02 To TFT LCD (CN13)
2 PE3 DB03 To TFT LCD (CN13)
3 PE4 DB04 To TFT LCD (CN13)
4 PE5 DB05 To TFT LCD (CN13)
5 PE6 DB06 To TFT LCD (CN13)
38 PE7 DB07 To TFT LCD (CN13)
39 PE8 DB08 To TFT LCD (CN13)
40 PE9 DB09 To TFT LCD (CN13)
41 PE10 DB10 To TFT LCD (CN13)
42 PE11 DB11 To TFT LCD (CN13)
43 PE12 DB12 To TFT LCD (CN13)
44 PE13 DB13 To TFT LCD (CN13)
45 PE14 DB14 To TFT LCD (CN13)
46 PE15 DB15 To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
73 N/C
12 OSC_IN Y2 25Mhz XTAL
13 OSC_OUT Y2 25Mhz XTAL
94 BOOT0 JP15 (3.3V or GND)
14 RESET S5
6 VBAT JP14 (3.3V or battery)
49 VSS_1 GND
74 VSS_2 GND
99 VSS_3 GND
27 VSS_4 GND
10 VSS_5 GND
19 VSSA VSSA
20 VREF- VREF-
LEDs
====
The Shenzhou board has four LEDs labeled LED1, LED2, LED3 and LED4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows::
SYMBOL Meaning LED1* LED2 LED3 LED4****
------------------- ----------------------- ------- ------- ------- ------
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
**** LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Shenzhou-specific Configuration Options
=======================================
..
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=shenzhou (for the Shenzhou development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SHENZHOU=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_ETHMAC
CONFIG_STM32_OTGFS
CONFIG_STM32_IWDG
CONFIG_STM32_PWR -- Required for RTC
APB1 (low speed)
----------------
CONFIG_STM32_BKP
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_CAN2
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_WWDG
APB2 (high speed)
-----------------
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32107xxx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
CONFIG_STM32_MII - Support Ethernet MII interface
CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface
CONFIG_STM32_RMII - Support Ethernet RMII interface
CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface
CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select full duplex mode. Default: half-duplex
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select 100 MBps speed. Default: 10 Mbps
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
defined. The PHY status register address may diff from PHY to PHY. This
configuration sets the address of the PHY status register.
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides bit mask indicating 10 or 100MBps speed.
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provide bit mask indicating full or half duplex modes.
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the mode bits indicating full duplex mode.
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
but some hooks are indicated with this condition.
Shenzhou CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
Shenzhou LCD Hardware Configuration
The LCD driver supports the following LCDs on the STM324xG_EVAL board:
AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
AM-240320D5TOQW01H (LCD_ILI9325)
Configuration options.
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
For the Shenzhou board, the edge opposite from the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse
landscape" support. Default is this 320x240 "landscape"
orientation
For the Shenzhou board, the edge next to the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_ILI9320_DISABLE (includes ILI9321)
CONFIG_STM32_ILI9325_DISABLE
STM32 USB OTG FS Host Driver Support
Pre-requisites
CONFIG_USBHOST - Enable USB host support
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
CONFIG_STM32_SYSCFG - Needed
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
Default 128 (512 bytes)
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
in 32-bit words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
debug. Depends on CONFIG_DEBUG_FEATURES.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
packets. Depends on CONFIG_DEBUG_FEATURES.
Configurations
==============
Each Shenzhou configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh shenzhou:<subdir>
Where <subdir> is one of the following:
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables both the serial and telnet NSH interfaces.::
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
CONFIG_NSH_DHCPC=n : DHCP is disabled
CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2
CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1
NOTES:
1. This example assumes that a network is connected. During its
initialization, it will try to negotiate the link speed. If you have
no network connected when you reset the board, there will be a long
delay (maybe 30 seconds?) before anything happens. That is the timeout
before the networking finally gives up and decides that no network is
available.
2. Enabling the ADC example:
The only internal signal for ADC testing is the potentiometer input::
ADC1_IN10(PC0) Potentiometer
External signals are also available on CON5 CN14::
ADC_IN8 (PB0) CON5 CN14 Pin2
ADC_IN9 (PB1) CON5 CN14 Pin1
The signal selection is hard-coded in boards/arm/stm32/shenzhou/src/up_adc.c: The
potentiometer input (only) is selected.
These selections will enable sampling the potentiometer input at 100Hz using
Timer 1::
CONFIG_ANALOG=y : Enable analog device support
CONFIG_ADC=y : Enable generic ADC driver support
CONFIG_ADC_DMA=n : ADC DMA is not supported
CONFIG_STM32_ADC1=y : Enable ADC 1
CONFIG_STM32_TIM1=y : Enable Timer 1
CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC
CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
nxwm
----
This is a special configuration setup for the NxWM window manager
UnitTest. The NxWM window manager can be found here::
apps/graphics/NxWidgets/nxwm
The NxWM unit test can be found at::
apps/graphics/NxWidgets/UnitTests/nxwm
NOTE: JP6 selects between the touchscreen interrupt and the MII
interrupt. It should be positioned 1-2 to enable the touchscreen
interrupt.
NOTE: Reading from the LCD is not currently supported by this
configuration. The hardware will support reading from the LCD
and drivers/lcd/ssd1289.c also supports reading from the LCD.
This limits some graphics capabilities.
Reading from the LCD is not supported only because it has not
been tested. If you get inspired to test this feature, you can
turn the LCD read functionality on by setting::
-CONFIG_LCD_NOGETRUN=y
+# CONFIG_LCD_NOGETRUN is not set
-CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_WRITEONLY is not set
thttpd
------
This builds the THTTPD web server example using the THTTPD and
the apps/examples/thttpd application.
NOTE: This example can only be built using the older toolchains
due to incompatibilities introduced in later GCC releases.

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================
ST STM3210E-EVAL
================
This README discusses issues unique to NuttX configurations for the
STMicro STM3210E-EVAL development board.
DFU and JTAG
============
Enbling Support for the DFU Bootloader
--------------------------------------
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line::
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed
to make space for the DFU loader and 0x08003000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for the
configuration.
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU
file (nuttx.dfu)... see below for details.
2. Connect the STM3210E-EVAL board to your computer using a USB cable.
3. Start the DFU loader on the STM3210E-EVAL board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
4. Run the DFU SE program to load nuttx.dfu into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo directory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.hex in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will end up with a file called
nuttx.dfu that you can use with the STMicro DFU SE program.
Enabling JTAG
-------------
If you are not using the DFU, then you will probably also need to enable
JTAG support. By default, all JTAG support is disabled but there NuttX
configuration options to enable JTAG in various different ways.
These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO
MAPR register. These bits are used to configure the SWJ and trace alternate
function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the
Cortex debug port. The default state in this port is for all JTAG support
to be disabled.
CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full
SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable
full SWJ (JTAG-DP + SW-DP) but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP
disabled and SW-DP enabled.
The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100
which disable JTAG-DP and SW-DP.
OpenOCD
=======
I have also used OpenOCD with the STM3210E-EVAL. In this case, I used
the Olimex USB ARM OCD. See the script in boards/arm/stm32/stm3210e-eval/tools/oocd.sh
for more information. Using the script:
- Start the OpenOCD GDB server::
cd <nuttx-build-directory>
boards/arm/stm32/stm3210e-eval/tools/oocd.sh $PWD
- Load NuttX::
cd <nuttx-built-directory>
arm-none-eabi-gdb nuttx
gdb> target remote localhost:3333
gdb> mon reset
gdb> mon halt
gdb> load nuttx
- Running NuttX::
gdb> mon reset
gdb> c
LEDs
====
The STM3210E-EVAL board has four LEDs labeled LD1, LD2, LD3 and LD4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
=================== ======================= ======= ======= ======= ======
SYMBOL Meaning LED1[1] LED2 LED3 LED4[4]
=================== ======================= ======= ======= ======= ======
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt[2] ON N/C N/C OFF
LED_SIGNAL In a signal handler[3] N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode
=================== ======================= ======= ======= ======= ======
[1] If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
[2] The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
[3] LED2 may also flicker normally if signals are processed.
[4] LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Temperature Sensor
==================
LM-75 Temperature Sensor Driver
-------------------------------
Support for the on-board LM-75 temperature sensor is available. This
support has been verified, but has not been included in any of the
available the configurations. To set up the temperature sensor, add the
following to the NuttX configuration file::
Drivers -> Sensors
CONFIG_SENSORS_LM75=y
CONFIG_LM75_I2C=y
Then you can implement logic like the following to use the temperature
sensor::
#include <nuttx/sensors/lm75.h>
#include <arch/board/board.h>
ret = stm32_lm75initialize("/dev/temp"); /* Register the temperature sensor */
fd = open("/dev/temp", O_RDONLY); /* Open the temperature sensor device */
ret = ioctl(fd, SNIOC_FAHRENHEIT, 0); /* Select Fahrenheit */
bytesread = read(fd, buffer, 8*sizeof(b16_t)); /* Read temperature samples */
More complex temperature sensor operations are also available. See the
IOCTL commands enumerated in include/nuttx/sensors/lm75.h. Also read the
descriptions of the stm32_lm75initialize() and stm32_lm75attach()
interfaces in the arch/board/board.h file (sames as
boards/arm/stm32/stm3210e-eval/include/board.h).
NSH Command Line Application
----------------------------
There is a tiny NSH command line application at examples/system/lm75 that
will read the current temperature from an LM75 compatible temperature sensor
and print the temperature on stdout in either units of degrees Fahrenheit or
Centigrade. This tiny command line application is enabled with the following
configuration options::
Library
CONFIG_LIBM=y
CONFIG_LIBC_FLOATINGPOINT=y
Applications -> NSH Library
CONFIG_NSH_ARCHINIT=y
Applications -> System Add-Ons
CONFIG_SYSTEM_LM75=y
CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp"
CONFIG_SYSTEM_LM75_FAHRENHEIT=y (or CENTIGRADE)
CONFIG_SYSTEM_LM75_STACKSIZE=1024
CONFIG_SYSTEM_LM75_PRIORITY=100
RTC
===
The STM32 RTC may configured using the following settings.::
CONFIG_RTC - Enables general support for a hardware RTC. Specific
architectures may require other specific settings.
CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
second, usually supporting a 32-bit time_t value. In this case,
the RTC is used to &quot;seed&quot; the normal NuttX timer and the
NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES
is enabled in the NuttX configuration, then the RTC provides higher
resolution time and completely replaces the system timer for purpose of
date and time.
CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES
is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
A callback function will be executed when the alarm goes off.
In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts
are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
A BKP register is incremented on each overflow interrupt creating, effectively,
a 48-bit RTC counter.
In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
(because the next overflow is not expected until the year 2106).
WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
FSMC SRAM
=========
The 8-Mbit SRAM is connected to the STM32 at PG10 which will be FSMC_NE3, Bank1
SRAM3. This memory will appear at address 0x68000000.
The on-board SRAM can be configured by setting::
CONFIG_STM32_FSMC=y : Enables the FSMC
CONFIG_STM32_EXTERNAL_RAM=y : Enable external SRAM support
CONFIG_HEAP2_BASE=0x68000000 : SRAM will be located at 0x680000000
CONFIG_HEAP2_SIZE=1048576 : The size of the SRAM is 1Mbyte
CONFIG_MM_REGIONS=2 : There will be two memory regions
: in the heap
STM3210E-EVAL-specific Configuration Options
============================================
..
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103ZE
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=stm3210e_eval (for the STM3210E-EVAL development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_STM3210E_EVAL=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN1
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
Alternate pin mappings. The STM3210E-EVAL board requires only CAN1 remapping
On the STM3210E-EVAL board pin PB9 is wired as TX and pin PB8 is wired as RX.
Which then makes the proper connection through the CAN transceiver SN65HVD230
out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH.
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_REMAP1
CONFIG_STM32_CAN1_REMAP2
CONFIG_STM32_CAN2_REMAP
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
and CONFIG_STM32_DMA2.
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
STM3210E-EVAL CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
STM3210E-EVAL LCD Hardware Configuration
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
(this setting is informative only... not used).
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support. In this orientation, the STM3210E-EVAL's
LCD ribbon cable is at the bottom of the display. Default is
320x240 "landscape" orientation.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support. In this orientation, the
STM3210E-EVAL's LCD ribbon cable is at the top of the display.
Default is 320x240 "landscape" orientation.
CONFIG_STM3210E_LCD_BACKLIGHT - Define to support a backlight.
CONFIG_STM3210E_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an
adjustable backlight will be provided using timer 1 to generate
various pulse widthes. The granularity of the settings is
determined by CONFIG_LCD_MAXPOWER. If CONFIG_STM3210E_LCD_PWM (or
CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight
is provided.
CONFIG_STM3210E_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM3210E_AM240320_DISABLE
CONFIG_STM3210E_SPFD5408B_DISABLE
CONFIG_STM3210E_R61580_DISABLE
Configurations
==============
Each STM3210E-EVAL configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh stm3210e-eval:<subdir>
Where <subdir> is one of the following:
composite
---------
This configuration exercises a composite USB interface consisting
of a CDC/ACM device and a USB mass storage device. This configuration
uses apps/system/composite.
nsh and nsh2
------------
Configure the NuttShell (nsh) located at examples/nsh.
Differences between the two NSH configurations::
=========== ======================= ================================
nsh nsh2
=========== ======================= ================================
Platform Windows with Cygwin (2) Windows with Cygwin (2)
----------- ----------------------- --------------------------------
Toolchain: NuttX buildroot (1) ARM EABI GCC for Windows (1)
----------- ----------------------- --------------------------------
Loader: DfuSe DfuSe
----------- ----------------------- --------------------------------
Serial Debug output: USART1 Debug output: USART1
Console: NSH output: USART1 NSH output: USART1 (3)
----------- ----------------------- --------------------------------
I2C No I2C1
----------- ----------------------- --------------------------------
microSD Yes Yes
Support
----------- ----------------------- --------------------------------
FAT FS CONFIG_FAT_LCNAMES=y CONFIG_FAT_LCNAMES=y
Config CONFIG_FAT_LFN=n CONFIG_FAT_LFN=y (4)
----------- ----------------------- --------------------------------
Support for No Yes
Built-in
Apps
----------- ----------------------- --------------------------------
Built-in None apps/examples/nx
Apps apps/examples/nxhello
apps/system/usbmsc (5)
apps/system/i2c
=========== ======================= ================================
(1) You will probably need to modify PATH environment variable to
to include the correct path to the binaries for whichever
toolchain you may use.
(2) Since DfuSe is assumed, this configuration may only work under
Cygwin without modification.
(3) When any other device other than /dev/console is used for a user
interface, (1) linefeeds (\n) will not be expanded to carriage return
/ linefeeds \r\n). You will need to configure your terminal program
to account for this. And (2) input is not automatically echoed so
you will have to turn local echo on.
(4) Microsoft holds several patents related to the design of
long file names in the FAT file system. Please refer to the
details in the top-level NOTICE file. Please do not use FAT
long file name unless you are familiar with these patent issues.
(5) When built as an NSH add-on command (CONFIG_NSH_BUILTIN_APPS=y),
Caution should be used to assure that the SD drive is not in use when
the USB storage device is configured. Specifically, the SD driver
should be unmounted like:
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Card is mounted in NSH
...
nsh> umount /mnd/sdcard # Unmount before connecting USB!!!
nsh> msconn # Connect the USB storage device
...
nsh> msdis # Disconnect USB storate device
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Restore the mount
Failure to do this could result in corruption of the SD card format.
1. Both configurations use the mconf-based configuration tool. To
change these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. The nsh2 contains support for some built-in applications that can be
enabled by make some additional minor changes:
a. examples/can. The CAN test example can be enabled by changing the
following settings in nsh2/defconfig:
CONFIG_CAN=y : Enable CAN "upper-half" driver support
CONFIG_STM32_CAN1=y : Enable STM32 CAN1 "lower-half" driver support
The default CAN settings may need to change in your board board
configuration:
CONFIG_CAN_EXTID=y : Support extended IDs
CONFIG_STM32_CAN1_BAUD=250000 : Bit rate: 250 KHz
CONFIG_STM32_CAN_TSEG1=12 : 80% sample point
CONFIG_STM32_CAN_TSEG2=3
nx
---
An example using the NuttX graphics system (NX). This example
focuses on general window controls, movement, mouse and keyboard
input.::
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
CONFIG_LCD_RPORTRAIT=y : 240x320 reverse portrait
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. If you configured the multi-used NX server (which is disabled
by default), then you would also need::
CONFIG_EXAMPLES_NX_CLIENTPRIO=80
CONFIG_EXAMPLES_NX_SERVERPRIO=120
CONFIG_EXAMPLES_NX_STACKSIZE=2048
3. This example provides a framework for a number of other standalone
graphics tests.
a. apps/examples/nxlines: The NXLINES graphic example illustrates
drawing of fat lines in various orientations. You can modify
this configuration so to support the NXLINES example by making
the following modifications to the NuttX configuration file:
Provide the new start-up entry point:
CONFIG_INIT_ENTRYPOINT="nxlines_main"
Disable apps/examples/nx:
CONFIG_EXAMPLES_NX=n
Enable and configure apps/nxlines/nxlines:
CONFIG_EXAMPLES_NXLINES=y
CONFIG_EXAMPLES_NXLINES_VPLANE=0
CONFIG_EXAMPLES_NXLINES_DEVNO=0
CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=n
CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320
CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0
CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0
CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb
CONFIG_EXAMPLES_NXLINES_BPP=16
CONFIG_EXAMPLES_NXLINES_EXTERNINIT=n
b. apps/examples/nxtext: Another example using the NuttX graphics
system (NX). This example focuses on placing text on the
background while pop-up windows occur. Text should continue to
update normally with or without the popup windows present.
You can modify this configuration so to support the NXLINES
example by making the following modifications to the NuttX
configuration file:
Provide the new start-up entry point::
CONFIG_INIT_ENTRYPOINT="nxtext_main"
Disable apps/examples/nx::
CONFIG_EXAMPLES_NX=n
Enable an NX font::
CONFIG_NXFONT_SERIF22X28B=y
Enable and configure apps/nxlines/nxtext::
CONFIG_EXAMPLES_NXTEXT=y
CONFIG_EXAMPLES_NXTEXT_VPLANE=0
CONFIG_EXAMPLES_NXTEXT_DEVNO=0
CONFIG_EXAMPLES_NXTEXT_BPP=16
CONFIG_EXAMPLES_NXTEXT_BMCACHE=512
CONFIG_EXAMPLES_NXTEXT_GLCACHE=16
CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=n
CONFIG_EXAMPLES_NXTEXT_BGCOLOR=0x0011
CONFIG_EXAMPLES_NXTEXT_BGFONTCOLOR=0xffdf
CONFIG_EXAMPLES_NXTEXT_PUCOLOR=0xfd20
CONFIG_EXAMPLES_NXTEXT_PUFONTCOLOR=0x001f
CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=n
CONFIG_EXAMPLES_NXTEXT_BGFONTID=11
CONFIG_EXAMPLES_NXTEXT_PUFONTID=1
CONFIG_EXAMPLES_NXTEXT_EXTERNINIT=n
If you configured the multi-used NX server (which is disabled
by default), then you would also need::
CONFIG_EXAMPLES_NXTEXT_STACKSIZE=2048
CONFIG_EXAMPLES_NXTEXT_CLIENTPRIO=80
CONFIG_EXAMPLES_NXTEXT_SERVERPRIO=120
c. Others could be similar configured: apps/examples/nxhello,
nximage, ...
4. The nsh configuration was used to verify the discrete joystick
(DJoystick driver). If you would like to duplicate this test, below
are the configuration changes needed to setup the DJoystick driver
(see nuttx/drivers/input/djoystick.c) and the DJoystick test (see
apps/examples/djoystick)::
Pre-requisites:
CONFIG_BUILTIN=y # Enable support for built-in applications
CONFIG_NSH_BUILTIN_APPS=y # Enable NSH built-in applications
Enable the DJoystick driver:
CONFIG_INPUT=y # Enable input driver support
CONFIG_INPUT_DJOYSTICK=y # Enable the joystick drivers
# (default parameters should be okay)
Enable the DJoystick Example:
CONFIG_EXAMPLES_DJOYSTICK=y # Enable the DJoystick example
CONFIG_EXAMPLES_DJOYSTICK_DEVNAME="/dev/djoy0"
When running the configuration, you should see the built-in
application 'djoy'. Just type 'djoy' at the NSH command prompt.
nxterm
------
This is yet another NSH configuration. This NSH configuration differs
from the other, however, in that it uses the NxTerm driver to host
the NSH shell.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Some of the differences in this configuration include these settings
in the defconfig file:
These select NX Multi-User mode::
CONFG_NX_MULTIUSER=y
CONFIG_DISABLE_MQUEUE=n
The following definition in the defconfig file to enables the NxTerm
driver::
CONFIG_NXTERM=y
And this selects apps/examples/nxterm instead of apps/examples/nsh::
CONFIG_EXAMPLES_NXTERM=y
Other configuration settings of interest::
CONFIG_HOST_WINDOWS=y : Windows
CONFIG_WINDOWS_CYGWIN=y : with Cygwin
CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin
CONFIG_LCD_LANDSCAPE=y : 320x240 landscape
pm
--
This is a configuration that is used to test STM32 power management, i.e.,
to test that the board can go into lower and lower states of power usage
as a result of inactivity. This configuration is based on the nsh2
configuration with modifications for testing power management. This
configuration should provide some guideline for power management in your
STM32 application.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Default configuration is Cygwin under windows using the ARM EABI
toolchain::
CONFIG_HOST_WINDOWS=y : Windows
CONFIG_WINDOWS_CYGWIN=y : Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. CONFIG_ARCH_CUSTOM_PMINIT and CONFIG_ARCH_IDLE_CUSTOM are necessary
parts of the PM configuration::
CONFIG_ARCH_CUSTOM_PMINIT=y
CONFIG_ARCH_CUSTOM_PMINIT moves the PM initialization from
arch/arm/src/stm32/stm32_pminitialiaze.c to boards/arm/stm32/stm3210-eval/src/stm32_pm.c.
This allows us to support board-specific PM initialization.::
CONFIG_ARCH_IDLE_CUSTOM=y
The bulk of the PM activities occur in the IDLE loop. The IDLE loop
is special because it is what runs when there is no other task running.
Therefore when the IDLE executes, we can be assure that nothing else
is going on; this is the ideal condition for doing reduced power
management.
The configuration CONFIG_ARCH_IDLE_CUSTOM allows us to "steal" the
normal STM32 IDLE loop (of arch/arm/src/stm32/stm32_idle.c) and replace
this with our own custom IDLE loop (at boards/arm/stm32/stm3210-eval/src/up_idle.c).
4. Here are some additional things to note in the configuration::
CONFIG_PM_BUTTONS=y
CONFIG_PM_BUTTONS enables button support for PM testing. Buttons can
drive EXTI interrupts and EXTI interrupts can be used to wakeup for
certain reduced power modes (STOP mode). The use of the buttons here
is for PM testing purposes only; buttons would normally be part the
application code and CONFIG_PM_BUTTONS would not be defined.::
CONFIG_RTC_ALARM=y
The RTC alarm is used to wake up from STOP mode and to transition to
STANDBY mode. This used of the RTC alarm could conflict with other
uses of the RTC alarm in your application.
usbserial
---------
This configuration directory exercises the USB serial class
driver at examples/usbserial. See examples/README.txt for
more information.::
CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin
USB debug output can be enabled as by changing the following
settings in the configuration file::
-CONFIG_DEBUG_FEATURES=n
-CONFIG_DEBUG_INFO=n
-CONFIG_DEBUG_USB=n
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_USB=y
-CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n
-CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
+CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
By default, the usbserial example uses the Prolific PL2303
serial/USB converter emulation. The example can be modified
to use the CDC/ACM serial class by making the following changes
to the configuration file::
-CONFIG_PL2303=y
+CONFIG_PL2303=n
-CONFIG_CDCACM=n
+CONFIG_CDCACM=y
The example can also be converted to use the alternative
USB serial example at apps/examples/usbterm by changing the
following::
-CONFIG_EXAMPLES_USBSERIAL=y
+CONFIG_EXAMPLES_USBSERIAL=n
usbmsc
------
This configuration directory exercises the USB mass storage
class driver at system/usbmsc. See examples/README.txt for
more information.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Build environment (can be easily reconfigured)::
CONFIG_HOST_LINUX=y : Linux (or Cygwin)
CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin

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==========
STM32 Tiny
==========
This README discusses issues unique to NuttX configurations for the
STM32 Tiny development board.
This board is available from several vendors on the net, and may
be sold under different names. It is based on a STM32 F103C8T6 MCU, and
is (always ?) bundled with a nRF24L01 wireless communication module.
Contents
========
- LEDs
- PWM
- UARTs
- Timer Inputs/Outputs
- STM32 Tiny -specific Configuration Options
- Configurations
LEDs
====
The STM32Tiny board has only one software controllable LED.
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
enabled.
If enabled the LED is simply turned on when the board boots
successfully, and is blinking on panic / assertion failed.
PWM
===
The STM32 Tiny has no real on-board PWM devices, but the board can be
configured to output a pulse train using TIM3 CH2 on the GPIO line B.5
(connected to the LED).
Please note that the CONFIG_STM32_TIM3_PARTIAL_REMAP option must be enabled
in this case.
UARTs
=====
UART/USART PINS
---------------
::
USART1
RX PA10
TX PA9
USART2
CK PA4
CTS PA0*
RTS PA1
RX PA3
TX PA2
USART3
CK PB12*
CTS PB13*
RTS PB14*
RX PB11
TX PB10
* these IO lines are intended to be used by the wireless module on the board.
Default USART/UART Configuration
--------------------------------
USART1 (RX & TX only) is available through the RS-232 port on the board. A MAX232 chip converts
voltage to RS-232 level. This serial port can be used to flash a firmware using the boot loader
integrated in the MCU.
Timer Inputs/Outputs
====================
TIM1
CH1 PA8
CH2 PA9*
CH3 PA10*
CH4 PA11*
TIM2
CH1 PA0*, PA15, PA5
CH2 PA1, PB3
CH3 PA2, PB10*
CH4 PA3, PB11
TIM3
CH1 PA6, PB4
CH2 PA7, PB5*
CH3 PB0
CH4 PB1*
TIM4
CH1 PB6*
CH2 PB7
CH3 PB8
CH4 PB9*
* Indicates pins that have other on-board functions and should be used only
with care (See board datasheet).
STM32 Tiny - specific Configuration Options
===============================================
..
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103C8=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=stm32_tiny
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_STM32_TINY=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=20480 (20Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
..
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_CRC
CONFIG_STM32_BKPSRAM
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_PWR -- Required for RTC
APB2
----
CONFIG_STM32_TIM1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_SPI1
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation or ADC conversion.
Note that ADC require two definitions: Not only do you have
to assign the timer (n) for used by the ADC, but then you also have to
configure which ADC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default only SW-DP is enabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32Tiny specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3)
for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
STM32Tiny CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
STM32Tiny SPI Configuration
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
Configurations
==============
Each STM32Tiny configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh STM32Tiny:<subdir>
Where <subdir> is one of the following:
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh. This
configuration enables a console on UART1. Support for
builtin applications is enabled, but in the base configuration no
builtin applications are selected (see NOTES below).
NOTES:
..
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the ARM EABI toolchain
for Windows and builds under Cygwin (or probably MSYS). That
can easily be reconfigured, of course.
CONFIG_HOST_WINDOWS=y : Builds under Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. This example supports the PWM test (apps/examples/pwm) but this must
be manually enabled by selecting:
CONFIG_PWM=y : Enable the generic PWM infrastructure
CONFIG_STM32_TIM3=y : Enable TIM3
CONFIG_STM32_TIM3_PWM=y : Use TIM3 to generate PWM output
CONFIG_STM32_TIM3_PARTIAL_REMAP=y : Required to have the port B5 as timer PWM output (channel 2)
CONFIG_STM32_TIM3_CHANNEL=2
See also apps/examples/README.txt
Note that the only supported board configuration uses the board LED as PWM output.
Special PWM-only debug options:
CONFIG_DEBUG_PWM_INFO
7. USB Support (CDC/ACM device)
CONFIG_STM32_OTGFS=y : STM32 OTG FS support
CONFIG_USBDEV=y : USB device support must be enabled
CONFIG_CDCACM=y : The CDC/ACM driver must be built
CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled
CONFIG_NSH_ARCHINIT=y : To perform USB initialization
8. Using the USB console.
The STM32Tiny NSH configuration can be set up to use a USB CDC/ACM
(or PL2303) USB console. The normal way that you would configure the
the USB console would be to change the .config file like this:
CONFIG_STM32_OTGFS=y : STM32 OTG FS support
CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console
CONFIG_DEV_CONSOLE=n : Inhibit use of /dev/console by other logic
CONFIG_USBDEV=y : USB device support must be enabled
CONFIG_CDCACM=y : The CDC/ACM driver must be built
CONFIG_CDCACM_CONSOLE=y : Enable the CDC/ACM USB console.
NOTE: When you first start the USB console, you have hit ENTER a few
times before NSH starts. The logic does this to prevent sending USB data
before there is anything on the host side listening for USB serial input.
9. Here is an alternative USB console configuration. The following
configuration will also create a NSH USB console but this version
will use /dev/console. Instead, it will use the normal /dev/ttyACM0
USB serial device for the console:
CONFIG_STM32_OTGFS=y : STM32 OTG FS support
CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console
CONFIG_DEV_CONSOLE=y : /dev/console exists (but NSH won't use it)
CONFIG_USBDEV=y : USB device support must be enabled
CONFIG_CDCACM=y : The CDC/ACM driver must be built
CONFIG_CDCACM_CONSOLE=n : Don't use the CDC/ACM USB console.
CONFIG_NSH_USBCONSOLE=y : Instead use some other USB device for the console
The particular USB device that is used is:
CONFIG_NSH_USBCONDEV="/dev/ttyACM0"
The advantage of this configuration is only that it is easier to
bet working. This alternative does has some side effects:
- When any other device other than /dev/console is used for a user
interface, linefeeds (\n) will not be expanded to carriage return /
linefeeds (\r\n). You will need to set your terminal program to account
for this.
- /dev/console still exists and still refers to the serial port. So
you can still use certain kinds of debug output (see include/debug.h, all
of the debug output from interrupt handlers will be lost.
- But don't enable USB debug output! Since USB is console is used for
USB debug output and you are using a USB console, there will be
infinite loops and deadlocks: Debug output generates USB debug
output which generatates USB debug output, etc. If you want USB
debug output, you should consider enabling USB trace
(CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_USBMONITOR).
See the usbnsh configuration below for more information on configuring
USB trace output and the USB monitor.
usbnsh
------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
NOTES:
..
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the ARM EABI toolchain
for Windows and builds under Cygwin (or probably MSYS). That
can easily be reconfigured, of course.
CONFIG_HOST_WINDOWS=y : Builds under Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. This configuration does have UART2 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on UART2 unless you enable
some debug output or enable the USB monitor.
4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (UART2 in this
configuration):
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
5. By default, this project assumes that you are *NOT* using the DFU
bootloader.
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing:
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console

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===============
STM32BUTTERFLY2
===============

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=================
stm32f103-minimum
=================
This README discusses issues unique to NuttX configurations for the
STM32F103C8T6 Minimum System Development Board for ARM Microcontroller.
STM32F103C8T6 Minimum System Development Boards:
================================================
This STM32F103C8T6 minimum system development board is available from
several vendors on the net, and may be sold under different names or
no name at all. It is based on a STM32F103C8T6 and has a DIP-40 form-
factor.
There are four versions of very similar boards: Red, Blue, RoboDyn Black and
Black.
See: https://wiki.stm32duino.com/index.php?title=Blue_Pill
https://wiki.stm32duino.com/index.php?title=Red_Pill
https://wiki.stm32duino.com/index.php?title=RobotDyn_Black_Pill
https://wiki.stm32duino.com/index.php?title=Black_Pill
The Red Board:
Good things about the red board:
- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
programmatically drag down for automated USB reset.
- large power capacitors and LDO power.
- User LED on PC13
Problems with the red board:
- Silk screen is barely readable, the text is chopped off on some of
the pins
- USB connector only has two anchor points and it is directly soldered
on the surface
- Small reset button with hardly any resistance
The Blue Board:
Good things about the blue board:
- Four soldered anchor point on the USB connector. What you can't tell
from this picture is that there is a notch in the PCB board and the USB
connector sits down inside it some. This provides some lateral stability
that takes some of the stress off the solder points.
- It has nice clear readable silkscreen printing.
- It also a larger reset button.
- User LED on PC13
Problems with the blue board:
- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
resistor, you will need to replace it with a 1.5k one to use the native
USB.
- Puny voltage regulator probably 100mA.
A schematic for the blue board is available here:
http://www.stm32duino.com/download/file.php?id=276
The Black Board:
- User LED is on PB12.
- Mounting holes.
Both Boards:
Nice features common to both:
- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
- USB 5V is broken out with easy access.
- Power LED
- You can probably use more flash (128k) than officially documented for
the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
and it seemed to work.
Problems with both boards:
- No preloaded bootloader (this isn't really a problem as the
entire 64k of flash is available for use)
- No user button
This is the board pinout based on its form-factor for the Blue board:
..
USB
___
-----/ _ \-----
|B12 GND|
|B13 GND|
|B14 3.3V|
|B15 RST|
|A8 B11|
|A9 B10|
|A10 B1|
|A11 B0|
|A12 A7|
|A15 A6|
|B3 A5|
|B4 A4|
|B5 A3|
|B6 A2|
|B7 A1|
|B8 A0|
|B9 C15|
|5V C14|
|GND C13|
|3.3V VB|
|_____________|
LEDs
====
The STM32F103 Minimum board has only one software controllable LED.
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
enabled.
If enabled the LED is simply turned on when the board boots
successfully, and is blinking on panic / assertion failed.
UARTs
=====
UART/USART PINS
---------------
..
USART1
RX PA10
TX PA9
USART2
CK PA4
CTS PA0
RTS PA1
RX PA3
TX PA2
USART3
CK PB12
CTS PB13
RTS PB14
RX PB11
TX PB10
Default USART/UART Configuration
--------------------------------
USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
Timer Inputs/Outputs
====================
..
TIM1
CH1 PA8
CH2 PA9*
CH3 PA10*
CH4 PA11*
TIM2
CH1 PA0*, PA15, PA5
CH2 PA1, PB3
CH3 PA2, PB10*
CH4 PA3, PB11
TIM3
CH1 PA6, PB4
CH2 PA7, PB5*
CH3 PB0
CH4 PB1*
TIM4
CH1 PB6*
CH2 PB7
CH3 PB8
CH4 PB9*
* Indicates pins that have other on-board functions and should be used only
with care (See board datasheet).
Using 128KiB of Flash instead of 64KiB
======================================
Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
instead of 64KiB as documented in the datasheet and reported by its internal
register.
In order to enable 128KiB you need modify the linker script to reflect this
new size. Open the boards/arm/stm32/stm32f103-minimum/scripts/ld.script and replace::
flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
with::
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
Enable many NuttX features (ie. many filesystems and applications) to get a
large binary image with more than 64K.
We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
up to dated OpenOCD version (ie. openocd-0.9).
You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing::
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
with::
flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
We will use OpenOCD with STLink-V2 programmer, but it will work with other
programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
Open a terminal and execute::
$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
Now in other terminal execute::
$ telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> reset halt
stm32f1x.cpu: target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
> flash write_image erase nuttx.bin 0x08000000
auto erase enabled
device id = 0x20036410
ignoring flash probed value, using configured bank size
flash size = 128kbytes
stm32f1x.cpu: target state: halted
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
> reset run
> exit
Now NuttX should start normally.
Nintendo Wii Nunchuck:
======================
There is a driver on NuttX to support Nintendo Wii Nunchuck Joystick. If you
want to use it please select these options:
- Enable the I2C1 at System Type -> STM32 Peripheral Support, it will enable:
CONFIG_STM32_I2C1=y
- Enable to Custom board/driver initialization at RTOS Features -> RTOS hooks
CONFIG_BOARD_LATE_INITIALIZE=y
- Enable the I2C Driver Support at Device Drivers, it will enable this symbol:
CONFIG_I2C=y
- Nintendo Wii Nunchuck Joystick at Device Drivers -> [*] Input Device Support
CONFIG_INPUT=y
CONFIG_INPUT_NUNCHUCK=y
- Enable the Nunchuck joystick example at Application Configuration -> Examples
CONFIG_EXAMPLES_NUNCHUCK=y
CONFIG_EXAMPLES_NUNCHUCK_DEVNAME="/dev/nunchuck0"
You need to connect GND and +3.3V pins from Nunchuck connector to GND and 3.3V
of stm32f103-minimum respectively (Nunchuck also can work connected to 5V, but
I don't recommend it). Connect I2C Clock from Nunchuck to SCK (PB6) and the
I2C Data to SDA (PB7).
Quadrature Encoder:
===================
The nsh configuration has been used to test the Quadrature Encoder
(QEncoder, QE) with the following modifications to the configuration
file:
- These setting enable support for the common QEncode upper half driver:
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
- This is a board setting that selected timer 4 for use with the
quadrature encode:
CONFIG_STM32F103MINIMUM_QETIMER=4
- These settings enable the STM32 Quadrature encoder on timer 4:
CONFIG_STM32_TIM4_CAP=y
CONFIG_STM32_TIM4_QE=y
CONFIG_STM32_TIM4_QECLKOUT=2800000
CONFIG_STM32_QENCODER_FILTER=y
CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
- These settings enable the test case at apps/examples/qencoder:
CONFIG_EXAMPLES_QENCODER=y
CONFIG_EXAMPLES_QENCODER_DELAY=100
CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
In this configuration, the QEncoder inputs will be on the TIM4 inputs of
PB6 and PB7.
SPI NOR Flash support:
======================
We can use an extern SPI NOR Flash with STM32F103-Minimum board. In this case
we tested the Winboard W25Q32FV (32Mbit = 4MiB).
You can connect the W25Q32FV module in the STM32F103 Minimum board this way:
connect PA5 (SPI1 CLK) to CLK; PA7 (SPI1 MOSI) to DI; PA6 (SPI MISO) to DO;
PA4 to /CS; Also connect 3.3V to VCC and GND to GND.
You can start with default "stm32f103-minimum/nsh" configuration option and
enable/disable these options using "make menuconfig" ::
System Type --->
STM32 Peripheral Support --->
[*] SPI1
Board Selection --->
[*] MTD driver for external 4Mbyte W25Q32FV FLASH on SPI1
(0) Minor number for the FLASH /dev/smart entry
[*] Enable partition support on FLASH
(1024,1024,1024,1024) Flash partition size list
RTOS Features --->
Stack and heap information --->
(512) Idle thread stack size
(1024) Main thread stack size
(256) Minimum pthread stack size
(1024) Default pthread stack size
Device Drivers --->
-*- Memory Technology Device (MTD) Support --->
[*] Support MTD partitions
-*- SPI-based W25 FLASH
(0) W25 SPI Mode
(20000000) W25 SPI Frequency
File Systems --->
[ ] Disable pseudo-filesystem operations
-*- SMART file system
(0xff) FLASH erased state
(16) Maximum file name length
Memory Management --->
[*] Small memory model
Also change the boards/arm/stm32/stm32f103-minimum/scripts/ld.script file to use 128KB
of Flash instead 64KB (since this board has a hidden 64KB flash) :
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}
Then after compiling and flashing the file nuttx.bin you can format and mount
the flash this way:
nsh> mksmartfs /dev/smart0p0
nsh> mksmartfs /dev/smart0p1
nsh> mksmartfs /dev/smart0p2
nsh> mksmartfs /dev/smart0p3
nsh> mount -t smartfs /dev/smart0p0 /mnt
nsh> ls /mnt
/mnt:
nsh> echo "Testing" > /mnt/file.txt
nsh> ls /mnt
/mnt:
file.txt
nsh> cat /mnt/file.txt
Testing
nsh>
SDCard support:
===============
Only STM32F103xx High-density devices has SDIO controller. STM32F103C8T6 is a
Medium-density device, but we can use SDCard over SPI.
You can do that enabling these options::
CONFIG_FS_FAT=y
CONFIG_MMCSD=y
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_SPI=y
CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SPIMODE=0
CONFIG_STM32_SPI=y
CONFIG_STM32_SPI1=y
CONFIG_SPI=y
CONFIG_SPI_CALLBACK=y
CONFIG_SPI_EXCHANGE=y
And connect a SDCard/SPI board on SPI1. Connect the CS pin to PA4, SCK to
PA5, MOSI to PA7 and MISO to PA6. Note: some chinese boards use MOSO instead
of MISO.
Nokia 5110 LCD Display support:
===============================
You can connect a low cost Nokia 5110 LCD display in the STM32F103 Minimum
board this way: connect PA5 (SPI1 CLK) to CLK; PA7 (SPI1 MOSI) to DIN; PA4
to CE; PA3 to RST; PA2 to DC. Also connect 3.3V to VCC and GND to GND.
You can start with default "stm32f103-minimum/nsh" configuration option and
enable these options using "make menuconfig" ::
System Type --->
STM32 Peripheral Support --->
[*] SPI1
Device Drivers --->
-*- SPI Driver Support --->
[*] SPI exchange
[*] SPI CMD/DATA
Device Drivers --->
LCD Driver Support --->
[*] Graphic LCD Driver Support --->
[*] Nokia 5110 LCD Display (Phillips PCD8544)
(1) Number of PCD8544 Devices
(84) PCD8544 X Resolution
(48) PCD8544 Y Resolution
Graphics Support --->
[*] NX Graphics
(1) Number of Color Planes
(0x0) Initial background color
Supported Pixel Depths --->
[ ] Disable 1 BPP
[*] Packed MS First
Font Selections --->
(7) Bits in Character Set
[*] Mono 5x8
Application Configuration --->
Examples --->
[*] NX graphics "Hello, World!" example
(1) Bits-Per-Pixel
After compiling and flashing the nuttx.bin inside the board, reset it.
You should see it:
NuttShell (NSH)
nsh> ?
help usage: help [-v] [<cmd>]
[ dd free mb source usleep
? echo help mh sleep xd
cat exec hexdump mw test
cd exit kill pwd true
cp false ls set unset
Builtin Apps:
nxhello
Now just run nxhello and you should see "Hello World" in the display:
nsh> nxhello
HYT271 sensor support
=====================
The existing sensor configuration allows connecting several sensors of type
hyt271 on i2c bus number 2. For full feature support, be able to change the
i2c address of the sensor, the following hardware setup is necessary.::
---------- -----------
| |------ GND ------------------------ GND ----| |
| | | |
| | | |
| | | |
| |---- POWIN A00 ------. | |
| | | | |
| | 4.7k | |
| | | | |
| STM32 |--- POWOUT A01 ------.------.------ VDD ----| HYT271 |
| | | | | |
| | 2.2k | | |
| | | | | |
| |----- SDA2 B11 ------.---- | ----- SDA ----| |
| | | | |
| | 2.2k | |
| | | | |
| |----- SCL2 B10 -------------.------ SCL ----| |
| | | |
--------- -----------
DS18B20 sensor support
======================
The existing sensor configuration allows connecting several sensors of type
ds18b20 on 1wire bus number 2. The following hardware setup is necessary.::
--------- -----------
| |------ GND ----------.------------- GND ----| |
| | | |
| | | |
| | | |
| |------ VDD ----------.------------- VDD ----| |
| STM32 | | | DS18B20 |
| | 4.7k | |
| | | | |
| |----- TX2 A02 -------.------.------- DQ ----| |
| | | |
-------- -----------
USB Console support
===================
The STM32F103C8 has a USB Device controller, then we can use NuttX support
to USB Device. We can the console over USB enabling these options:
::
System Type --->
STM32 Peripheral Support --->
[*] USB Device
It will enable: CONFIG_STM32_USB=y
Board Selection --->
-*- Enable boardctl() interface
[*] Enable USB device controls
It will enable: CONFIG_BOARDCTL_USBDEVCTRL=y
Device Drivers --->
-*- USB Device Driver Support --->
[*] USB Modem (CDC/ACM) support --->
It will enable: CONFIG_CDCACM=y and many default options.
Device Drivers --->
-*- USB Device Driver Support --->
[*] USB Modem (CDC/ACM) support --->
[*] CDC/ACM console device
It will enable: CONFIG_CDCACM_CONSOLE=y
Device Drivers --->
[*] Serial Driver Support --->
Serial console (No serial console) --->
(X) No serial console
It will enable: CONFIG_NO_SERIAL_CONSOLE=y
After flashing the firmware in the board, unplug and plug it in the computer
and it will create a /dev/ttyACM0 device in the Linux. Use minicom with this
device to get access to NuttX NSH console (press Enter three times to start)
MCP2515 External Module
=======================
You can use an external MCP2515 (tested with NiRen MCP2515_CAN module) to
get CAN Bus working on STM32F103C8 chip (remember the internal CAN cannot
work with USB at same time because they share the SRAM buffer).
You can connect the MCP2515 module in the STM32F103 Minimum board this way:
connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SI; PA6 (SPI MISO) to SO;
PA4 to CS; B0 to INT. Also connect 5V to VCC and GND to GND.
Note: Although MCP2515 can work with 2.7V-5.5V it is more stable when using
it on BluePill board on 5V.
Testing: you will need at least 2 boards each one with a MCP2515 module
connected to it. Connect CAN High from the first module to the CAN High of
the second module, and the CAN Low from the first module to the CAN Low of
the second module.
You need to modify the "CAN example" application on menuconfig and create
two firmware versions: the first firmware will be Read-only and the second
one Write-only. Flash the first firmware in the first board and the second
firmware in the second board. Now you can start the both boards, run the
"can" command in the Write-only board and then run the "can" command in the
Read-only board. You should see the data coming.
STM32F103 Minimum - specific Configuration Options
==================================================
..
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103C8=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=stm32f103-minimum
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_STM32_MINIMUM=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=20480 (20Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
..
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_CRC
CONFIG_STM32_BKPSRAM
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_PWR -- Required for RTC
APB2
----
CONFIG_STM32_TIM1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_SPI1
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation or ADC conversion.
Note that ADC require two definitions: Not only do you have
to assign the timer (n) for used by the ADC, but then you also have to
configure which ADC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default only SW-DP is enabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32F103 Minimum specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3)
for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
STM32F103 Minimum CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
STM32F103 Minimum SPI Configuration
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
Configurations
==============
Instantiating Configurations
----------------------------
Each STM32F103 Minimum configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh STM32F103 Minimum:<subdir>
Where <subdir> is one of the following:
Configuration Directories
-------------------------
nsh
---
Configures the NuttShell (nsh) located at apps/examples/nsh. This
configuration enables a console on UART1. Support for
builtin applications is enabled, but in the base configuration no
builtin applications are selected.
jlx12864g
---------
This is a config example to use the JLX12864G-086 LCD module. To use this
LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4
to CS; PA3 to RST; PA2 to RS.
nrf24
-----
This is a config example to test the nrf24 terminal example. You will need
two stm32f103-minimum board each one with a nRF24L01 module connected this
way: connect PB1 to nRF24 CE pin; PA4 to CSN; PA5 (SPI1 CLK) to SCK; PA7
(SPI1 MOSI) to MOSI; PA6 (SPI1 MISO) to MISO; PA0 to IRQ.
usbnsh
------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the ARM EABI toolchain
for Windows and builds under Cygwin (or probably MSYS). That
can easily be reconfigured, of course.
CONFIG_HOST_WINDOWS=y : Builds under Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. This configuration does have UART2 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on UART2 unless you enable
some debug output or enable the USB monitor.
4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (UART2 in this
configuration)::
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
5. By default, this project assumes that you are *NOT* using the DFU
bootloader.
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing::
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console
veml6070
--------
This is a config example to use the Vishay VEML6070 UV-A sensor. To use this
sensor you need to connect PB6 (I2C1 CLK) to SCL; PB7 (I2C1 SDA) to SDA of
sensor module. I used a GY-VEML6070 module to test this driver.

115
boards/arm/stm32/stm32vldiscovery/README.txt → Documentation/platforms/arm/stm32f1/boards/stm32vldiscovery/index.rst
View File

@ -1,16 +1,10 @@
README
======
===================
ST STM32VLDiscovery
===================
This README discusses issues unique to NuttX configurations for the STMicro
STM32VLDiscovery (Value Line Discovery) board.
Contents
========
- LEDs
- UARTs
- "STMicro STM32F100RB generic" specific Configuration Options
- Configurations
LEDs
====
@ -20,7 +14,7 @@ You should configure the port and pin number in
boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h. This LED is not used by
the board port unless CONFIG_ARCH_LEDS is defined. In that case, the usage by
the board port is defined in include/board.h and src/up_leds.c. The LED is used
to encode OS-related events as follows:
to encode OS-related events as follows::
SYMBOL Meaning LED1*
green
@ -42,7 +36,7 @@ UART
Default USART/UART Configuration
--------------------------------
USART1 is enabled in all configurations (see */defconfig). RX and TX are
USART1 is enabled in all configurations (see \*/defconfig). RX and TX are
configured on pins PA10 and PA9, respectively. Then connect the RX pin of
your USB/Serial adapter to TX pin (PA9) and the TX pin of your adapter to
RX pin (PA10) of your board besides, of course, the GND pin.
@ -50,6 +44,8 @@ RX pin (PA10) of your board besides, of course, the GND pin.
"STMicro STM32F100RB generic" specific Configuration Options
============================================================
::
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
@ -109,51 +105,51 @@ RX pin (PA10) of your board besides, of course, the GND pin.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
Individual subsystems can be enabled:
Individual subsystems can be enabled::
AHB
----
CONFIG_STM32_CRC
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
AHB
----
CONFIG_STM32_CRC
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_TIM12
CONFIG_STM32_TIM13
CONFIG_STM32_TIM14
CONFIG_STM32_RTC
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_PWR -- Required for RTC
CONFIG_STM32_BKP -- Required for RTC
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_CEC
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_TIM12
CONFIG_STM32_TIM13
CONFIG_STM32_TIM14
CONFIG_STM32_RTC
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_PWR -- Required for RTC
CONFIG_STM32_BKP -- Required for RTC
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_CEC
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_TIM15
CONFIG_STM32_TIM16
CONFIG_STM32_TIM17
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_TIM15
CONFIG_STM32_TIM16
CONFIG_STM32_TIM17
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
@ -202,17 +198,18 @@ Configurations
==============
Each STMicro STM32F100RB generic configuration is maintained in a sub-directory
and can be selected as follow:
and can be selected as follow::
tools/configure.sh stm32vldiscovery:<subdir>
Where <subdir> is one of the following:
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables only the serial NSH interfaces.
nsh
---
Default toolchain:
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables only the serial NSH interfaces.
Default toolchain::
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Linux

535
boards/arm/stm32/viewtool-stm32f107/README.txt → Documentation/platforms/arm/stm32f1/boards/viewtool-stm32f107/index.rst
View File

@ -1,47 +1,25 @@
README
======
=======================
ViewTool STM32F103/F107
=======================
This README discusses issues unique to NuttX configurations for the
ViewTool STM32F103/F107 V1.2 board. This board may be fitted with either
This README discusses issues unique to NuttX configurations for the
ViewTool STM32F103/F107 V1.2 board. This board may be fitted with either
- STM32F107VCT6, or
- STM32F103VCT6
- STM32F107VCT6, or
- STM32F103VCT6
The board is very modular with connectors for a variety of peripherals.
Features on the base board include:
The board is very modular with connectors for a variety of peripherals.
Features on the base board include:
- User and Wake-Up Keys
- LEDs
- User and Wake-Up Keys
- LEDs
See http://www.viewtool.com/ for further information.
Contents
========
o User and Wake-Up keys
o LEDs
o Serial Console
- Console Configuration
- J5 - USART1
- PL-2013 USB-to-Serial Interface
- RS-232 Module
o USB Interface
o microSD Card Interface
o ViewTool DP83848 Ethernet Module
o Freescale MPL115A barometer sensor
o LCD/Touchscreen Interface
o FT80x Integration
o MAX3421E Integration
o Toolchains
- NOTE about Windows native toolchains
o Configurations
- Information Common to All Configurations
- Configuration Sub-directories
See http://www.viewtool.com/ for further information.
User and Wake-Up keys
=====================
All pulled high and will be sensed low when depressed.
All pulled high and will be sensed low when depressed.::
SW2 PC11 Needs J42 closed
SW3 PC12 Needs J43 closed
@ -50,19 +28,19 @@ User and Wake-Up keys
LEDs
====
There are four LEDs on the ViewTool STM32F103/F107 board that can be controlled
by software: LED1 through LED4. All pulled high and can be illuminated by
driving the output to low
There are four LEDs on the ViewTool STM32F103/F107 board that can be controlled
by software: LED1 through LED4. All pulled high and can be illuminated by
driving the output to low::
LED1 PA6
LED2 PA7
LED3 PB12
LED4 PB13
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
events as follows:
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
events as follows::
SYMBOL Meaning LED state
LED1 LED2 LED3 LED4
@ -77,24 +55,26 @@ LEDs
LED_PANIC The system has crashed N/C N/C N/C 2Hz Flashing
LED_IDLE MCU is is sleep mode Not used
After booting, LED1-3 are not longer used by the system and can be used for
other purposes by the application (Of course, all LEDs are available to the
application if CONFIG_ARCH_LEDS is not defined.
After booting, LED1-3 are not longer used by the system and can be used for
other purposes by the application (Of course, all LEDs are available to the
application if CONFIG_ARCH_LEDS is not defined.
Serial Console
==============
Console Configuration
---------------------
The NuttX console is configured by default on USART1 at 115200 BAUD 8N1
(8-bits, not parity, one stop bit). These setting can, of course, easily
be changed by reconfiguring NuttX.
Console Configuration
---------------------
J5 - USART1
-----------
The boards come with a PL-2303 based USB-to-serial board. Also available
as an option is an RS-232 board. Both have the same pin out on a 6-pin
connector that mates with the upper row of J5.
The NuttX console is configured by default on USART1 at 115200 BAUD 8N1
(8-bits, not parity, one stop bit). These setting can, of course, easily
be changed by reconfiguring NuttX.
J5 - USART1
-----------
The boards come with a PL-2303 based USB-to-serial board. Also available
as an option is an RS-232 board. Both have the same pin out on a 6-pin
connector that mates with the upper row of J5.::
PIN MODULE BOARD J5
--- ------ ---------------------------
@ -105,119 +85,130 @@ Serial Console
5 RTS? 9 CTS? PA12 USART1_RTS
6 CTS? 11 RTS? PA11 USART1_CTS
PL-2013 USB-to-Serial Interface
-------------------------------
PL-2013 USB-to-Serial Interface
-------------------------------
J37 - CON4. Jumper Settings::
J37 - CON4. Jumper Settings:
1 <-> 3 : Connects PA9 to the RXD1 output pin
2 <-> 4 : Connects PA10 to the TXD1 input pin
J35 - CON2. Jumper Setting:
J35 - CON2. Jumper Setting::
Open. the PL2303 adapter receives its power from the USB host.
RS-232 Module
-------------
RS-232 Module
-------------
J37 - CON4. Jumper Settings::
J37 - CON4. Jumper Settings:
1 <-> 3 : Connects PA9 to the RXD1 output pin
2 <-> 4 : Connects PA10 to the TXD1 input pin
J35 - CON2. Jumper Setting:
J35 - CON2. Jumper Setting::
1 <-> 2 : Proves 3.3V to the RS-232 module.
USB Interface
=============
USB Connector
-------------
USB Connector
-------------
The Viewtool base board has a USB Mini-B connector. Only USB device can
be supported with this connector.
The Viewtool base board has a USB Mini-B connector. Only USB device can
be supported with this connector.::
------------------------- ------------------------------------
USB Connector
J10 mini-USB GPIO CONFIGURATION(s)
--- --------- ----------- ------------------------------------
Pin Signal
--- --------- ----------- ------------------------------------
1 USB_VBUS VDD_USB (No sensing available)
2 OTG_DM PA11 GPIO_OTGFS_DM (F107) GPIO_USB_DM (F103)
3 OTG_DP PA12 GPIO_OTGFS_DP (F107) GPIO_USB_DP (F103)
4 OTG_ID PA10 GPIO_OTGFS_ID (F107)
5 Shield N/A N/A
6 Shield N/A N/A
7 Shield N/A N/A
8 Shield N/A N/A
9 Shield N/A N/A
PE11 USB_EN GPIO controlled soft pull-up (if J51 closed)
------------------------- ------------------------------------
USB Connector
J10 mini-USB GPIO CONFIGURATION(s)
--- --------- ----------- ------------------------------------
Pin Signal
--- --------- ----------- ------------------------------------
1 USB_VBUS VDD_USB (No sensing available)
2 OTG_DM PA11 GPIO_OTGFS_DM (F107) GPIO_USB_DM (F103)
3 OTG_DP PA12 GPIO_OTGFS_DP (F107) GPIO_USB_DP (F103)
4 OTG_ID PA10 GPIO_OTGFS_ID (F107)
5 Shield N/A N/A
6 Shield N/A N/A
7 Shield N/A N/A
8 Shield N/A N/A
9 Shield N/A N/A
PE11 USB_EN GPIO controlled soft pull-up (if J51 closed)
NOTES:
1. GPIO_OTGFS_VBUS (F107) should not be configured. No VBUS sensing
2. GPIO_OTGFS_SOF (F107) is not used
3. The OTG FS module has is own, internal soft pull-up logic. J51 should
be open so that PE11 activity does effect USB.
NOTES:
1. GPIO_OTGFS_VBUS (F107) should not be configured. No VBUS sensing
2. GPIO_OTGFS_SOF (F107) is not used
3. The OTG FS module has is own, internal soft pull-up logic. J51 should
be open so that PE11 activity does effect USB.
STM32F103 Configuration
-----------------------
STM32F103 Configuration
-----------------------
System Type -> STM32 Peripheral Support::
System Type -> STM32 Peripheral Support
CONFIG_STM32_USB=y : Enable USB FS device
Device Drivers
Device Drivers::
CONFIG_USBDEV : USB device support
STATUS: All of the code is in place, but no testing has been performed.
STATUS: All of the code is in place, but no testing has been performed.
STM32F107 Configuration
-----------------------
STM32F107 Configuration
-----------------------
System Type -> STM32 Peripheral Support::
System Type -> STM32 Peripheral Support
CONFIG_STM32_OTGFS=y : Enable OTG FS
Device Drivers
Device Drivers::
CONFIG_USBDEV : USB device support
STATUS: All of the code is in place, but USB is not yet functional.
STATUS: All of the code is in place, but USB is not yet functional.
CDC/ACM Configuration
---------------------
CDC/ACM Configuration
---------------------
This will select the CDC/ACM serial device. Defaults for the other
options should be okay.
This will select the CDC/ACM serial device. Defaults for the other
options should be okay.::
Device Drivers -> USB Device Driver Support
CONFIG_CDCACM=y : Enable the CDC/ACM device
The following setting enables an example that can can be used to control
the CDC/ACM device. It will add two new NSH commands:
The following setting enables an example that can can be used to control
the CDC/ACM device. It will add two new NSH commands:
a. sercon will connect the USB serial device (creating /dev/ttyACM0), and
b. serdis which will disconnect the USB serial device (destroying
/dev/ttyACM0).
a. sercon will connect the USB serial device (creating /dev/ttyACM0), and
b. serdis which will disconnect the USB serial device (destroying
/dev/ttyACM0).
Application Configuration -> Examples::
Application Configuration -> Examples:
CONFIG_SYSTEM_CDCACM=y : Enable an CDC/ACM example
USB MSC Configuration
---------------------
[WARNING: This configuration has not yet been verified]
USB MSC Configuration
---------------------
The Mass Storage Class (MSC) class driver can be selected in order to
export the microSD card to the host computer. MSC support is selected:
[WARNING: This configuration has not yet been verified]
The Mass Storage Class (MSC) class driver can be selected in order to
export the microSD card to the host computer. MSC support is selected:::
Device Drivers -> USB Device Driver Support
CONFIG_USBMSC=y : Enable the USB MSC class driver
CONFIG_USBMSC_EPBULKOUT=1 : Use EP1 for the BULK OUT endpoint
CONFIG_USBMSC_EPBULKIN=2 : Use EP2 for the BULK IN endpoint
The following setting enables an add-on that can can be used to control
the USB MSC device. It will add two new NSH commands:
The following setting enables an add-on that can can be used to control
the USB MSC device. It will add two new NSH commands:
a. msconn will connect the USB serial device and export the microSD
card to the host, and
b. msdis which will disconnect the USB serial device.
a. msconn will connect the USB serial device and export the microSD
card to the host, and
b. msdis which will disconnect the USB serial device.
Application Configuration -> System Add-Ons::
Application Configuration -> System Add-Ons:
CONFIG_SYSTEM_USBMSC=y : Enable the USBMSC add-on
CONFIG_SYSTEM_USBMSC_NLUNS=1 : One LUN
CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 : Minor device zero
@ -225,15 +216,15 @@ USB Interface
: Use a single, LUN: The microSD
: block driver.
NOTES:
NOTES:
a. To prevent file system corruption, make sure that the microSD is un-
mounted *before* exporting the mass storage device to the host:
a. To prevent file system corruption, make sure that the microSD is un-
mounted *before* exporting the mass storage device to the host::
nsh> umount /mnt/sdcard
nsh> mscon
The microSD can be re-mounted after the mass storage class is disconnected:
The microSD can be re-mounted after the mass storage class is disconnected::
nsh> msdis
nsh> mount -t vfat /dev/mtdblock0 /mnt/at25
@ -241,8 +232,10 @@ USB Interface
microSD Card Interface
======================
microSD Connector
-----------------
microSD Connector
-----------------
::
----------------------------- ------------------------- --------------------------------
Connector J17 GPIO CONFIGURATION(s)
@ -264,11 +257,12 @@ microSD Card Interface
cannot be used with the STM32F107 (unless the pin-out just happens to match up
with an SPI-based card interface???)
Configuration (STM32F103 only)
------------------------------
Configuration (STM32F103 only)
------------------------------
[WARNING: This configuration has not yet been verified]
Enabling SDIO-based MMC/SD support:
Enabling SDIO-based MMC/SD support::
System Type->STM32 Peripheral Support
CONFIG_STM32_SDIO=y : Enable SDIO support
@ -306,50 +300,53 @@ microSD Card Interface
ViewTool DP83848 Ethernet Module
================================
Ethernet Connector
------------------
Ethernet Connector
------------------
----------------------------- ------------------------ --------------------------------
Connector J2 GPIO CONFIGURATION(s)
PIN SIGNAL LEGEND (no remapping) DP83848C Board
--- ------------- ----------- ------------------------ --------------------------------
1 PA0 MII_CRS N/A N/C
2 PB11/SDA2 COM_TX_EN GPIO_ETH_RMII_TX_EN TX_EN
3 PA3/LED_G2 MII_COL N/A N/C
4 PB12/NSS2 COM_TXD0 GPIO_ETH_RMII_TXD0 TXD0
5 PA1 MII_RX_CLK GPIO_ETH_RMII_REF_CLK OSCIN
6 PB13/SCK2 COM_TXD1 GPIO_ETH_RMII_TXD1 TXD1
7 PB1/CD_RESET MII_RXD3 N/A N/C
8 PC4/LCDTP COM_RXD0 GPIO_ETH_RMII_RXD0 RXD0
9 PB0/BL_PWM MII_RXD2 N/A N/C
10 PC5 COM_RXD1 GPIO_ETH_RMII_RXD1 RXD1
11 PB8/CAN1_RX MII_TXD3 N/A N/C
12 PC1/LED_R1 COM_MDC GPIO_ETH_MDC MDC
13 PC2/LED_R2 MII_TXD2 N/A N/C
14 PA2/LED_G1 COM_MDIO GPIO_ETH_MDIO MDIO
15 PC3/ONEW MII_TX_CLK N/A N/C
16 PB10/SCL2 RX_ER N/A N/C
17 PD2 GPIO1 N/A N/C
18 PA7/MOSI1 COM_RX_DV GPIO_ETH_RMII_CRS_DV CRS_DIV
19 PD3 GPIO2 N/A N/C
20 PB5 COM_PPS_OUT N/A N/C
21 VDD 3.3 VDD_3.3 N/A 3.3V
22 VDD 3.3 VDD_3.3 N/A 3.3V
23 GND GND N/A GND
24 GND GND N/A GND
--- ------------- ----------- ------------------------ --------------------------------
..
----------------------------- ------------------------ --------------------------------
Connector J2 GPIO CONFIGURATION(s)
PIN SIGNAL LEGEND (no remapping) DP83848C Board
--- ------------- ----------- ------------------------ --------------------------------
1 PA0 MII_CRS N/A N/C
2 PB11/SDA2 COM_TX_EN GPIO_ETH_RMII_TX_EN TX_EN
3 PA3/LED_G2 MII_COL N/A N/C
4 PB12/NSS2 COM_TXD0 GPIO_ETH_RMII_TXD0 TXD0
5 PA1 MII_RX_CLK GPIO_ETH_RMII_REF_CLK OSCIN
6 PB13/SCK2 COM_TXD1 GPIO_ETH_RMII_TXD1 TXD1
7 PB1/CD_RESET MII_RXD3 N/A N/C
8 PC4/LCDTP COM_RXD0 GPIO_ETH_RMII_RXD0 RXD0
9 PB0/BL_PWM MII_RXD2 N/A N/C
10 PC5 COM_RXD1 GPIO_ETH_RMII_RXD1 RXD1
11 PB8/CAN1_RX MII_TXD3 N/A N/C
12 PC1/LED_R1 COM_MDC GPIO_ETH_MDC MDC
13 PC2/LED_R2 MII_TXD2 N/A N/C
14 PA2/LED_G1 COM_MDIO GPIO_ETH_MDIO MDIO
15 PC3/ONEW MII_TX_CLK N/A N/C
16 PB10/SCL2 RX_ER N/A N/C
17 PD2 GPIO1 N/A N/C
18 PA7/MOSI1 COM_RX_DV GPIO_ETH_RMII_CRS_DV CRS_DIV
19 PD3 GPIO2 N/A N/C
20 PB5 COM_PPS_OUT N/A N/C
21 VDD 3.3 VDD_3.3 N/A 3.3V
22 VDD 3.3 VDD_3.3 N/A 3.3V
23 GND GND N/A GND
24 GND GND N/A GND
--- ------------- ----------- ------------------------ --------------------------------
NOTES:
1. RMII interface is used
2. There is a 50MHz clock on board the DP83848. No MCO clock need be provided.
NOTES:
1. RMII interface is used
2. There is a 50MHz clock on board the DP83848. No MCO clock need be provided.
Configuration
-------------
Configuration
-------------
System Type -> STM32 Peripheral Support::
System Type -> STM32 Peripheral Support
CONFIG_STM32_ETHMAC=y : Enable Ethernet driver
System Type -> Ethernet MAC Configuration
System Type -> Ethernet MAC Configuration::
CONFIG_STM32_RMII=y : Configuration RM-II DP83848C PHY
CONFIG_STM32_AUTONEG=y
CONFIG_STM32_PHYADDR=1
@ -360,15 +357,18 @@ ViewTool DP83848 Ethernet Module
CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
CONFIG_STM32_RMII_EXTCLK=y
Device Drivers -> Networking Devices
Device Drivers -> Networking Devices::
CONFIG_NETDEVICES=y : More PHY stuff
CONFIG_ETH0_PHY_DP83848C=y
Networking (required)
Networking (required)::
CONFIG_NET=y : Enabled networking support
CONFIG_NSH_NOMAC=y
Networking (recommended/typical)
Networking (recommended/typical)::
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_ETH_PKTSIZE=650 : Maximum packet size
@ -386,7 +386,8 @@ ViewTool DP83848 Ethernet Module
CONFIG_NSH_IPADDR=0x0a000002
CONFIG_NSH_NETMASK=0xffffff00
Network Utilities (basic)
Network Utilities (basic)::
CONFIG_NETUTILS_TFTPC=y : Needed by NSH unless to disable TFTP commands
CONFIG_NETUTILS_DHCPC=y : Fun stuff
CONFIG_NETUTILS_TELNETD=y : Support for a Telnet NSH console
@ -398,12 +399,12 @@ ViewTool DP83848 Ethernet Module
Freescale MPL115A barometer sensor
==================================
This board support package includes hooks that can be used to enable
testing of a Freescale MPL115A barometer sensor connected via SPI3 with
chip select on PB6,
This board support package includes hooks that can be used to enable
testing of a Freescale MPL115A barometer sensor connected via SPI3 with
chip select on PB6,
Here are the configuration settings that would have to be included to
enabled support for the barometer:
Here are the configuration settings that would have to be included to
enabled support for the barometer::
System Type -> Peripherals
CONFIG_STM32_SPI3=y
@ -417,8 +418,8 @@ Freescale MPL115A barometer sensor
CONFIG_SENSORS_MPL115A=y
CONFIG_NSH_ARCHINIT=y
Note: this driver uses SPI3 then since PB3 pin is also use to JTAG TDO you
need to disable JTAG support to get this driver working:
Note: this driver uses SPI3 then since PB3 pin is also use to JTAG TDO you
need to disable JTAG support to get this driver working::
System Type
CONFIG_STM32_JTAG_DISABLE=y
@ -426,14 +427,16 @@ Freescale MPL115A barometer sensor
LCD/Touchscreen Interface
=========================
An LCD may be connected via J11. Only the STM32F103 supports the FSMC signals
needed to drive the LCD.
An LCD may be connected via J11. Only the STM32F103 supports the FSMC signals
needed to drive the LCD.
The LCD features an (1) HY32D module with built-in SSD1289 LCD controller, and (a)
a XPT2046 touch screen controller.
The LCD features an (1) HY32D module with built-in SSD1289 LCD controller, and (a)
a XPT2046 touch screen controller.
LCD Connector
-------------
LCD Connector
-------------
todo::
----------------------------- ------------------------ --------------------------------
Connector J11 GPIO CONFIGURATION(s)
@ -497,13 +500,14 @@ LCD/Touchscreen Interface
FT80x Integration
=================
I have used the ViewTool F107 for initial testing of the three displays
based on FTDI/BridgeTek FT80x GUIs:
I have used the ViewTool F107 for initial testing of the three displays
based on FTDI/BridgeTek FT80x GUIs:
Haoyu 5"
--------
I purchased a Haoyu 5" FT800 display on eBay. Pin out and board
connectivity is as follows:
Haoyu 5"
--------
I purchased a Haoyu 5" FT800 display on eBay. Pin out and board
connectivity is as follows::
2x5 Connector J2 using SPI1:
PIN NAME VIEWTOOL STM32 PIN NAME VIEWTOOL STM32
@ -535,8 +539,10 @@ FT80x Integration
CONFIG_LCD_FT80X_AUDIO_NOSHUTDOWN=y
CONFIG_EXAMPLES_FT80X_DEVPATH="/dev/ft800"
MikroElektronkia ConnectEVE FT800
---------------------------------
MikroElektronkia ConnectEVE FT800
---------------------------------
todo::
2x5 Connector CN2 using SPI1:
---- ------ ----------- ---------- ---- ------ ---------- ----------
@ -696,8 +702,10 @@ FT80x Integration
MAX3421E Integration
====================
Board Connections
-----------------
Board Connections
-----------------
todo::
USBHostShield-v13 (See schematic).
@ -780,52 +788,53 @@ MAX3421E Integration
Toolchains
==========
NOTE about Windows native toolchains
------------------------------------
NOTE about Windows native toolchains
------------------------------------
There are several limitations to using a Windows based toolchain in a
Cygwin environment. The three biggest are:
There are several limitations to using a Windows based toolchain in a
Cygwin environment. The three biggest are:
1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
performed automatically in the Cygwin makefiles using the 'cygpath'
utility but you might easily find some new path problems. If so, check
out 'cygpath -w'
1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
performed automatically in the Cygwin makefiles using the 'cygpath'
utility but you might easily find some new path problems. If so, check
out 'cygpath -w'
2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic
links are used in NuttX (e.g., include/arch). The make system works
around these problems for the Windows tools by copying directories
instead of linking them. But this can also cause some confusion for
you: For example, you may edit a file in a "linked" directory and find
that your changes had no effect. That is because you are building the
copy of the file in the "fake" symbolic directory. If you use a\
Windows toolchain, you should get in the habit of making like this:
2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic
links are used in NuttX (e.g., include/arch). The make system works
around these problems for the Windows tools by copying directories
instead of linking them. But this can also cause some confusion for
you: For example, you may edit a file in a "linked" directory and find
that your changes had no effect. That is because you are building the
copy of the file in the "fake" symbolic directory. If you use a\
Windows toolchain, you should get in the habit of making like this::
make clean_context all
An alias in your .bashrc file might make that less painful.
An alias in your .bashrc file might make that less painful.
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each SAM3U-EK configuration is maintained in a sub-directory and
can be selected as follow:
Information Common to All Configurations
----------------------------------------
Each SAM3U-EK configuration is maintained in a sub-directory and
can be selected as follow::
tools/configure.sh viewtool-stm32f107:<subdir>
Before starting the build, make sure that your PATH environment variable
includes the correct path to your toolchain.
Before starting the build, make sure that your PATH environment variable
includes the correct path to your toolchain.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.::
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
NOTES:
NOTES::
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
@ -866,19 +875,20 @@ Configurations
setup to use the DFU bootloader but should be easily reconfigured to
use that bootloader if so desired.
Configuration Sub-directories
-----------------------------
Configuration Sub-directories
-----------------------------
f80x:
f80x
-----
This configuration was added in order to verify the FTDI/Bridgetick
Ft80x driver using apps/examples/ft80x with apps/graphics/ft80x. It
is very similar to the NSH configuration with support for the FTDI
FT80x LCD enabled on SPI1.
This configuration was added in order to verify the FTDI/Bridgetick
Ft80x driver using apps/examples/ft80x with apps/graphics/ft80x. It
is very similar to the NSH configuration with support for the FTDI
FT80x LCD enabled on SPI1.
This configuration is properly setup for the MikroElektronika
ConnectEVE LCD. To use the Reverdi FT801 LCD, the following changes
would be required to the configuration:
This configuration is properly setup for the MikroElektronika
ConnectEVE LCD. To use the Reverdi FT801 LCD, the following changes
would be required to the configuration::
-CONFIG_LCD_FT800=y
+CONFIG_LCD_FT801=y
@ -890,7 +900,7 @@ Configurations
-CONFIG_EXAMPLES_FT80X_DEVPATH="/dev/ft800"
+CONFIG_EXAMPLES_FT80X_DEVPATH="/dev/ft801"
STATUS:
STATUS::
2018-03-09: The ConnectEVE display is basically working. There are
some specific issues with some of the demos in apps/examples/ft80x
that still need to be addressed. I have the Riverdi display FT801
@ -905,12 +915,13 @@ Configurations
1028-03-10: Most of issues have been worked out in the FT80x demos
and the driver appears 100% functional.
netnsh:
netnsh
------
This configuration directory provide the NuttShell (NSH) with
networking support.
This configuration directory provide the NuttShell (NSH) with
networking support.
NOTES:
NOTES::
1. This configuration will work only on the version the viewtool
board with the STM32F107VCT6 installed. If you have a board
with the STM32F103VCT6 installed, please use the nsh configuration
@ -943,11 +954,13 @@ Configurations
6. USB support is disabled by default. See the section above entitled,
"USB Interface"
nsh:
nsh
----
This configuration directory provide the basic NuttShell (NSH).
This configuration directory provide the basic NuttShell (NSH).
NOTES::
NOTES:
1. This configuration will work with either the version of the board
with STM32F107VCT6 or STM32F103VCT6 installed. The default
configuration is for the STM32F107VCT6. To use this configuration
@ -1069,29 +1082,35 @@ Configurations
STATUS: Working
highpri:
highpri
-------
This configuration was used to verify the NuttX high priority, nested
interrupt feature. This is a board-specific test and probably not
of much interest now other than for reference.
This configuration was used to verify the NuttX high priority, nested
interrupt feature. This is a board-specific test and probably not
of much interest now other than for reference.
This configuration targets the viewtool board with the STM32F103VCT6
This configuration targets the viewtool board with the STM32F103VCT6
tcpblaster:
tcpblaster
----------
The tcpblaster example derives from the nettest example and basically
duplicates that application when the nettest PERFORMANCE option is selected.
tcpblaster has a little better reporting of performance stats, however.
The tcpblaster example derives from the nettest example and basically
duplicates that application when the nettest PERFORMANCE option is selected.
tcpblaster has a little better reporting of performance stats, however.
This configuration derives directly from the netnsh configuration and most
of the notes there should apply equally here.
This configuration derives directly from the netnsh configuration and most
of the notes there should apply equally here.
General usage instructions:
General usage instructions:
1. On the host:
1. On the host:
a. cd to apps/examples/tcpblaster
b. Run the host tcpserver[.exe] program that was built in that directory
2. On the target:
a. Run the tcpclient built in application.
3. When you get tire of watch the numbers scroll by, just kill the tcpserver
on the host.
a. cd to apps/examples/tcpblaster
b. Run the host tcpserver[.exe] program that was built in that directory
2. On the target:
a. Run the tcpclient built in application.
3. When you get tire of watch the numbers scroll by, just kill the tcpserver
on the host.

22
Documentation/platforms/arm/stm32f1/index.rst Normal file
View File

@ -0,0 +1,22 @@
==========
ST STM32F1
==========
Supported MCUs
==============
TODO
Peripheral Support
==================
TODO
Supported Boards
================
.. toctree::
:glob:
:maxdepth: 1
boards/*/*

556
boards/arm/stm32/cloudctrl/README.txt
View File

@ -1,556 +0,0 @@
README
======
This README discusses issues unique to NuttX configurations for the CloudController
development board featuring the STMicro STM32F107VCT MCU.
Features of the CloudController board include:
- STM32F107VCT
- 10/100M PHY (DM9161AEP)
- USB OTG
- USART connectos (USART1-2)
- SPI Flash (W25X16)
- (3) LEDs (LED1-3)
- (3) Buttons (KEY1-3, USERKEY2, USERKEY, TEMPER, WAKEUP)
- 5V/3.3V power conversion
- SWD
Contents
========
- STM32F107VCT Pin Usage
- Cloudctrl-specific Configuration Options
- LEDs
- Cloudctrl-specific Configuration Options
- Configurations
STM32F107VCT Pin Usage
======================
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
**23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground.
24 PA1 MII_RX_CLK
RMII_REF_CLK
25 PA2 MII_MDIO
26 PA3 315M_VT
29 PA4 DAC_OUT1 To CON5(CN14)
30 PA5 DAC_OUT2 To CON5(CN14). JP10
SPI1_SCK To the SD card, SPI FLASH
31 PA6 SPI1_MISO To the SD card, SPI FLASH
32 PA7 SPI1_MOSI To the SD card, SPI FLASH
67 PA8 MCO To DM9161AEP PHY
68 PA9 USB_VBUS MINI-USB-AB. JP3
USART1_TX MAX3232 to CN5
69 PA10 USB_ID MINI-USB-AB. JP5
USART1_RX MAX3232 to CN5
70 PA11 USB_DM MINI-USB-AB
71 PA12 USB_DP MINI-USB-AB
72 PA13 TMS/SWDIO
76 PA14 TCK/SWCLK
77 PA15 TDI
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
35 PB0 ADC_IN1 To CON5(CN14)
36 PB1 ADC_IN2 To CON5(CN14)
37 PB2 DATA_LE To TFT LCD (CN13)
BOOT1 JP13
89 PB3 TDO/SWO
90 PB4 TRST
91 PB5 CAN2_RX
92 PB6 CAN2_TX JP11
I2C1_SCL
93 PB7 I2C1_SDA
95 PB8 USB_PWR Drives USB VBUS
96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
47 PB10 USERKEY Connected to KEY2
48 PB11 MII_TX_EN Ethernet PHY
51 PB12 I2S_WS Audio DAC
MII_TXD0 Ethernet PHY
52 PB13 I2S_CK Audio DAC
MII_TXD1 Ethernet PHY
53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14.
54 PB15 I2S_DIN Audio DAC
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
15 PC0 POTENTIO_METER
16 PC1 MII_MDC Ethernet PHY
17 PC2 WIRELESS_INT
18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
33 PC4 USERKEY2 Connected to KEY1
34 PC5 TP_INT JP6. To TFT LCD (CN13) module
MII_INT Ethernet PHY
63 PC6 I2S_MCK Audio DAC. Active low: Pulled high
64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high
65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high
66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high
78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module
79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module
80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module
7 PC13 TAMPER Connected to KEY3
8 PC14 OSC32_IN Y1 32.768Khz XTAL
9 PC15 OSC32_OUT Y1 32.768Khz XTAL
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
81 PD0 CAN1_RX
82 PD1 CAN1_TX
83 PD2 LED1 Active low: Pulled high
84 PD3 LED2 Active low: Pulled high
85 PD4 LED3 Active low: Pulled high
86 PD5 485_TX Same as USART2_TX but goes to SP3485
USART2_TX MAX3232 to CN6
87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
USART2_RX MAX3232 to CN6
88 PD7 LED4 Active low: Pulled high
485_DIR SP3485 read enable (not)
55 PD8 MII_RX_DV Ethernet PHY
RMII_CRSDV Ethernet PHY
56 PD9 MII_RXD0 Ethernet PHY
57 PD10 MII_RXD1 Ethernet PHY
58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
60 PD13 LCD_RS To TFT LCD (CN13)
61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14.
62 PD15 LCD_RD To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
97 PE0 DB00 To TFT LCD (CN13)
98 PE1 DB01 To TFT LCD (CN13)
1 PE2 DB02 To TFT LCD (CN13)
2 PE3 DB03 To TFT LCD (CN13)
3 PE4 DB04 To TFT LCD (CN13)
4 PE5 DB05 To TFT LCD (CN13)
5 PE6 DB06 To TFT LCD (CN13)
38 PE7 DB07 To TFT LCD (CN13)
39 PE8 DB08 To TFT LCD (CN13)
40 PE9 DB09 To TFT LCD (CN13)
41 PE10 DB10 To TFT LCD (CN13)
42 PE11 DB11 To TFT LCD (CN13)
43 PE12 DB12 To TFT LCD (CN13)
44 PE13 DB13 To TFT LCD (CN13)
45 PE14 DB14 To TFT LCD (CN13)
46 PE15 DB15 To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
73 N/C
12 OSC_IN Y2 25Mhz XTAL
13 OSC_OUT Y2 25Mhz XTAL
94 BOOT0 JP15 (3.3V or GND)
14 RESET S5
6 VBAT JP14 (3.3V or battery)
49 VSS_1 GND
74 VSS_2 GND
99 VSS_3 GND
27 VSS_4 GND
10 VSS_5 GND
19 VSSA VSSA
20 VREF- VREF-
LEDs
====
The Cloudctrl board has four LEDs labeled LED1, LED2, LED3 and LED4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
SYMBOL Meaning LED1* LED2 LED3 LED4****
------------------- ----------------------- ------- ------- ------- ------
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
**** LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Cloudctrl-specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=shenzhou (for the Cloudctrl development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SHENZHOU=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_ETHMAC
CONFIG_STM32_OTGFS
CONFIG_STM32_IWDG
CONFIG_STM32_PWR -- Required for RTC
APB1 (low speed)
----------------
CONFIG_STM32_BKP
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_CAN2
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_WWDG
APB2 (high speed)
-----------------
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32107xxx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
CONFIG_STM32_MII - Support Ethernet MII interface
CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface
CONFIG_STM32_RMII - Support Ethernet RMII interface
CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface
CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select full duplex mode. Default: half-duplex
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select 100 MBps speed. Default: 10 Mbps
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
defined. The PHY status register address may diff from PHY to PHY. This
configuration sets the address of the PHY status register.
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides bit mask indicating 10 or 100MBps speed.
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provide bit mask indicating full or half duplex modes.
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the mode bits indicating full duplex mode.
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
but some hooks are indicated with this condition.
Cloudctrl CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
Cloudctrl LCD Hardware Configuration
The LCD driver supports the following LCDs on the STM324xG_EVAL board:
AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
AM-240320D5TOQW01H (LCD_ILI9325)
Configuration options.
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
For the Cloudctrl board, the edge opposite from the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse
landscape" support. Default is this 320x240 "landscape"
orientation
For the Cloudctrl board, the edge next to the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_ILI9320_DISABLE (includes ILI9321)
CONFIG_STM32_ILI9325_DISABLE
STM32 USB OTG FS Host Driver Support
Pre-requisites
CONFIG_USBHOST - Enable USB host support
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
CONFIG_STM32_SYSCFG - Needed
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
Default 128 (512 bytes)
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
in 32-bit words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
debug. Depends on CONFIG_DEBUG_FEATURES.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
packets. Depends on CONFIG_DEBUG_FEATURES.
Configurations
==============
Each Cloudctrl configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh shenzhou:<subdir>
Where <subdir> is one of the following:
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables both the serial and telnet NSH interfaces.
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
CONFIG_NSH_DHCPC=n : DHCP is disabled
CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2
CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1
NOTES:
1. This example assumes that a network is connected. During its
initialization, it will try to negotiate the link speed. If you have
no network connected when you reset the board, there will be a long
delay (maybe 30 seconds?) before anything happens. That is the timeout
before the networking finally gives up and decides that no network is
available.
2. Enabling the ADC example:
The only internal signal for ADC testing is the potentiometer input:
ADC1_IN10(PC0) Potentiometer
External signals are also available on CON5 CN14:
ADC_IN8 (PB0) CON5 CN14 Pin2
ADC_IN9 (PB1) CON5 CN14 Pin1
The signal selection is hard-coded in boards/shenzhou/src/up_adc.c: The
potentiometer input (only) is selected.
These selections will enable sampling the potentiometer input at 100Hz using
Timer 1:
CONFIG_ANALOG=y : Enable analog device support
CONFIG_ADC=y : Enable generic ADC driver support
CONFIG_ADC_DMA=n : ADC DMA is not supported
CONFIG_STM32_ADC1=y : Enable ADC 1
CONFIG_STM32_TIM1=y : Enable Timer 1
CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC
CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
nxwm
----
This is a special configuration setup for the NxWM window manager
UnitTest. The NxWM window manager can be found here:
apps/graphics/NxWidgets/nxwm
The NxWM unit test can be found at:
apps/graphics/NxWidgets/UnitTests/nxwm
NOTE: JP6 selects between the touchscreen interrupt and the MII
interrupt. It should be positioned 1-2 to enable the touchscreen
interrupt.
NOTE: Reading from the LCD is not currently supported by this
configuration. The hardware will support reading from the LCD
and drivers/lcd/ssd1289.c also supports reading from the LCD.
This limits some graphics capabilities.
Reading from the LCD is not supported only because it has not
been test. If you get inspired to test this feature, you can
turn the LCD read functionality on by setting:
-CONFIG_LCD_NOGETRUN=y
+# CONFIG_LCD_NOGETRUN is not set
-CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_WRITEONLY is not set
thttpd
------
This builds the THTTPD web server example using the THTTPD and
the apps/examples/thttpd application.
NOTE: This example can only be built using older GCC toolchains
due to incompatibilities introduced in later GCC releases.

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README
======
This README discusses issues/thoughts unique to NuttX configuration(s) for the
ET-STM32 Stamp board from Futurlec (https://www.futurlec.com/ET-STM32_Stamp.shtml).
Microprocessor: 32-bit ARM Cortex M3 at 72MHz STM32F103RET6
Memory: 512 KB Flash and 64 KB SRAM
I/O Pins Out: 48
ADCs: 16 (at 12-bit resolution)
DACs: 2 (at 12-bit resolution)
Peripherals: RTC, 4 timers, 2 I2Cs, 3 SPI ports, 1 on-board UART (upto 5 channels)
Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces
Please see link below for board specific details:
https://www.futurlec.com/ET-STM32_Stamp_Technical.shtml
This configuration supports the ET-STM32 Stamp module.
Contents
========
- Development Environment
- Flashing/Programming
- Configurations
Development Environment
=======================
Either Linux (recommended), Mac or Cygwin on Windows can be used for the development
environment. The source has been built only using the GNU (Cortex M) toolchain.
Other toolchains will likely cause problems.
WSL (Windows Subsystem for Linux) was used to develop, compile and test the NuttX
build for the ET-STM32 Stamp platform.
Flashing/Programming
====================
Prerequisites:
1. The ET-STM32 Stamp module from Futurlec.
2. An RS232 connection cable such as the one in this link: (Part code: RS232CONN):
https://www.futurlec.com/DevBoardAccessories.shtml
It has a 4-pin connection header on one end and an RS-232 (DB9) female connector on
the other. The 4-pin connector can be directly plugged onto the Stamp module.
3. An RS232 to USB converter cable. Ensure that a suitable driver is installed for
the converter cable. When the cable is plugged in (for example), my PC lists the
assigned port with this name: "USB-SERIAL CH340 (COM2)".
Assuming Windows 10, navigate to: This PC -> Manage -> Device Manager -> Ports.
4. ST's Flash loader demonstrator tool. You can download it from here:
https://www.st.com/en/development-tools/flasher-stm32.html
To install the NuttX firmware (nuttx.bin) on the ET-STM32 Stamp:
1. First, power the Stamp module with a 3.3 VDC power supply. I made my own
Stamp module fixture using a 3.3 VDC switching regulator, a prototype PCB card
and some solder.
2. Insert the RS232CONN into the 4-pin on-board header. The other end should be
connected to the USB port of the PC using the RS232-USB converter.
3. Set the BOOT1 jumper on your board to the ISP position.
4. Press the BOOT0 switch. The green "BOOT0=1" LED should light up.
5. Reset the board by pressing on the RESET button.
6. Using the ST Flash loader demonstrator to download the NuttX binary image.
7. Wait until programming is completed and press "Finish". Toggle the
BOOT0 switch again. Reset the board.
You will now be presented with the NuttShell (NSH). Enjoy.
Configurations
==============
Information Common to All Configurations
----------------------------------------
The ET-STM32 Stamp configuration is maintained in a sub-directory and can be
selected as follow:
tools/configure.sh et-stm32-stamp:<subdir>
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be in one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
Configuration Sub-directories
-----------------------------
nsh:
This configuration directory provide the basic NuttShell (NSH).
A serial console is provided on USART1.

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README
======
This README discusses issues unique to NuttX configurations for the M3
Wildfire development board (STM32F103VET6). See http://firestm32.taobao.com
This configuration should support both the version 2 and version 3 of the
Wildfire board (using NuttX configuration options). However, only version 2
has been verified.
Contents
========
- Pin Configuration
- DFU and JTAG
- OpenOCD
- LEDs
- RTC
- M3 Wildfire-specific Configuration Options
- Configurations
Pin Configuration
=================
--- ------ -------------- -------------------------------------------------------------------
PIN NAME SIGNAL NOTES
--- ------ -------------- -------------------------------------------------------------------
1 PE2 PE2-C-RCLK Camera (P9)
2 PE3 PE3-USB-M USB2.0
3 PE4 PE4-BEEP LS1 Bell (v2)
PE4 10Mbps ENC28J60 Interrupt (v3)
4 PE5 (no name) 10Mbps ENC28J60 Interrupt (v2)
PE5 KEY1, Low when closed (pulled high if open) (v3)
5 PE6
6 VBAT BT1 Battery (BT1)
7 PC13 Header 7X2
8 PC14 PC14/OSC32-IN Y2 32.768KHz
9 PC15 PC15/OSC32-OUT Y2 32.768KHz
10 VSS_5 DGND
11 VDD_5 3V3
12 OSC_IN Y1 8MHz
13 OSC_OUT Y1 8MHz
14 NRST REST1 Reset switch
15 PC0
16 PC1 PC1/ADC123-IN11 Potentiometer (R16)
17 PC2
18 PC3 PC3-LED1 LED1, Active low (pulled high)
19 VSSA DGND
20 VREF- DGND
21 VREF+ 3V3
22 VDDA 3V3
23 PA0 PA0-C-VSYNC Camera (P9)
24 PA1 PC1/ADC123-IN1
25 PA2 PA2-US2-TX MAX3232, DB9 D7
--- ------ -------------- -------------------------------------------------------------------
PIN NAME SIGNAL NOTES
--- ------ -------------- -------------------------------------------------------------------
26 PA3 PA3-US2-RX MAX3232, DB9 D7
27 VSS_4 DGND
28 VDD_4 3V3
29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
33 PC4 PC4-LED2 LED2, Active low (pulled high)
34 PC5 PC5-LED3 LED3, Active low (pulled high)
35 PB0 PB0-KEY1 KEY1, Low when closed (pulled high if open) (v2)
PB0 Header P5 (v3)
36 PB1 PB1-KEY2 KEY2, Low when closed (pulled high if open)
37 PB2 BOOT1/DGND
38 PE7 PE7-FSMC_D4 2.4" TFT + Touchscreen
39 PE8 PE8-FSMC_D5 2.4" TFT + Touchscreen
40 PE9 PE9-FSMC_D6 2.4" TFT + Touchscreen
41 PE10 PE10-FSMC_D7 2.4" TFT + Touchscreen
42 PE11 PE11-FSMC_D8 2.4" TFT + Touchscreen
43 PE12 PE12-FSMC_D9 2.4" TFT + Touchscreen
44 PE13 PE13-FSMC_D10 2.4" TFT + Touchscreen
45 PE14 PE14-FSMC_D11 2.4" TFT + Touchscreen
46 PE15 PE15-FSMC_D12 2.4" TFT + Touchscreen
47 PB10 PB10-C-DO_2 Camera (P9)
48 PB11 PB11-MP3-RST MP3
PB11-C-DO_3 Camera (P9)
49 VSS_1 DGND
50 VDD_1 3V3
--- ------ -------------- -------------------------------------------------------------------
PIN NAME SIGNAL NOTES
--- ------ -------------- -------------------------------------------------------------------
51 PB12 PB12-SPI2-NSS MP3
PB12-C-DO_4 Camera (P9)
52 PB13 PB13-SPI2-SCK MP3
PB13-C-DO_5 Camera (P9)
53 PB14 PB14-SPI2-MISO MP3
PB14-C-DO_6 Camera (P9)
54 PB15 PB15-SPI2-MOSI MP3
PB15-C-DO_7 Camera (P9)
55 PD8 PD8-FSMC_D13 2.4" TFT + Touchscreen
56 PD9 PD9-FSMC_D14 2.4" TFT + Touchscreen
57 PD10 PD10-FSMC_D15 2.4" TFT + Touchscreen
58 PD11 PD11-FSMC_A16 2.4" TFT + Touchscreen
59 PD12 C-LED_EN Camera (P9)
60 PD13 PD13-LCD/LIGHT 2.4" TFT + Touchscreen
61 PD14 PD14-FSMC_D0 2.4" TFT + Touchscreen
62 PD15 PD15-FSMC_D1 2.4" TFT + Touchscreen
63 PC6 PC6-MP3-XDCS MP3
PC6-C-SIO_C Camera (P9)
64 PC7 PC7-MP3-DREQ MP3
PC7-C-SIO_D Camera (P9)
65 PC8 PC8-SDIO-D0 SD card, pulled high
66 PC9 PC9-SDIO-D1 SD card, pulled high
67 PA8 PA8-C-XCLK Camera (P9)
68 PA9 PA9-US1-TX MAX3232, DB9 D8
69 PA10 PA10-US1-RX MAX3232, DB9 D8
70 PA11 PA11-USBDM USB2.0
71 PA12 PA12-USBDP USB2.0
72 PA13 PA13-JTMS JTAG
73 N/C
74 VSS_2 DGND
75 VDD_2 3V3
--- ------ -------------- -------------------------------------------------------------------
PIN NAME SIGNAL NOTES
--- ------ -------------- -------------------------------------------------------------------
76 PA14 PA14-JTCK JTAG
77 PA15 PA15-JTDI JTAG
78 PC10 PC10-SDIO-D2 SD card, pulled high
79 PC11 PC10-SDIO-D3 SD card, pulled high
80 PC12 PC12-SDIO-CLK SD card
81 PD0 PD0-FSMC_D2 2.4" TFT + Touchscreen
82 PD1 PD1-FSMC_D3 2.4" TFT + Touchscreen
83 PD2 PD2-SDIO-CMD SD card, pulled high
84 PD3 PD3-C-WEN Camera (P9)
85 PD4 PD4-FSMC_NOE 2.4" TFT + Touchscreen
86 PD5 PD5-FSMC_NWE 2.4" TFT + Touchscreen
87 PD6 PD6-C-OE Camera (P9)
88 PD7 PD7-FSMC_NE1 2.4" TFT + Touchscreen
89 PB3 PB3-JTDO JTAG
90 PB4 PB4-NJTRST JTAG
91 PB5 PB5-C-WRST Camera (P9)
92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02
93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02
94 BOOT0 SW3 3V3 or DGND
95 PB8 PB8-CAN-RX CAN transceiver, Header 2H
PB8-C-DO_0 Camera (P9)
96 PB9 PB9-CAN-TX CAN transceiver, Header 2H
PB9-C-DO_1 Camera (P9)
97 PE0 PE0-C-RRST Camera (P9)
98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen
99 VSS_3 DGND
100 VDD_3 3V3
DFU and JTAG
============
Enbling Support for the DFU Bootloader
--------------------------------------
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line:
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed
to make space for the DFU loader and 0x08003000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for the
configuration.
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU
file (nuttx.dfu)... see below for details.
2. Connect the M3 Wildfire board to your computer using a USB
cable.
3. Start the DFU loader on the M3 Wildfire board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Run the DFU SE program to load nuttx.dfu into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo directory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.hex in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will end up with a file called
nuttx.dfu that you can use with the STMicro DFU SE program.
Enabling JTAG
-------------
If you are not using the DFU, then you will probably also need to enable
JTAG support. By default, all JTAG support is disabled but there NuttX
configuration options to enable JTAG in various different ways.
These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO
MAPR register. These bits are used to configure the SWJ and trace alternate
function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the
Cortex debug port. The default state in this port is for all JTAG support
to be disabled.
CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full
SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable
full SWJ (JTAG-DP + SW-DP) but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP
disabled and SW-DP enabled.
The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100
which disable JTAG-DP and SW-DP.
OpenOCD
=======
I have also used OpenOCD with the M3 Wildfire. In this case, I used
the Olimex USB ARM OCD. See the script in boards/arm/stm32/fire-stm32v2/tools/oocd.sh
for more information. Using the script:
1) Start the OpenOCD GDB server
cd <nuttx-build-directory>
boards/arm/stm32/fire-stm32v2/tools/oocd.sh $PWD
2) Load NuttX
cd <nuttx-built-directory>
arm-none-eabi-gdb nuttx
gdb> target remote localhost:3333
gdb> mon reset
gdb> mon halt
gdb> load nuttx
3) Running NuttX
gdb> mon reset
gdb> c
LEDs
====
The M3 Wildfire has 3 LEDs labeled LED1, LED2 and LED3. These LEDs are not
used by the NuttX port unless CONFIG_ARCH_LEDS is defined. In that case, the
usage by the board port is defined in include/board.h and src/up_autoleds.c.
The LEDs are used to encode OS-related events as follows:
/* LED1 LED2 LED3 */
#define LED_STARTED 0 /* OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* ON OFF OFF */
#define LED_IRQSENABLED 2 /* OFF ON OFF */
#define LED_STACKCREATED 3 /* OFF OFF OFF */
#define LED_INIRQ 4 /* NC NC ON (momentary) */
#define LED_SIGNAL 5 /* NC NC ON (momentary) */
#define LED_ASSERTION 6 /* NC NC ON (momentary) */
#define LED_PANIC 7 /* NC NC ON (2Hz flashing) */
#undef LED_IDLE /* Sleep mode indication not supported */
RTC
===
The STM32 RTC may configured using the following settings.
CONFIG_RTC - Enables general support for a hardware RTC. Specific
architectures may require other specific settings.
CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
second, usually supporting a 32-bit time_t value. In this case,
the RTC is used to &quot;seed&quot; the normal NuttX timer and the
NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES
is enabled in the NuttX configuration, then the RTC provides higher
resolution time and completely replaces the system timer for purpose of
date and time.
CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES
is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
A callback function will be executed when the alarm goes off.
In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts
are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
A BKP register is incremented on each overflow interrupt creating, effectively,
a 48-bit RTC counter.
In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
(because the next overflow is not expected until the year 2106).
WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
M3 Wildfire-specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32
CONFIG_ARCH_CHIP_STM32F103VE
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=fire-stm32v2 (for the M3 Wildfire development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_FIRE_STM32V2=y (Version 2)
CONFIG_ARCH_BOARD_FIRE_STM32V3=y (Version 3)
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN1
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
Alternate pin mappings. The M3 Wildfire board requires only CAN1 remapping
On the M3 Wildfire board pin PB9 is wired as TX and pin PB8 is wired as RX.
Which then makes the proper connection through the CAN transceiver SN65HVD230
out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH.
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_REMAP1
CONFIG_STM32_CAN1_REMAP2
CONFIG_STM32_CAN2_REMAP
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_SDIO_DMA - Support DMA data transfers. Requires
CONFIG_STM32_SDIO and CONFIG_STM32_DMA2.
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
M3 Wildfire CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
M3 Wildfire LCD Hardware Configuration
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
(this setting is informative only... not used).
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support. In this orientation, the M3 Wildfire's
LCD ribbon cable is at the bottom of the display. Default is
320x240 "landscape" orientation.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support. In this orientation, the
M3 Wildfire's LCD ribbon cable is at the top of the display.
Default is 320x240 "landscape" orientation.
CONFIG_LCD_BACKLIGHT - Define to support a backlight.
CONFIG_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an
adjustable backlight will be provided using timer 1 to generate
various pulse widthes. The granularity of the settings is
determined by CONFIG_LCD_MAXPOWER. If CONFIG_LCD_PWM (or
CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight
is provided.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_AM240320_DISABLE
CONFIG_STM32_SPFD5408B_DISABLE
Configurations
==============
Each M3 Wildfire configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh fire-stm32v2:<subdir>
Where <subdir> is one of the following:
nsh
---
Configure the NuttShell (nsh) located at examples/nsh. The nsh configuration
contains support for some built-in applications that can be enabled by making
some additional minor change to the configuration file.
Reconfiguring: This configuration uses to the kconfig-mconf configuration tool
to control the configuration. See the section entitled "NuttX Configuration
Tool" in the top-level README.txt file.
Start Delays: If no SD card is present in the slot, or if the network is not
connected, then there will be long start-up delays before you get the NSH
prompt. If I am focused on ENC28J60 debug, I usually disable MMC/SD so that
I don't have to bother with the SD card:
CONFIG_STM32_SDIO=n
CONFIG_MMCSD=n
STATUS: The board port is basically functional. Not all features have been
verified. The ENC28J60 network is not yet functional. Networking is
enabled by default in this configuration for testing purposes. To use this
configuration, the network must currently be disabled. To do this using
the kconfig-mconf configuration tool:
> make menuconfig
Then de-select "Networking Support" -> "Networking Support"
UPDATE: The primary problem with the ENC29J60 is a v2 board issue: The
SPI FLASH and the ENC28J60 shared the same SPI chip select signal (PA4-SPI1-NSS).
In order to finish the debug of the ENC28J60, it may be necessary to lift
the SPI FLASH chip select pin from the board.

518
boards/arm/stm32/hymini-stm32v/README.txt
View File

@ -1,518 +0,0 @@
README
======
This README discusses issues unique to NuttX configurations for the
HY-MiniSTM32V development board.
Contents
========
- ST Bootloader
- LEDs
- RTC
- HY-Mini specific Configuration Options
- Configurations
ST Bootloader
=============
A bootloader code is available in an internal boot ROM memory (called
'system memory' in STM documentation) in all STM32 MCUs. For the F103xx
this bootloader can be used to upload & flash a firmware image through
the USART1.
Notes:
- The bootloader is activated by the BOOT0 / BOOT1 pins after a MCU reset.
See STM application note 2606 for more details.
- On the hymini-stm32 board the USART1 is connected to a PL2303
USB<->serial converter.
To enter bootloader mode in the hymini-stm32 board:
- Press the 'boot0' button (located next to 'reset' button)
- While boot0 button is pressed, reset the board through the reset button.
- Once you pressed / released the 'reset' button, the MCU has (re)started
in bootloader mode (and you can then release the boot0 button).
A flash utility must be used on your development workstation to upload / flash
a firmware image. (The 'stm32flash' open source tool, available at
http://stm32flash.googlecode.com/ has been used successfully).
LEDs
====
The HY-MiniSTM32 board provides only two controllable LEDs labeled LED1 and LED2.
Usage of these LEDs is defined in include/board.h and src/up_leds.c.
They are encoded as follows:
SYMBOL Meaning LED1* LED2
------------------- ----------------------- ------- -------
LED_STARTED NuttX has been started OFF OFF
LED_HEAPALLOCATE Heap has been allocated ON OFF
LED_IRQSENABLED Interrupts enabled OFF ON
LED_STACKCREATED Idle stack created ON OFF
LED_INIRQ In an interrupt** OFF N/C
LED_SIGNAL In a signal handler*** N/C ON
LED_ASSERTION An assertion failed ON ON
LED_PANIC The system has crashed BLINK BLINK
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If NuttX starts correctly, normal state is to have LED1 on and LED2 off.
** LED1 is turned off during interrupt.
*** LED2 is turned on during signal handler.
RTC
===
The STM32 RTC may configured using the following settings.
CONFIG_RTC - Enables general support for a hardware RTC. Specific
architectures may require other specific settings.
CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
second, usually supporting a 32-bit time_t value. In this case,
the RTC is used to &quot;seed&quot; the normal NuttX timer and the
NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES
is enabled in the NuttX configuration, then the RTC provides higher
resolution time and completely replaces the system timer for purpose of
date and time.
CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES
is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
A callback function will be executed when the alarm goes off
In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts
are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
A BKP register is incremented on each overflow interrupt creating, effectively,
a 48-bit RTC counter.
In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
(because the next overflow is not expected until the year 2106.
WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
HY-Mini specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103VC
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=hymini-stm32v (for the HY-Mini development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x0000C000 (48Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3 (required for PWM control of LCD backlight)
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_IWDG
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN1
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
The Timer3 alternate mapping is required for PWM control of LCD backlight
CONFIG_STM32_TIM3_PARTIAL_REMAP=y
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
Others alternate pin mappings available:
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_REMAP1
CONFIG_STM32_CAN1_REMAP2
CONFIG_STM32_CAN2_REMAP
STM32F103V specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
Note: USART1 is connected to a PL2303 serial to USB converter.
So USART1 is available through USB port labeled CN3 on the board.
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
and CONFIG_STM32_DMA2.
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
CONFIG_MMCSD_HAVE_CARDDETECT - Select if SDIO driver card detection
is 100% accurate (it is on the HY-MiniSTM32V)
HY-MiniSTM32V CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
HY-MiniSTM32V LCD Hardware Configuration. The HY-Mini board may be delivered with
either an SSD1289 or an R61505U LCD controller.
CONFIG_LCD_R61505U - Selects the R61505U LCD controller.
CONFIG_LCD_SSD1289 - Selects the SSD1289 LCD controller.
The following options apply for either LCD controller:
CONFIG_NX_LCDDRIVER - To be defined to include LCD driver
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. In this orientation, the HY-MiniSTM32V's
LCD used connector is at the right of the display.
Default is this 320x240 "landscape" orientation
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support. In this orientation, the HY-MiniSTM32V's
LCD used connector is at the bottom of the display. Default is
320x240 "landscape" orientation.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support. In this orientation, the
HY-MiniSTM32V's LCD used connector is at the top of the display.
Default is 320x240 "landscape" orientation.
CONFIG_LCD_BACKLIGHT - Define to support an adjustable backlight
using timer 3. The granularity of the settings is determined
by CONFIG_LCD_MAXPOWER. Requires CONFIG_STM32_TIM3.
Configurations
==============
NOTES:
- All configurations described below are using the mconf-based
configuration tool. To change their configuration using that tool, you
should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
- All configurations use a generic GNU EABI toolchain for Linux by
default.
- They are all configured to generate a binary image that can be flashed
through the STM32 internal bootloader.
Each HY-MiniSTM32V configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh hymini-stm32v:<subdir>
Where <subdir> is one of the following:
nsh and nsh2:
------------
Configure the NuttShell (nsh) located at examples/nsh.
Differences between the two NSH configurations:
=========== ======================= ================================
nsh nsh2
=========== ======================= ================================
Serial Debug output: USART1 Debug output: USART1
Console: NSH output: USART1 NSH output: USART1 (2)
----------- ----------------------- --------------------------------
microSD Yes (5) Yes (5)
Support
----------- ----------------------- --------------------------------
FAT FS CONFIG_FAT_LCNAMES=y CONFIG_FAT_LCNAMES=y
Config CONFIG_FAT_LFN=n CONFIG_FAT_LFN=y (3)
----------- ----------------------- --------------------------------
LCD Driver No Yes
Support
----------- ----------------------- --------------------------------
RTC Support No Yes
----------- ----------------------- --------------------------------
Support for No Yes
Built-in
Apps
----------- ----------------------- --------------------------------
Built-in None apps/examples/nx
Apps apps/examples/nxhello
apps/system/usbmsc (4)
apps/examples/nximage
=========== ======================= ================================
(1) You will probably need to the PATH environment variable to set
up the correct PATH variable for whichever toolchain you may use.
(2) When any other device other than /dev/console is used for a user
interface, (1) linefeeds (\n) will not be expanded to carriage return
/ linefeeds \r\n). You will need to configure your terminal program
to account for this. And (2) input is not automatically echoed so
you will have to turn local echo on.
(3) Microsoft holds several patents related to the design of
long file names in the FAT file system. Please refer to the
details in the top-level NOTICE file. Please do not use FAT
long file name unless you are familiar with these patent issues.
(4) When built as an NSH add-on command (CONFIG_NSH_BUILTIN_APPS=y),
Caution should be used to assure that the SD drive is not in use when
the USB storage device is configured. Specifically, the SD driver
should be unmounted like:
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Card is mounted in NSH
...
nsh> umount /mnd/sdcard # Unmount before connecting USB!!!
nsh> msconn # Connect the USB storage device
...
nsh> msdis # Disconnect USB storate device
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Restore the mount
Failure to do this could result in corruption of the SD card format.
(5) Option CONFIG_NSH_ARCHINIT must be enabled in order to call the SDIO slot
initialization code.
usbmsc:
-------
This configuration directory exercises the USB mass storage
class driver at system/usbmsc. See examples/README.txt for
more information.
usbnsh:
-------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
NOTES:
1. This configuration does have UART2 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on UART2 unless you enable
some debug output or enable the USB monitor.
2. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (UART2 in this
configuration):
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing:
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console
usbserial:
---------
This configuration directory exercises the USB serial class
driver at examples/usbserial. See examples/README.txt for
more information.
CONFIG_HOST_LINUX=y : Linux host
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Linux
USB debug output can be enabled as by changing the following
settings in the configuration file:
-CONFIG_DEBUG_FEATURES=n
-CONFIG_DEBUG_INFO=n
-CONFIG_DEBUG_USB=n
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_USB=y
-CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n
-CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
+CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
By default, the usbserial example uses the Prolific PL2303
serial/USB converter emulation. The example can be modified
serial/USB converter emulation. The example can be modified
to use the CDC/ACM serial class by making the following changes
to the configuration file:
-CONFIG_PL2303=y
+CONFIG_PL2303=n
-CONFIG_CDCACM=n
+CONFIG_CDCACM=y

218
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@ -1,218 +0,0 @@
README
======
This README discusses issues unique to NuttX configurations for the
maple board from LeafLabs (http://leaflabs.com).
Microprocessor: 32-bit ARM Cortex M3 at 72MHz STM32F103RBT6 (STM32F103CBT6 for mini version)
Memory: 120 KB Flash and 20 KB SRAM
I/O Pins Out: 43 (34 for mini version)
ADCs: 9 (at 12-bit resolution)
Peripherals: 4 timers, 2 I2Cs, 2 SPI ports, 3 USARTs
Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces
Please see below link for a list of maple devices and documentations.
http://leaflabs.com/devices
http://leaflabs.com/docs
This config supports Maple and Maple Mini.
Contents
========
- Development Environment
- DFU
- Configurations
Development Environment
=======================
Either Linux (recommended), Mac or Cygwin on Windows can be used for the development
environment. The source has been built only using the GNU toolchain (see below).
Other toolchains will likely cause problems.
DFU
===
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line:
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08005000. This offset is needed
to make space for the DFU loader and 0x08005000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for each
configuration. In LeafLabs case, we are using maple bootloader:
http://leaflabs.com/docs/bootloader.html
For Linux or Mac:
----------------
While on Linux or Mac, we can use dfu-util to upload nuttx binary.
1. Make sure we have installed dfu-util. (From yum, apt-get or build from source.)
2. Start the DFU loader (bootloader) on the maple board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Flash the nuttx.bin to the board use dfu-util. Here's an example:
$ dfu-util -a1 -d 1eaf:0003 -D nuttx.bin -R
For anything not clear, we can refer to LeafLabs official document:
http://leaflabs.com/docs/unix-toolchain.html
For Windows:
-----------
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Connect the maple board to your computer using a USB
cable.
2. Start the DFU loader on the maple board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Run the DFU SE program to load nuttx.bin into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo directory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.hex in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will end up with a file called
nuttx.dfu that you can use with the STMicro DFU SE program.
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each Maple configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh maple:<subdir>
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
Configuration Sub-directories
-----------------------------
nsh:
This configuration directory provide the basic NuttShell (NSH).
A serial console is provided on USART1.
NOTES:
1. Currently configured for the STM32F103CB. But this is easily
reconfigured:
CONFIG_ARCH_CHIP_STM32F103RB=n
CONFIG_ARCH_CHIP_STM32F103CB=y
2. Support for the I2C tool has been disabled, but can be restored
with following configure options:
System Type -> Peripherals
CONFIG_STM32_I2C1=y
CONFIG_STM32_I2C2=y
CONFIG_STM32_I2CTIMEOSEC=1
CONFIG_STM32_I2CTIMEOMS=500
CONFIG_STM32_I2CTIMEOTICKS=500
Drivers
CONFIG_I2C=y
Applications -> System Add-Ons
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_I2CTOOL_MINBUS=1
CONFIG_I2CTOOL_MAXBUS=2
CONFIG_I2CTOOL_MINADDR=0x0
CONFIG_I2CTOOL_MAXADDR=0xf0
CONFIG_I2CTOOL_MAXREGADDR=0xff
CONFIG_I2CTOOL_DEFFREQ=100000
nx:
This configuration has been used to bring up the Sharp Memory LCD
on a custom board. This NX configuration was used for testing that
LCD. Debug output will appear on USART1.
NOTES:
1. Currently configured for the STM32F103CB. But this is easily
reconfigured:
CONFIG_ARCH_CHIP_STM32F103RB=n
CONFIG_ARCH_CHIP_STM32F103CB=y
2. You won't be able to buy a Sharp Memory LCD to use with your
Maple. If you want one, you will have to make one yourself.
usbnsh:
This is an alternative NuttShell (NSH) configuration that uses a USB
serial console for interaction.
NOTES:
1. Currently configured for the STM32F103CB. But this is easily
reconfigured:
CONFIG_ARCH_CHIP_STM32F103RB=n
CONFIG_ARCH_CHIP_STM32F103CB=y
2. Support for the I2C tool has been disabled, but can be restored
with following configure options:
System Type -> Peripherals
CONFIG_STM32_I2C1=y
CONFIG_STM32_I2C2=y
CONFIG_STM32_I2CTIMEOSEC=1
CONFIG_STM32_I2CTIMEOMS=500
CONFIG_STM32_I2CTIMEOTICKS=500
Drivers
CONFIG_I2C=y
Applications -> System Add-Ons
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_I2CTOOL_MINBUS=1
CONFIG_I2CTOOL_MAXBUS=2
CONFIG_I2CTOOL_MINADDR=0x0
CONFIG_I2CTOOL_MAXADDR=0xf0
CONFIG_I2CTOOL_MAXREGADDR=0xff
CONFIG_I2CTOOL_DEFFREQ=100000

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README
======
This README discusses issues unique to NuttX configurations for the Shenzhou
IV development board from www.armjishu.com featuring the STMicro STM32F107VCT
MCU. As of this writing, there are five models of the Shenzhou board:
1. Shenzhou I (STM32F103RB)
2. Shenzhou II (STM32F103VC)
3. Shenzhou III (STM32F103ZE)
4. Shenzhou IV (STM32F107VC)
5. Shenzhou king ((STM32F103ZG, core board + IO expansion board)).
Support is currently provided for the Shenzhou IV only. Features of the
Shenzhou IV board include:
- STM32F107VCT
- 10/100M PHY (DM9161AEP)
- TFT LCD Connector
- USB OTG
- CAN (CAN1=2)
- USART connectos (USART1-2)
- RS-485
- SD card slot
- Audio DAC (PCM1770)
- SPI Flash (W25X16)
- (4) LEDs (LED1-4)
- 2.4G Wireless (NRF24L01 SPI module)
- 315MHz Wireless (module)
- (4) Buttons (KEY1-4, USERKEY2, USERKEY, TEMPER, WAKEUP)
- VBUS/external +4V select
- 5V/3.3V power conversion
- Extension connector
- JTAG
Contents
========
- STM32F107VCT Pin Usage
- Shenzhou-specific Configuration Options
- LEDs
- Shenzhou-specific Configuration Options
- Configurations
STM32F107VCT Pin Usage
======================
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground.
24 PA1 MII_RX_CLK
RMII_REF_CLK
25 PA2 MII_MDIO
26 PA3 315M_VT
29 PA4 DAC_OUT1 To CON5(CN14)
30 PA5 DAC_OUT2 To CON5(CN14). JP10
SPI1_SCK To the SD card, SPI FLASH
31 PA6 SPI1_MISO To the SD card, SPI FLASH
32 PA7 SPI1_MOSI To the SD card, SPI FLASH
67 PA8 MCO To DM9161AEP PHY
68 PA9 USB_VBUS MINI-USB-AB. JP3
USART1_TX MAX3232 to CN5
69 PA10 USB_ID MINI-USB-AB. JP5
USART1_RX MAX3232 to CN5
70 PA11 USB_DM MINI-USB-AB
71 PA12 USB_DP MINI-USB-AB
72 PA13 TMS/SWDIO
76 PA14 TCK/SWCLK
77 PA15 TDI
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
35 PB0 ADC_IN1 To CON5(CN14)
36 PB1 ADC_IN2 To CON5(CN14)
37 PB2 DATA_LE To TFT LCD (CN13)
BOOT1 JP13
89 PB3 TDO/SWO
90 PB4 TRST
91 PB5 CAN2_RX
92 PB6 CAN2_TX JP11
I2C1_SCL
93 PB7 I2C1_SDA
95 PB8 USB_PWR Drives USB VBUS
96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
47 PB10 USERKEY Connected to KEY2
48 PB11 MII_TX_EN Ethernet PHY
51 PB12 I2S_WS Audio DAC
MII_TXD0 Ethernet PHY
52 PB13 I2S_CK Audio DAC
MII_TXD1 Ethernet PHY
53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14.
54 PB15 I2S_DIN Audio DAC
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
15 PC0 POTENTIO_METER
16 PC1 MII_MDC Ethernet PHY
17 PC2 WIRELESS_INT
18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
33 PC4 USERKEY2 Connected to KEY1
34 PC5 TP_INT JP6. To TFT LCD (CN13) module
MII_INT Ethernet PHY
63 PC6 I2S_MCK Audio DAC. Active low: Pulled high
64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high
65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high
66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high
78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module
79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module
80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module
7 PC13 TAMPER Connected to KEY3
8 PC14 OSC32_IN Y1 32.768Khz XTAL
9 PC15 OSC32_OUT Y1 32.768Khz XTAL
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
81 PD0 CAN1_RX
82 PD1 CAN1_TX
83 PD2 LED1 Active low: Pulled high
84 PD3 LED2 Active low: Pulled high
85 PD4 LED3 Active low: Pulled high
86 PD5 485_TX Same as USART2_TX but goes to SP3485
USART2_TX MAX3232 to CN6
87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
USART2_RX MAX3232 to CN6
88 PD7 LED4 Active low: Pulled high
485_DIR SP3485 read enable (not)
55 PD8 MII_RX_DV Ethernet PHY
RMII_CRSDV Ethernet PHY
56 PD9 MII_RXD0 Ethernet PHY
57 PD10 MII_RXD1 Ethernet PHY
58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
60 PD13 LCD_RS To TFT LCD (CN13)
61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14.
62 PD15 LCD_RD To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
97 PE0 DB00 To TFT LCD (CN13)
98 PE1 DB01 To TFT LCD (CN13)
1 PE2 DB02 To TFT LCD (CN13)
2 PE3 DB03 To TFT LCD (CN13)
3 PE4 DB04 To TFT LCD (CN13)
4 PE5 DB05 To TFT LCD (CN13)
5 PE6 DB06 To TFT LCD (CN13)
38 PE7 DB07 To TFT LCD (CN13)
39 PE8 DB08 To TFT LCD (CN13)
40 PE9 DB09 To TFT LCD (CN13)
41 PE10 DB10 To TFT LCD (CN13)
42 PE11 DB11 To TFT LCD (CN13)
43 PE12 DB12 To TFT LCD (CN13)
44 PE13 DB13 To TFT LCD (CN13)
45 PE14 DB14 To TFT LCD (CN13)
46 PE15 DB15 To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
73 N/C
12 OSC_IN Y2 25Mhz XTAL
13 OSC_OUT Y2 25Mhz XTAL
94 BOOT0 JP15 (3.3V or GND)
14 RESET S5
6 VBAT JP14 (3.3V or battery)
49 VSS_1 GND
74 VSS_2 GND
99 VSS_3 GND
27 VSS_4 GND
10 VSS_5 GND
19 VSSA VSSA
20 VREF- VREF-
LEDs
====
The Shenzhou board has four LEDs labeled LED1, LED2, LED3 and LED4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
SYMBOL Meaning LED1* LED2 LED3 LED4****
------------------- ----------------------- ------- ------- ------- ------
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
**** LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Shenzhou-specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=shenzhou (for the Shenzhou development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SHENZHOU=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_ETHMAC
CONFIG_STM32_OTGFS
CONFIG_STM32_IWDG
CONFIG_STM32_PWR -- Required for RTC
APB1 (low speed)
----------------
CONFIG_STM32_BKP
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_CAN2
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_WWDG
APB2 (high speed)
-----------------
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32107xxx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
CONFIG_STM32_MII - Support Ethernet MII interface
CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface
CONFIG_STM32_RMII - Support Ethernet RMII interface
CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface
CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select full duplex mode. Default: half-duplex
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select 100 MBps speed. Default: 10 Mbps
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
defined. The PHY status register address may diff from PHY to PHY. This
configuration sets the address of the PHY status register.
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides bit mask indicating 10 or 100MBps speed.
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provide bit mask indicating full or half duplex modes.
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the mode bits indicating full duplex mode.
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
but some hooks are indicated with this condition.
Shenzhou CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
Shenzhou LCD Hardware Configuration
The LCD driver supports the following LCDs on the STM324xG_EVAL board:
AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
AM-240320D5TOQW01H (LCD_ILI9325)
Configuration options.
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
For the Shenzhou board, the edge opposite from the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse
landscape" support. Default is this 320x240 "landscape"
orientation
For the Shenzhou board, the edge next to the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_ILI9320_DISABLE (includes ILI9321)
CONFIG_STM32_ILI9325_DISABLE
STM32 USB OTG FS Host Driver Support
Pre-requisites
CONFIG_USBHOST - Enable USB host support
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
CONFIG_STM32_SYSCFG - Needed
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
Default 128 (512 bytes)
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
in 32-bit words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
debug. Depends on CONFIG_DEBUG_FEATURES.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
packets. Depends on CONFIG_DEBUG_FEATURES.
Configurations
==============
Each Shenzhou configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh shenzhou:<subdir>
Where <subdir> is one of the following:
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables both the serial and telnet NSH interfaces.
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
CONFIG_NSH_DHCPC=n : DHCP is disabled
CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2
CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1
NOTES:
1. This example assumes that a network is connected. During its
initialization, it will try to negotiate the link speed. If you have
no network connected when you reset the board, there will be a long
delay (maybe 30 seconds?) before anything happens. That is the timeout
before the networking finally gives up and decides that no network is
available.
2. Enabling the ADC example:
The only internal signal for ADC testing is the potentiometer input:
ADC1_IN10(PC0) Potentiometer
External signals are also available on CON5 CN14:
ADC_IN8 (PB0) CON5 CN14 Pin2
ADC_IN9 (PB1) CON5 CN14 Pin1
The signal selection is hard-coded in boards/arm/stm32/shenzhou/src/up_adc.c: The
potentiometer input (only) is selected.
These selections will enable sampling the potentiometer input at 100Hz using
Timer 1:
CONFIG_ANALOG=y : Enable analog device support
CONFIG_ADC=y : Enable generic ADC driver support
CONFIG_ADC_DMA=n : ADC DMA is not supported
CONFIG_STM32_ADC1=y : Enable ADC 1
CONFIG_STM32_TIM1=y : Enable Timer 1
CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC
CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
nxwm
----
This is a special configuration setup for the NxWM window manager
UnitTest. The NxWM window manager can be found here:
apps/graphics/NxWidgets/nxwm
The NxWM unit test can be found at:
apps/graphics/NxWidgets/UnitTests/nxwm
NOTE: JP6 selects between the touchscreen interrupt and the MII
interrupt. It should be positioned 1-2 to enable the touchscreen
interrupt.
NOTE: Reading from the LCD is not currently supported by this
configuration. The hardware will support reading from the LCD
and drivers/lcd/ssd1289.c also supports reading from the LCD.
This limits some graphics capabilities.
Reading from the LCD is not supported only because it has not
been tested. If you get inspired to test this feature, you can
turn the LCD read functionality on by setting:
-CONFIG_LCD_NOGETRUN=y
+# CONFIG_LCD_NOGETRUN is not set
-CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_WRITEONLY is not set
thttpd
------
This builds the THTTPD web server example using the THTTPD and
the apps/examples/thttpd application.
NOTE: This example can only be built using the older toolchains
due to incompatibilities introduced in later GCC releases.

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boards/arm/stm32/stm3210e-eval/README.txt
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@ -1,906 +0,0 @@
README
======
This README discusses issues unique to NuttX configurations for the
STMicro STM3210E-EVAL development board.
Contents
========
- DFU and JTAG
- OpenOCD
- LEDs
- Temperature Sensor
- RTC
- FSMC SRAM
- STM3210E-EVAL-specific Configuration Options
- Configurations
DFU and JTAG
============
Enbling Support for the DFU Bootloader
--------------------------------------
The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
loader or via some JTAG emulator. You can specify the DFU bootloader by
adding the following line:
CONFIG_STM32_DFU=y
to your .config file. Most of the configurations in this directory are set
up to use the DFU loader.
If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed
to make space for the DFU loader and 0x08003000 is where the DFU loader expects
to find new applications at boot time. If you need to change that origin for some
other bootloader, you will need to edit the file(s) ld.script.dfu for the
configuration.
The DFU SE PC-based software is available from the STMicro website,
http://www.st.com. General usage instructions:
1. Convert the NuttX Intel Hex file (nuttx.hex) into a special DFU
file (nuttx.dfu)... see below for details.
2. Connect the STM3210E-EVAL board to your computer using a USB
cable.
3. Start the DFU loader on the STM3210E-EVAL board. You do this by
resetting the board while holding the "Key" button. Windows should
recognize that the DFU loader has been installed.
3. Run the DFU SE program to load nuttx.dfu into FLASH.
What if the DFU loader is not in FLASH? The loader code is available
inside of the Demo directory of the USBLib ZIP file that can be downloaded
from the STMicro Website. You can build it using RIDE (or other toolchains);
you will need a JTAG emulator to burn it into FLASH the first time.
In order to use STMicro's built-in DFU loader, you will have to get
the NuttX binary into a special format with a .dfu extension. The
DFU SE PC_based software installation includes a file "DFU File Manager"
conversion program that a file in Intel Hex format to the special DFU
format. When you successfully build NuttX, you will find a file called
nutt.hex in the top-level directory. That is the file that you should
provide to the DFU File Manager. You will end up with a file called
nuttx.dfu that you can use with the STMicro DFU SE program.
Enabling JTAG
-------------
If you are not using the DFU, then you will probably also need to enable
JTAG support. By default, all JTAG support is disabled but there NuttX
configuration options to enable JTAG in various different ways.
These configurations effect the setting of the SWJ_CFG[2:0] bits in the AFIO
MAPR register. These bits are used to configure the SWJ and trace alternate
function I/Os. The SWJ (SerialWire JTAG) supports JTAG or SWD access to the
Cortex debug port. The default state in this port is for all JTAG support
to be disabled.
CONFIG_STM32_JTAG_FULL_ENABLE - sets SWJ_CFG[2:0] to 000 which enables full
SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - sets SWJ_CFG[2:0] to 001 which enable
full SWJ (JTAG-DP + SW-DP) but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - sets SWJ_CFG[2:0] to 010 which would set JTAG-DP
disabled and SW-DP enabled.
The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100
which disable JTAG-DP and SW-DP.
OpenOCD
=======
I have also used OpenOCD with the STM3210E-EVAL. In this case, I used
the Olimex USB ARM OCD. See the script in boards/arm/stm32/stm3210e-eval/tools/oocd.sh
for more information. Using the script:
1) Start the OpenOCD GDB server
cd <nuttx-build-directory>
boards/arm/stm32/stm3210e-eval/tools/oocd.sh $PWD
2) Load NuttX
cd <nuttx-built-directory>
arm-none-eabi-gdb nuttx
gdb> target remote localhost:3333
gdb> mon reset
gdb> mon halt
gdb> load nuttx
3) Running NuttX
gdb> mon reset
gdb> c
LEDs
====
The STM3210E-EVAL board has four LEDs labeled LD1, LD2, LD3 and LD4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
SYMBOL Meaning LED1* LED2 LED3 LED4
---------------- ----------------------- ----- ----- ----- -----
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED3 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
Temperature Sensor
==================
LM-75 Temperature Sensor Driver
-------------------------------
Support for the on-board LM-75 temperature sensor is available. This
support has been verified, but has not been included in any of the
available the configurations. To set up the temperature sensor, add the
following to the NuttX configuration file
Drivers -> Sensors
CONFIG_SENSORS_LM75=y
CONFIG_LM75_I2C=y
Then you can implement logic like the following to use the temperature
sensor:
#include <nuttx/sensors/lm75.h>
#include <arch/board/board.h>
ret = stm32_lm75initialize("/dev/temp"); /* Register the temperature sensor */
fd = open("/dev/temp", O_RDONLY); /* Open the temperature sensor device */
ret = ioctl(fd, SNIOC_FAHRENHEIT, 0); /* Select Fahrenheit */
bytesread = read(fd, buffer, 8*sizeof(b16_t)); /* Read temperature samples */
More complex temperature sensor operations are also available. See the
IOCTL commands enumerated in include/nuttx/sensors/lm75.h. Also read the
descriptions of the stm32_lm75initialize() and stm32_lm75attach()
interfaces in the arch/board/board.h file (sames as
boards/arm/stm32/stm3210e-eval/include/board.h).
NSH Command Line Application
----------------------------
There is a tiny NSH command line application at examples/system/lm75 that
will read the current temperature from an LM75 compatible temperature sensor
and print the temperature on stdout in either units of degrees Fahrenheit or
Centigrade. This tiny command line application is enabled with the following
configuration options:
Library
CONFIG_LIBM=y
CONFIG_LIBC_FLOATINGPOINT=y
Applications -> NSH Library
CONFIG_NSH_ARCHINIT=y
Applications -> System Add-Ons
CONFIG_SYSTEM_LM75=y
CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp"
CONFIG_SYSTEM_LM75_FAHRENHEIT=y (or CENTIGRADE)
CONFIG_SYSTEM_LM75_STACKSIZE=1024
CONFIG_SYSTEM_LM75_PRIORITY=100
RTC
===
The STM32 RTC may configured using the following settings.
CONFIG_RTC - Enables general support for a hardware RTC. Specific
architectures may require other specific settings.
CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1
second, usually supporting a 32-bit time_t value. In this case,
the RTC is used to &quot;seed&quot; the normal NuttX timer and the
NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES
is enabled in the NuttX configuration, then the RTC provides higher
resolution time and completely replaces the system timer for purpose of
date and time.
CONFIG_RTC_FREQUENCY - If CONFIG_RTC_HIRES is defined, then the
frequency of the high resolution RTC must be provided. If CONFIG_RTC_HIRES
is not defined, CONFIG_RTC_FREQUENCY is assumed to be one.
CONFIG_RTC_ALARM - Enable if the RTC hardware supports setting of an alarm.
A callback function will be executed when the alarm goes off.
In hi-res mode, the STM32 RTC operates only at 16384Hz. Overflow interrupts
are handled when the 32-bit RTC counter overflows every 3 days and 43 minutes.
A BKP register is incremented on each overflow interrupt creating, effectively,
a 48-bit RTC counter.
In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
(because the next overflow is not expected until the year 2106).
WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
FSMC SRAM
=========
The 8-Mbit SRAM is connected to the STM32 at PG10 which will be FSMC_NE3, Bank1
SRAM3. This memory will appear at address 0x68000000.
The on-board SRAM can be configured by setting
CONFIG_STM32_FSMC=y : Enables the FSMC
CONFIG_STM32_EXTERNAL_RAM=y : Enable external SRAM support
CONFIG_HEAP2_BASE=0x68000000 : SRAM will be located at 0x680000000
CONFIG_HEAP2_SIZE=1048576 : The size of the SRAM is 1Mbyte
CONFIG_MM_REGIONS=2 : There will be two memory regions
: in the heap
STM3210E-EVAL-specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103ZE
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=stm3210e_eval (for the STM3210E-EVAL development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_STM3210E_EVAL=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_FSMC
CONFIG_STM32_SDIO
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN1
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_USB
APB2
----
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,8
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,8
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,8, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,8
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,8, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
Alternate pin mappings. The STM3210E-EVAL board requires only CAN1 remapping
On the STM3210E-EVAL board pin PB9 is wired as TX and pin PB8 is wired as RX.
Which then makes the proper connection through the CAN transceiver SN65HVD230
out to the CAN D-type 9-pn male connector where pin 2 is CANL and pin 7 is CANH.
CONFIG_STM32_TIM1_FULL_REMAP
CONFIG_STM32_TIM1_PARTIAL_REMAP
CONFIG_STM32_TIM2_FULL_REMAP
CONFIG_STM32_TIM2_PARTIAL_REMAP_1
CONFIG_STM32_TIM2_PARTIAL_REMAP_2
CONFIG_STM32_TIM3_FULL_REMAP
CONFIG_STM32_TIM3_PARTIAL_REMAP
CONFIG_STM32_TIM4_REMAP
CONFIG_STM32_USART1_REMAP
CONFIG_STM32_USART2_REMAP
CONFIG_STM32_USART3_FULL_REMAP
CONFIG_STM32_USART3_PARTIAL_REMAP
CONFIG_STM32_SPI1_REMAP
CONFIG_STM32_SPI3_REMAP
CONFIG_STM32_I2C1_REMAP
CONFIG_STM32_CAN1_REMAP1
CONFIG_STM32_CAN1_REMAP2
CONFIG_STM32_CAN2_REMAP
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
and CONFIG_STM32_DMA2.
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
STM3210E-EVAL CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
STM3210E-EVAL LCD Hardware Configuration
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
(this setting is informative only... not used).
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support. In this orientation, the STM3210E-EVAL's
LCD ribbon cable is at the bottom of the display. Default is
320x240 "landscape" orientation.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support. In this orientation, the
STM3210E-EVAL's LCD ribbon cable is at the top of the display.
Default is 320x240 "landscape" orientation.
CONFIG_STM3210E_LCD_BACKLIGHT - Define to support a backlight.
CONFIG_STM3210E_LCD_PWM - If CONFIG_STM32_TIM1 is also defined, then an
adjustable backlight will be provided using timer 1 to generate
various pulse widthes. The granularity of the settings is
determined by CONFIG_LCD_MAXPOWER. If CONFIG_STM3210E_LCD_PWM (or
CONFIG_STM32_TIM1) is not defined, then a simple on/off backlight
is provided.
CONFIG_STM3210E_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM3210E_AM240320_DISABLE
CONFIG_STM3210E_SPFD5408B_DISABLE
CONFIG_STM3210E_R61580_DISABLE
Configurations
==============
Each STM3210E-EVAL configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh stm3210e-eval:<subdir>
Where <subdir> is one of the following:
composite
---------
This configuration exercises a composite USB interface consisting
of a CDC/ACM device and a USB mass storage device. This configuration
uses apps/system/composite.
nsh and nsh2:
------------
Configure the NuttShell (nsh) located at examples/nsh.
Differences between the two NSH configurations:
=========== ======================= ================================
nsh nsh2
=========== ======================= ================================
Platform Windows with Cygwin (2) Windows with Cygwin (2)
----------- ----------------------- --------------------------------
Toolchain: NuttX buildroot (1) ARM EABI GCC for Windows (1)
----------- ----------------------- --------------------------------
Loader: DfuSe DfuSe
----------- ----------------------- --------------------------------
Serial Debug output: USART1 Debug output: USART1
Console: NSH output: USART1 NSH output: USART1 (3)
----------- ----------------------- --------------------------------
I2C No I2C1
----------- ----------------------- --------------------------------
microSD Yes Yes
Support
----------- ----------------------- --------------------------------
FAT FS CONFIG_FAT_LCNAMES=y CONFIG_FAT_LCNAMES=y
Config CONFIG_FAT_LFN=n CONFIG_FAT_LFN=y (4)
----------- ----------------------- --------------------------------
Support for No Yes
Built-in
Apps
----------- ----------------------- --------------------------------
Built-in None apps/examples/nx
Apps apps/examples/nxhello
apps/system/usbmsc (5)
apps/system/i2c
=========== ======================= ================================
(1) You will probably need to modify PATH environment variable to
to include the correct path to the binaries for whichever
toolchain you may use.
(2) Since DfuSe is assumed, this configuration may only work under
Cygwin without modification.
(3) When any other device other than /dev/console is used for a user
interface, (1) linefeeds (\n) will not be expanded to carriage return
/ linefeeds \r\n). You will need to configure your terminal program
to account for this. And (2) input is not automatically echoed so
you will have to turn local echo on.
(4) Microsoft holds several patents related to the design of
long file names in the FAT file system. Please refer to the
details in the top-level NOTICE file. Please do not use FAT
long file name unless you are familiar with these patent issues.
(5) When built as an NSH add-on command (CONFIG_NSH_BUILTIN_APPS=y),
Caution should be used to assure that the SD drive is not in use when
the USB storage device is configured. Specifically, the SD driver
should be unmounted like:
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Card is mounted in NSH
...
nsh> umount /mnd/sdcard # Unmount before connecting USB!!!
nsh> msconn # Connect the USB storage device
...
nsh> msdis # Disconnect USB storate device
nsh> mount -t vfat /dev/mmcsd0 /mnt/sdcard # Restore the mount
Failure to do this could result in corruption of the SD card format.
1. Both configurations use the mconf-based configuration tool. To
change these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. The nsh2 contains support for some built-in applications that can be
enabled by make some additional minor changes:
a. examples/can. The CAN test example can be enabled by changing the
following settings in nsh2/defconfig:
CONFIG_CAN=y : Enable CAN "upper-half" driver support
CONFIG_STM32_CAN1=y : Enable STM32 CAN1 "lower-half" driver support
The default CAN settings may need to change in your board board
configuration:
CONFIG_CAN_EXTID=y : Support extended IDs
CONFIG_STM32_CAN1_BAUD=250000 : Bit rate: 250 KHz
CONFIG_STM32_CAN_TSEG1=12 : 80% sample point
CONFIG_STM32_CAN_TSEG2=3
nx:
---
An example using the NuttX graphics system (NX). This example
focuses on general window controls, movement, mouse and keyboard
input.
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
CONFIG_LCD_RPORTRAIT=y : 240x320 reverse portrait
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. If you configured the multi-used NX server (which is disabled
by default), then you would also need:
CONFIG_EXAMPLES_NX_CLIENTPRIO=80
CONFIG_EXAMPLES_NX_SERVERPRIO=120
CONFIG_EXAMPLES_NX_STACKSIZE=2048
3. This example provides a framework for a number of other standalone
graphics tests.
a. apps/examples/nxlines: The NXLINES graphic example illustrates
drawing of fat lines in various orientations. You can modify
this configuration so to support the NXLINES example by making
the following modifications to the NuttX configuration file:
Provide the new start-up entry point:
CONFIG_INIT_ENTRYPOINT="nxlines_main"
Disable apps/examples/nx:
CONFIG_EXAMPLES_NX=n
Enable and configure apps/nxlines/nxlines:
CONFIG_EXAMPLES_NXLINES=y
CONFIG_EXAMPLES_NXLINES_VPLANE=0
CONFIG_EXAMPLES_NXLINES_DEVNO=0
CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS=n
CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320
CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0
CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0
CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb
CONFIG_EXAMPLES_NXLINES_BPP=16
CONFIG_EXAMPLES_NXLINES_EXTERNINIT=n
b. apps/examples/nxtext: Another example using the NuttX graphics
system (NX). This example focuses on placing text on the
background while pop-up windows occur. Text should continue to
update normally with or without the popup windows present.
You can modify this configuration so to support the NXLINES
example by making the following modifications to the NuttX
configuration file:
Provide the new start-up entry point:
CONFIG_INIT_ENTRYPOINT="nxtext_main"
Disable apps/examples/nx:
CONFIG_EXAMPLES_NX=n
Enable an NX font:
CONFIG_NXFONT_SERIF22X28B=y
Enable and configure apps/nxlines/nxtext:
CONFIG_EXAMPLES_NXTEXT=y
CONFIG_EXAMPLES_NXTEXT_VPLANE=0
CONFIG_EXAMPLES_NXTEXT_DEVNO=0
CONFIG_EXAMPLES_NXTEXT_BPP=16
CONFIG_EXAMPLES_NXTEXT_BMCACHE=512
CONFIG_EXAMPLES_NXTEXT_GLCACHE=16
CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=n
CONFIG_EXAMPLES_NXTEXT_BGCOLOR=0x0011
CONFIG_EXAMPLES_NXTEXT_BGFONTCOLOR=0xffdf
CONFIG_EXAMPLES_NXTEXT_PUCOLOR=0xfd20
CONFIG_EXAMPLES_NXTEXT_PUFONTCOLOR=0x001f
CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=n
CONFIG_EXAMPLES_NXTEXT_BGFONTID=11
CONFIG_EXAMPLES_NXTEXT_PUFONTID=1
CONFIG_EXAMPLES_NXTEXT_EXTERNINIT=n
If you configured the multi-used NX server (which is disabled
by default), then you would also need:
CONFIG_EXAMPLES_NXTEXT_STACKSIZE=2048
CONFIG_EXAMPLES_NXTEXT_CLIENTPRIO=80
CONFIG_EXAMPLES_NXTEXT_SERVERPRIO=120
c. Others could be similar configured: apps/examples/nxhello,
nximage, ...
4. The nsh configuration was used to verify the discrete joystick
(DJoystick driver). If you would like to duplicate this test, below
are the configuration changes needed to setup the DJoystick driver
(see nuttx/drivers/input/djoystick.c) and the DJoystick test (see
apps/examples/djoystick):
Pre-requisites:
CONFIG_BUILTIN=y # Enable support for built-in applications
CONFIG_NSH_BUILTIN_APPS=y # Enable NSH built-in applications
Enable the DJoystick driver:
CONFIG_INPUT=y # Enable input driver support
CONFIG_INPUT_DJOYSTICK=y # Enable the joystick drivers
# (default parameters should be okay)
Enable the DJoystick Example:
CONFIG_EXAMPLES_DJOYSTICK=y # Enable the DJoystick example
CONFIG_EXAMPLES_DJOYSTICK_DEVNAME="/dev/djoy0"
When running the configuration, you should see the built-in
application 'djoy'. Just type 'djoy' at the NSH command prompt.
nxterm:
----------
This is yet another NSH configuration. This NSH configuration differs
from the other, however, in that it uses the NxTerm driver to host
the NSH shell.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Some of the differences in this configuration include these settings
in the defconfig file:
These select NX Multi-User mode:
CONFG_NX_MULTIUSER=y
CONFIG_DISABLE_MQUEUE=n
The following definition in the defconfig file to enables the NxTerm
driver:
CONFIG_NXTERM=y
And this selects apps/examples/nxterm instead of apps/examples/nsh:
CONFIG_EXAMPLES_NXTERM=y
Other configuration settings of interest:
CONFIG_HOST_WINDOWS=y : Windows
CONFIG_WINDOWS_CYGWIN=y : with Cygwin
CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin
CONFIG_LCD_LANDSCAPE=y : 320x240 landscape
pm:
--
This is a configuration that is used to test STM32 power management, i.e.,
to test that the board can go into lower and lower states of power usage
as a result of inactivity. This configuration is based on the nsh2
configuration with modifications for testing power management. This
configuration should provide some guideline for power management in your
STM32 application.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Default configuration is Cygwin under windows using the ARM EABI
toolchain:
CONFIG_HOST_WINDOWS=y : Windows
CONFIG_WINDOWS_CYGWIN=y : Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. CONFIG_ARCH_CUSTOM_PMINIT and CONFIG_ARCH_IDLE_CUSTOM are necessary
parts of the PM configuration:
CONFIG_ARCH_CUSTOM_PMINIT=y
CONFIG_ARCH_CUSTOM_PMINIT moves the PM initialization from
arch/arm/src/stm32/stm32_pminitialiaze.c to boards/arm/stm32/stm3210-eval/src/stm32_pm.c.
This allows us to support board-specific PM initialization.
CONFIG_ARCH_IDLE_CUSTOM=y
The bulk of the PM activities occur in the IDLE loop. The IDLE loop
is special because it is what runs when there is no other task running.
Therefore when the IDLE executes, we can be assure that nothing else
is going on; this is the ideal condition for doing reduced power
management.
The configuration CONFIG_ARCH_IDLE_CUSTOM allows us to "steal" the
normal STM32 IDLE loop (of arch/arm/src/stm32/stm32_idle.c) and replace
this with our own custom IDLE loop (at boards/arm/stm32/stm3210-eval/src/up_idle.c).
4. Here are some additional things to note in the configuration:
CONFIG_PM_BUTTONS=y
CONFIG_PM_BUTTONS enables button support for PM testing. Buttons can
drive EXTI interrupts and EXTI interrupts can be used to wakeup for
certain reduced power modes (STOP mode). The use of the buttons here
is for PM testing purposes only; buttons would normally be part the
application code and CONFIG_PM_BUTTONS would not be defined.
CONFIG_RTC_ALARM=y
The RTC alarm is used to wake up from STOP mode and to transition to
STANDBY mode. This used of the RTC alarm could conflict with other
uses of the RTC alarm in your application.
usbserial:
---------
This configuration directory exercises the USB serial class
driver at examples/usbserial. See examples/README.txt for
more information.
CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin
USB debug output can be enabled as by changing the following
settings in the configuration file:
-CONFIG_DEBUG_FEATURES=n
-CONFIG_DEBUG_INFO=n
-CONFIG_DEBUG_USB=n
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_USB=y
-CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n
-CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n
-CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
+CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
+CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
By default, the usbserial example uses the Prolific PL2303
serial/USB converter emulation. The example can be modified
to use the CDC/ACM serial class by making the following changes
to the configuration file:
-CONFIG_PL2303=y
+CONFIG_PL2303=n
-CONFIG_CDCACM=n
+CONFIG_CDCACM=y
The example can also be converted to use the alternative
USB serial example at apps/examples/usbterm by changing the
following:
-CONFIG_EXAMPLES_USBSERIAL=y
+CONFIG_EXAMPLES_USBSERIAL=n
usbmsc:
-------
This configuration directory exercises the USB mass storage
class driver at system/usbmsc. See examples/README.txt for
more information.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Build environment (can be easily reconfigured):
CONFIG_HOST_LINUX=y : Linux (or Cygwin)
CONFIG_ARM_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin

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@ -1,447 +0,0 @@
README
======
This README discusses issues unique to NuttX configurations for the
STM32 Tiny development board.
This board is available from several vendors on the net, and may
be sold under different names. It is based on a STM32 F103C8T6 MCU, and
is (always ?) bundled with a nRF24L01 wireless communication module.
Contents
========
- LEDs
- PWM
- UARTs
- Timer Inputs/Outputs
- STM32 Tiny -specific Configuration Options
- Configurations
LEDs
====
The STM32Tiny board has only one software controllable LED.
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
enabled.
If enabled the LED is simply turned on when the board boots
successfully, and is blinking on panic / assertion failed.
PWM
===
The STM32 Tiny has no real on-board PWM devices, but the board can be
configured to output a pulse train using TIM3 CH2 on the GPIO line B.5
(connected to the LED).
Please note that the CONFIG_STM32_TIM3_PARTIAL_REMAP option must be enabled
in this case.
UARTs
=====
UART/USART PINS
---------------
USART1
RX PA10
TX PA9
USART2
CK PA4
CTS PA0*
RTS PA1
RX PA3
TX PA2
USART3
CK PB12*
CTS PB13*
RTS PB14*
RX PB11
TX PB10
* these IO lines are intended to be used by the wireless module on the board.
Default USART/UART Configuration
--------------------------------
USART1 (RX & TX only) is available through the RS-232 port on the board. A MAX232 chip converts
voltage to RS-232 level. This serial port can be used to flash a firmware using the boot loader
integrated in the MCU.
Timer Inputs/Outputs
====================
TIM1
CH1 PA8
CH2 PA9*
CH3 PA10*
CH4 PA11*
TIM2
CH1 PA0*, PA15, PA5
CH2 PA1, PB3
CH3 PA2, PB10*
CH4 PA3, PB11
TIM3
CH1 PA6, PB4
CH2 PA7, PB5*
CH3 PB0
CH4 PB1*
TIM4
CH1 PB6*
CH2 PB7
CH3 PB8
CH4 PB9*
* Indicates pins that have other on-board functions and should be used only
with care (See board datasheet).
STM32 Tiny - specific Configuration Options
===============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103C8=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=stm32_tiny
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_STM32_TINY=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=20480 (20Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_CRC
CONFIG_STM32_BKPSRAM
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_PWR -- Required for RTC
APB2
----
CONFIG_STM32_TIM1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_SPI1
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation or ADC conversion.
Note that ADC require two definitions: Not only do you have
to assign the timer (n) for used by the ADC, but then you also have to
configure which ADC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default only SW-DP is enabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32Tiny specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3)
for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
STM32Tiny CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
STM32Tiny SPI Configuration
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
Configurations
==============
Each STM32Tiny configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh STM32Tiny:<subdir>
Where <subdir> is one of the following:
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. This
configuration enables a console on UART1. Support for
builtin applications is enabled, but in the base configuration no
builtin applications are selected (see NOTES below).
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the ARM EABI toolchain
for Windows and builds under Cygwin (or probably MSYS). That
can easily be reconfigured, of course.
CONFIG_HOST_WINDOWS=y : Builds under Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. This example supports the PWM test (apps/examples/pwm) but this must
be manually enabled by selecting:
CONFIG_PWM=y : Enable the generic PWM infrastructure
CONFIG_STM32_TIM3=y : Enable TIM3
CONFIG_STM32_TIM3_PWM=y : Use TIM3 to generate PWM output
CONFIG_STM32_TIM3_PARTIAL_REMAP=y : Required to have the port B5 as timer PWM output (channel 2)
CONFIG_STM32_TIM3_CHANNEL=2
See also apps/examples/README.txt
Note that the only supported board configuration uses the board LED as PWM output.
Special PWM-only debug options:
CONFIG_DEBUG_PWM_INFO
7. USB Support (CDC/ACM device)
CONFIG_STM32_OTGFS=y : STM32 OTG FS support
CONFIG_USBDEV=y : USB device support must be enabled
CONFIG_CDCACM=y : The CDC/ACM driver must be built
CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled
CONFIG_NSH_ARCHINIT=y : To perform USB initialization
8. Using the USB console.
The STM32Tiny NSH configuration can be set up to use a USB CDC/ACM
(or PL2303) USB console. The normal way that you would configure the
the USB console would be to change the .config file like this:
CONFIG_STM32_OTGFS=y : STM32 OTG FS support
CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console
CONFIG_DEV_CONSOLE=n : Inhibit use of /dev/console by other logic
CONFIG_USBDEV=y : USB device support must be enabled
CONFIG_CDCACM=y : The CDC/ACM driver must be built
CONFIG_CDCACM_CONSOLE=y : Enable the CDC/ACM USB console.
NOTE: When you first start the USB console, you have hit ENTER a few
times before NSH starts. The logic does this to prevent sending USB data
before there is anything on the host side listening for USB serial input.
9. Here is an alternative USB console configuration. The following
configuration will also create a NSH USB console but this version
will use /dev/console. Instead, it will use the normal /dev/ttyACM0
USB serial device for the console:
CONFIG_STM32_OTGFS=y : STM32 OTG FS support
CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console
CONFIG_DEV_CONSOLE=y : /dev/console exists (but NSH won't use it)
CONFIG_USBDEV=y : USB device support must be enabled
CONFIG_CDCACM=y : The CDC/ACM driver must be built
CONFIG_CDCACM_CONSOLE=n : Don't use the CDC/ACM USB console.
CONFIG_NSH_USBCONSOLE=y : Instead use some other USB device for the console
The particular USB device that is used is:
CONFIG_NSH_USBCONDEV="/dev/ttyACM0"
The advantage of this configuration is only that it is easier to
bet working. This alternative does has some side effects:
- When any other device other than /dev/console is used for a user
interface, linefeeds (\n) will not be expanded to carriage return /
linefeeds (\r\n). You will need to set your terminal program to account
for this.
- /dev/console still exists and still refers to the serial port. So
you can still use certain kinds of debug output (see include/debug.h, all
of the debug output from interrupt handlers will be lost.
- But don't enable USB debug output! Since USB is console is used for
USB debug output and you are using a USB console, there will be
infinite loops and deadlocks: Debug output generates USB debug
output which generatates USB debug output, etc. If you want USB
debug output, you should consider enabling USB trace
(CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_USBMONITOR).
See the usbnsh configuration below for more information on configuring
USB trace output and the USB monitor.
usbnsh:
-------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the ARM EABI toolchain
for Windows and builds under Cygwin (or probably MSYS). That
can easily be reconfigured, of course.
CONFIG_HOST_WINDOWS=y : Builds under Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. This configuration does have UART2 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on UART2 unless you enable
some debug output or enable the USB monitor.
4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (UART2 in this
configuration):
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
5. By default, this project assumes that you are *NOT* using the DFU
bootloader.
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing:
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console

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@ -1,886 +0,0 @@
README
======
This README discusses issues unique to NuttX configurations for the
STM32F103C8T6 Minimum System Development Board for ARM Microcontroller.
Contents
========
- STM32F103C8T6 Minimum System Development Boards:
- LEDs
- UARTs
- Timer Inputs/Outputs
- Using 128KiB of Flash instead of 64KiB
- Nintendo Wii Nunchuck
- Quadrature Encoder
- SDCard support
- SPI NOR Flash
- Nokia 5110 LCD Display support
- HYT271 sensor
- DS18B20 sensor
- USB Console support
- STM32F103 Minimum - specific Configuration Options
- Configurations
STM32F103C8T6 Minimum System Development Boards:
================================================
This STM32F103C8T6 minimum system development board is available from
several vendors on the net, and may be sold under different names or
no name at all. It is based on a STM32F103C8T6 and has a DIP-40 form-
factor.
There are four versions of very similar boards: Red, Blue, RoboDyn Black and
Black.
See: https://wiki.stm32duino.com/index.php?title=Blue_Pill
https://wiki.stm32duino.com/index.php?title=Red_Pill
https://wiki.stm32duino.com/index.php?title=RobotDyn_Black_Pill
https://wiki.stm32duino.com/index.php?title=Black_Pill
The Red Board:
Good things about the red board:
- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
programmatically drag down for automated USB reset.
- large power capacitors and LDO power.
- User LED on PC13
Problems with the red board:
- Silk screen is barely readable, the text is chopped off on some of
the pins
- USB connector only has two anchor points and it is directly soldered
on the surface
- Small reset button with hardly any resistance
The Blue Board:
Good things about the blue board:
- Four soldered anchor point on the USB connector. What you can't tell
from this picture is that there is a notch in the PCB board and the USB
connector sits down inside it some. This provides some lateral stability
that takes some of the stress off the solder points.
- It has nice clear readable silkscreen printing.
- It also a larger reset button.
- User LED on PC13
Problems with the blue board:
- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
resistor, you will need to replace it with a 1.5k one to use the native
USB.
- Puny voltage regulator probably 100mA.
A schematic for the blue board is available here:
http://www.stm32duino.com/download/file.php?id=276
The Black Board:
- User LED is on PB12.
- Mounting holes.
Both Boards:
Nice features common to both:
- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
- USB 5V is broken out with easy access.
- Power LED
- You can probably use more flash (128k) than officially documented for
the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
and it seemed to work.
Problems with both boards:
- No preloaded bootloader (this isn't really a problem as the
entire 64k of flash is available for use)
- No user button
This is the board pinout based on its form-factor for the Blue board:
USB
___
-----/ _ \-----
|B12 GND|
|B13 GND|
|B14 3.3V|
|B15 RST|
|A8 B11|
|A9 B10|
|A10 B1|
|A11 B0|
|A12 A7|
|A15 A6|
|B3 A5|
|B4 A4|
|B5 A3|
|B6 A2|
|B7 A1|
|B8 A0|
|B9 C15|
|5V C14|
|GND C13|
|3.3V VB|
|_____________|
LEDs
====
The STM32F103 Minimum board has only one software controllable LED.
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
enabled.
If enabled the LED is simply turned on when the board boots
successfully, and is blinking on panic / assertion failed.
UARTs
=====
UART/USART PINS
---------------
USART1
RX PA10
TX PA9
USART2
CK PA4
CTS PA0
RTS PA1
RX PA3
TX PA2
USART3
CK PB12
CTS PB13
RTS PB14
RX PB11
TX PB10
Default USART/UART Configuration
--------------------------------
USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
Timer Inputs/Outputs
====================
TIM1
CH1 PA8
CH2 PA9*
CH3 PA10*
CH4 PA11*
TIM2
CH1 PA0*, PA15, PA5
CH2 PA1, PB3
CH3 PA2, PB10*
CH4 PA3, PB11
TIM3
CH1 PA6, PB4
CH2 PA7, PB5*
CH3 PB0
CH4 PB1*
TIM4
CH1 PB6*
CH2 PB7
CH3 PB8
CH4 PB9*
* Indicates pins that have other on-board functions and should be used only
with care (See board datasheet).
Using 128KiB of Flash instead of 64KiB
======================================
Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
instead of 64KiB as documented in the datasheet and reported by its internal
register.
In order to enable 128KiB you need modify the linker script to reflect this
new size. Open the boards/arm/stm32/stm32f103-minimum/scripts/ld.script and replace:
flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
with
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
Enable many NuttX features (ie. many filesystems and applications) to get a
large binary image with more than 64K.
We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
up to dated OpenOCD version (ie. openocd-0.9).
You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
with
flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
We will use OpenOCD with STLink-V2 programmer, but it will work with other
programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
Open a terminal and execute:
$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
Now in other terminal execute:
$ telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> reset halt
stm32f1x.cpu: target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
> flash write_image erase nuttx.bin 0x08000000
auto erase enabled
device id = 0x20036410
ignoring flash probed value, using configured bank size
flash size = 128kbytes
stm32f1x.cpu: target state: halted
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
> reset run
> exit
Now NuttX should start normally.
Nintendo Wii Nunchuck:
======================
There is a driver on NuttX to support Nintendo Wii Nunchuck Joystick. If you
want to use it please select these options:
- Enable the I2C1 at System Type -> STM32 Peripheral Support, it will enable:
CONFIG_STM32_I2C1=y
- Enable to Custom board/driver initialization at RTOS Features -> RTOS hooks
CONFIG_BOARD_LATE_INITIALIZE=y
- Enable the I2C Driver Support at Device Drivers, it will enable this symbol:
CONFIG_I2C=y
- Nintendo Wii Nunchuck Joystick at Device Drivers -> [*] Input Device Support
CONFIG_INPUT=y
CONFIG_INPUT_NUNCHUCK=y
- Enable the Nunchuck joystick example at Application Configuration -> Examples
CONFIG_EXAMPLES_NUNCHUCK=y
CONFIG_EXAMPLES_NUNCHUCK_DEVNAME="/dev/nunchuck0"
You need to connect GND and +3.3V pins from Nunchuck connector to GND and 3.3V
of stm32f103-minimum respectively (Nunchuck also can work connected to 5V, but
I don't recommend it). Connect I2C Clock from Nunchuck to SCK (PB6) and the
I2C Data to SDA (PB7).
Quadrature Encoder:
===================
The nsh configuration has been used to test the Quadrature Encoder
(QEncoder, QE) with the following modifications to the configuration
file:
- These setting enable support for the common QEncode upper half driver:
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
- This is a board setting that selected timer 4 for use with the
quadrature encode:
CONFIG_STM32F103MINIMUM_QETIMER=4
- These settings enable the STM32 Quadrature encoder on timer 4:
CONFIG_STM32_TIM4_CAP=y
CONFIG_STM32_TIM4_QE=y
CONFIG_STM32_TIM4_QECLKOUT=2800000
CONFIG_STM32_QENCODER_FILTER=y
CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
- These settings enable the test case at apps/examples/qencoder:
CONFIG_EXAMPLES_QENCODER=y
CONFIG_EXAMPLES_QENCODER_DELAY=100
CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
In this configuration, the QEncoder inputs will be on the TIM4 inputs of
PB6 and PB7.
SPI NOR Flash support:
======================
We can use an extern SPI NOR Flash with STM32F103-Minimum board. In this case
we tested the Winboard W25Q32FV (32Mbit = 4MiB).
You can connect the W25Q32FV module in the STM32F103 Minimum board this way:
connect PA5 (SPI1 CLK) to CLK; PA7 (SPI1 MOSI) to DI; PA6 (SPI MISO) to DO;
PA4 to /CS; Also connect 3.3V to VCC and GND to GND.
You can start with default "stm32f103-minimum/nsh" configuration option and
enable/disable these options using "make menuconfig" :
System Type --->
STM32 Peripheral Support --->
[*] SPI1
Board Selection --->
[*] MTD driver for external 4Mbyte W25Q32FV FLASH on SPI1
(0) Minor number for the FLASH /dev/smart entry
[*] Enable partition support on FLASH
(1024,1024,1024,1024) Flash partition size list
RTOS Features --->
Stack and heap information --->
(512) Idle thread stack size
(1024) Main thread stack size
(256) Minimum pthread stack size
(1024) Default pthread stack size
Device Drivers --->
-*- Memory Technology Device (MTD) Support --->
[*] Support MTD partitions
-*- SPI-based W25 FLASH
(0) W25 SPI Mode
(20000000) W25 SPI Frequency
File Systems --->
[ ] Disable pseudo-filesystem operations
-*- SMART file system
(0xff) FLASH erased state
(16) Maximum file name length
Memory Management --->
[*] Small memory model
Also change the boards/arm/stm32/stm32f103-minimum/scripts/ld.script file to use 128KB
of Flash instead 64KB (since this board has a hidden 64KB flash) :
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}
Then after compiling and flashing the file nuttx.bin you can format and mount
the flash this way:
nsh> mksmartfs /dev/smart0p0
nsh> mksmartfs /dev/smart0p1
nsh> mksmartfs /dev/smart0p2
nsh> mksmartfs /dev/smart0p3
nsh> mount -t smartfs /dev/smart0p0 /mnt
nsh> ls /mnt
/mnt:
nsh> echo "Testing" > /mnt/file.txt
nsh> ls /mnt
/mnt:
file.txt
nsh> cat /mnt/file.txt
Testing
nsh>
SDCard support:
===============
Only STM32F103xx High-density devices has SDIO controller. STM32F103C8T6 is a
Medium-density device, but we can use SDCard over SPI.
You can do that enabling these options:
CONFIG_FS_FAT=y
CONFIG_MMCSD=y
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_SPI=y
CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SPIMODE=0
CONFIG_STM32_SPI=y
CONFIG_STM32_SPI1=y
CONFIG_SPI=y
CONFIG_SPI_CALLBACK=y
CONFIG_SPI_EXCHANGE=y
And connect a SDCard/SPI board on SPI1. Connect the CS pin to PA4, SCK to
PA5, MOSI to PA7 and MISO to PA6. Note: some chinese boards use MOSO instead
of MISO.
Nokia 5110 LCD Display support:
===============================
You can connect a low cost Nokia 5110 LCD display in the STM32F103 Minimum
board this way: connect PA5 (SPI1 CLK) to CLK; PA7 (SPI1 MOSI) to DIN; PA4
to CE; PA3 to RST; PA2 to DC. Also connect 3.3V to VCC and GND to GND.
You can start with default "stm32f103-minimum/nsh" configuration option and
enable these options using "make menuconfig" :
System Type --->
STM32 Peripheral Support --->
[*] SPI1
Device Drivers --->
-*- SPI Driver Support --->
[*] SPI exchange
[*] SPI CMD/DATA
Device Drivers --->
LCD Driver Support --->
[*] Graphic LCD Driver Support --->
[*] Nokia 5110 LCD Display (Phillips PCD8544)
(1) Number of PCD8544 Devices
(84) PCD8544 X Resolution
(48) PCD8544 Y Resolution
Graphics Support --->
[*] NX Graphics
(1) Number of Color Planes
(0x0) Initial background color
Supported Pixel Depths --->
[ ] Disable 1 BPP
[*] Packed MS First
Font Selections --->
(7) Bits in Character Set
[*] Mono 5x8
Application Configuration --->
Examples --->
[*] NX graphics "Hello, World!" example
(1) Bits-Per-Pixel
After compiling and flashing the nuttx.bin inside the board, reset it.
You should see it:
NuttShell (NSH)
nsh> ?
help usage: help [-v] [<cmd>]
[ dd free mb source usleep
? echo help mh sleep xd
cat exec hexdump mw test
cd exit kill pwd true
cp false ls set unset
Builtin Apps:
nxhello
Now just run nxhello and you should see "Hello World" in the display:
nsh> nxhello
HYT271 sensor support:
======================
The existing sensor configuration allows connecting several sensors of type
hyt271 on i2c bus number 2. For full feature support, be able to change the
i2c address of the sensor, the following hardware setup is necessary.
---------- -----------
| |------ GND ------------------------ GND ----| |
| | | |
| | | |
| | | |
| |---- POWIN A00 ------. | |
| | | | |
| | 4.7k | |
| | | | |
| STM32 |--- POWOUT A01 ------.------.------ VDD ----| HYT271 |
| | | | | |
| | 2.2k | | |
| | | | | |
| |----- SDA2 B11 ------.---- | ----- SDA ----| |
| | | | |
| | 2.2k | |
| | | | |
| |----- SCL2 B10 -------------.------ SCL ----| |
| | | |
--------- -----------
DS18B20 sensor support:
======================
The existing sensor configuration allows connecting several sensors of type
ds18b20 on 1wire bus number 2. The following hardware setup is necessary.
--------- -----------
| |------ GND ----------.------------- GND ----| |
| | | |
| | | |
| | | |
| |------ VDD ----------.------------- VDD ----| |
| STM32 | | | DS18B20 |
| | 4.7k | |
| | | | |
| |----- TX2 A02 -------.------.------- DQ ----| |
| | | |
-------- -----------
USB Console support:
====================
The STM32F103C8 has a USB Device controller, then we can use NuttX support
to USB Device. We can the console over USB enabling these options:
System Type --->
STM32 Peripheral Support --->
[*] USB Device
It will enable: CONFIG_STM32_USB=y
Board Selection --->
-*- Enable boardctl() interface
[*] Enable USB device controls
It will enable: CONFIG_BOARDCTL_USBDEVCTRL=y
Device Drivers --->
-*- USB Device Driver Support --->
[*] USB Modem (CDC/ACM) support --->
It will enable: CONFIG_CDCACM=y and many default options.
Device Drivers --->
-*- USB Device Driver Support --->
[*] USB Modem (CDC/ACM) support --->
[*] CDC/ACM console device
It will enable: CONFIG_CDCACM_CONSOLE=y
Device Drivers --->
[*] Serial Driver Support --->
Serial console (No serial console) --->
(X) No serial console
It will enable: CONFIG_NO_SERIAL_CONSOLE=y
After flashing the firmware in the board, unplug and plug it in the computer
and it will create a /dev/ttyACM0 device in the Linux. Use minicom with this
device to get access to NuttX NSH console (press Enter three times to start)
MCP2515 External Module
=======================
You can use an external MCP2515 (tested with NiRen MCP2515_CAN module) to
get CAN Bus working on STM32F103C8 chip (remember the internal CAN cannot
work with USB at same time because they share the SRAM buffer).
You can connect the MCP2515 module in the STM32F103 Minimum board this way:
connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SI; PA6 (SPI MISO) to SO;
PA4 to CS; B0 to INT. Also connect 5V to VCC and GND to GND.
Note: Although MCP2515 can work with 2.7V-5.5V it is more stable when using
it on BluePill board on 5V.
Testing: you will need at least 2 boards each one with a MCP2515 module
connected to it. Connect CAN High from the first module to the CAN High of
the second module, and the CAN Low from the first module to the CAN Low of
the second module.
You need to modify the "CAN example" application on menuconfig and create
two firmware versions: the first firmware will be Read-only and the second
one Write-only. Flash the first firmware in the first board and the second
firmware in the second board. Now you can start the both boards, run the
"can" command in the Write-only board and then run the "can" command in the
Read-only board. You should see the data coming.
STM32F103 Minimum - specific Configuration Options
==================================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F103C8=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=stm32f103-minimum
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_STM32_MINIMUM=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=20480 (20Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_CRC
CONFIG_STM32_BKPSRAM
APB1
----
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_WWDG
CONFIG_STM32_IWDG
CONFIG_STM32_SPI2
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_PWR -- Required for RTC
APB2
----
CONFIG_STM32_TIM1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_SPI1
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation or ADC conversion.
Note that ADC require two definitions: Not only do you have
to assign the timer (n) for used by the ADC, but then you also have to
configure which ADC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default only SW-DP is enabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32F103 Minimum specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3)
for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
STM32F103 Minimum CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
STM32F103 Minimum SPI Configuration
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
Configurations
==============
Instantiating Configurations
----------------------------
Each STM32F103 Minimum configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh STM32F103 Minimum:<subdir>
Where <subdir> is one of the following:
Configuration Directories
-------------------------
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. This
configuration enables a console on UART1. Support for
builtin applications is enabled, but in the base configuration no
builtin applications are selected.
jlx12864g:
---------
This is a config example to use the JLX12864G-086 LCD module. To use this
LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4
to CS; PA3 to RST; PA2 to RS.
nrf24:
---------
This is a config example to test the nrf24 terminal example. You will need
two stm32f103-minimum board each one with a nRF24L01 module connected this
way: connect PB1 to nRF24 CE pin; PA4 to CSN; PA5 (SPI1 CLK) to SCK; PA7
(SPI1 MOSI) to MOSI; PA6 (SPI1 MISO) to MISO; PA0 to IRQ.
usbnsh:
-------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the ARM EABI toolchain
for Windows and builds under Cygwin (or probably MSYS). That
can easily be reconfigured, of course.
CONFIG_HOST_WINDOWS=y : Builds under Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
3. This configuration does have UART2 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on UART2 unless you enable
some debug output or enable the USB monitor.
4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (UART2 in this
configuration):
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
5. By default, this project assumes that you are *NOT* using the DFU
bootloader.
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing:
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console
veml6070:
--------
This is a config example to use the Vishay VEML6070 UV-A sensor. To use this
sensor you need to connect PB6 (I2C1 CLK) to SCL; PB7 (I2C1 SDA) to SDA of
sensor module. I used a GY-VEML6070 module to test this driver.