diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs index e00d08239e..32ff4f10ca 100644 --- a/arch/arm/src/stm32f7/Make.defs +++ b/arch/arm/src/stm32f7/Make.defs @@ -83,6 +83,10 @@ ifeq ($(CONFIG_ARCH_RAMVECTORS),y) CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c endif +ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y) +CMN_CSRCS += up_itm_syslog.c +endif + ifeq ($(CONFIG_BUILD_PROTECTED),y) CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c ifneq ($(CONFIG_DISABLE_SIGNALS),y) diff --git a/arch/arm/src/stm32f7/stm32_start.c b/arch/arm/src/stm32f7/stm32_start.c index d3ceac74e4..51bf248f69 100644 --- a/arch/arm/src/stm32f7/stm32_start.c +++ b/arch/arm/src/stm32f7/stm32_start.c @@ -374,6 +374,12 @@ void __start(void) up_enable_icache(); up_enable_dcache(); +#ifdef CONFIG_ARMV7M_ITMSYSLOG + /* Perform ARMv7-M ITM SYSLOG initialization */ + + itm_syslog_initialize(); +#endif + /* Perform early serial initialization */ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c index 742774b48c..c2826f224c 100644 --- a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c @@ -39,6 +39,7 @@ ****************************************************************************/ #include "stm32_pwr.h" +#include "stm32_dbgmcu.h" /**************************************************************************** * Pre-processor Definitions @@ -1007,6 +1008,18 @@ static void stm32_stdclockconfig(void) } #endif +#ifdef CONFIG_ARMV7M_ITMSYSLOG +static inline void rcc_itm_syslog(void) +{ + /* Enable SWO output */ + + modifyreg32(STM32_DBGMCU_CR, DBGMCU_CR_TRACEMODE_MASK, + DBGMCU_CR_ASYNCH | DBGMCU_CR_TRACEIOEN); +} +#else +# define rcc_itm_syslog() +#endif + /**************************************************************************** * Name: rcc_enableperiphals ****************************************************************************/ @@ -1018,6 +1031,7 @@ static inline void rcc_enableperipherals(void) rcc_enableahb3(); rcc_enableapb1(); rcc_enableapb2(); + rcc_itm_syslog(); } /****************************************************************************