Refresh submodules; upated STM22F3 Ethernet debug output
This commit is contained in:
Gregory Nutt
parent
32aa2e937e
commit
9276e4d23a
@ -2131,8 +2131,7 @@ static inline void stm32_interrupt_process(struct stm32_ethmac_s *priv)
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/* Handle error interrupt only if CONFIG_DEBUG_NET is eanbled */
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#ifdef CONFIG_DEBUG_NET
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/* Check if there are pending "anormal" interrupts */
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/* Check if there are pending "abnormal" interrupts */
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if ((dmasr & ETH_DMAINT_AIS) != 0)
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{
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@ -2543,15 +2542,15 @@ static int stm32_ifup(struct net_driver_s *dev)
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int ret;
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#ifdef CONFIG_NET_IPv4
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ndbg("Bringing up: %d.%d.%d.%d\n",
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dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
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(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
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nvdbg("Bringing up: %d.%d.%d.%d\n",
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dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
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(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
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#endif
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#ifdef CONFIG_NET_IPv6
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ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
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dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
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dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
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dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
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nvdbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
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dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
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dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
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dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
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#endif
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/* Configure the Ethernet interface for DMA operation. */
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@ -2596,7 +2595,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
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struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)dev->d_private;
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irqstate_t flags;
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ndbg("Taking the network down\n");
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nvdbg("Taking the network down\n");
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/* Disable the Ethernet interrupt */
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@ -3034,7 +3033,7 @@ static void stm32_rxdescinit(struct stm32_ethmac_s *priv,
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priv->rxcurr = NULL;
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priv->segments = 0;
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/* Initialize each TX descriptor */
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/* Initialize each RX descriptor */
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for (i = 0; i < CONFIG_STM32F7_ETH_NRXDESC; i++)
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{
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@ -3247,8 +3246,8 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
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}
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}
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ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
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phydevaddr, phyregaddr);
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nvdbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
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phydevaddr, phyregaddr);
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return -ETIMEDOUT;
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}
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@ -3306,8 +3305,8 @@ static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
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}
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}
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ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
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phydevaddr, phyregaddr, value);
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nvdbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
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phydevaddr, phyregaddr, value);
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return -ETIMEDOUT;
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}
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@ -3343,7 +3342,7 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
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ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_PHYID1, &phyval);
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if (ret < 0)
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{
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ndbg("Failed to read the PHY ID1: %d\n", ret);
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ndbg("ERROR: Failed to read the PHY ID1: %d\n", ret);
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return ret;
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}
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@ -3361,7 +3360,7 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
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ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, 16, &phyval);
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if (ret < 0)
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{
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ndbg("Failed to read the PHY Register 0x10: %d\n", ret);
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ndbg("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
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return ret;
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}
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@ -3418,7 +3417,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, MII_MCR_RESET);
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if (ret < 0)
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{
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ndbg("Failed to reset the PHY: %d\n", ret);
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ndbg("ERROR: Failed to reset the PHY: %d\n", ret);
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return ret;
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}
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up_mdelay(PHY_RESET_DELAY);
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@ -3429,7 +3428,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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ret = stm32_phy_boardinitialize(0);
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if (ret < 0)
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{
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ndbg("Failed to initialize the PHY: %d\n", ret);
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ndbg("ERROR: Failed to initialize the PHY: %d\n", ret);
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return ret;
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}
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#endif
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@ -3454,7 +3453,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_MSR, &phyval);
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if (ret < 0)
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{
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ndbg("Failed to read the PHY MSR: %d\n", ret);
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ndbg("ERROR: Failed to read the PHY MSR: %d\n", ret);
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return ret;
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}
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else if ((phyval & MII_MSR_LINKSTATUS) != 0)
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@ -3465,16 +3464,16 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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if (timeout >= PHY_RETRY_TIMEOUT)
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{
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ndbg("Timed out waiting for link status: %04x\n", phyval);
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ndbg("ERROR: Timed out waiting for link status: %04x\n", phyval);
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return -ETIMEDOUT;
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}
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/* Enable auto-gegotiation */
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/* Enable auto-negotiation */
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ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
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if (ret < 0)
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{
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ndbg("Failed to enable auto-negotiation: %d\n", ret);
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ndbg("ERROR: Failed to enable auto-negotiation: %d\n", ret);
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return ret;
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}
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@ -3485,7 +3484,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_MSR, &phyval);
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if (ret < 0)
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{
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ndbg("Failed to read the PHY MSR: %d\n", ret);
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ndbg("ERROR: Failed to read the PHY MSR: %d\n", ret);
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return ret;
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}
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else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
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@ -3496,7 +3495,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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if (timeout >= PHY_RETRY_TIMEOUT)
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{
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ndbg("Timed out waiting for auto-negotiation\n");
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ndbg("ERROR: Timed out waiting for auto-negotiation\n");
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return -ETIMEDOUT;
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}
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@ -3505,7 +3504,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, CONFIG_STM32F7_PHYSR, &phyval);
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if (ret < 0)
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{
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ndbg("Failed to read PHY status register\n");
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ndbg("ERROR: Failed to read PHY status register\n");
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return ret;
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}
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@ -3523,6 +3522,8 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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switch (phyval & CONFIG_STM32F7_PHYSR_ALTMODE)
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{
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default:
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ndbg("ERROR: Unrecognized PHY status setting\n");
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case CONFIG_STM32F7_PHYSR_10HD:
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priv->fduplex = 0;
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priv->mbps100 = 0;
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@ -3575,9 +3576,10 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, phyval);
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if (ret < 0)
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{
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ndbg("Failed to write the PHY MCR: %d\n", ret);
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ndbg("ERROR: Failed to write the PHY MCR: %d\n", ret);
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return ret;
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}
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up_mdelay(PHY_CONFIG_DELAY);
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/* Remember the selected speed and duplex modes */
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@ -3590,9 +3592,9 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
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#endif
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#endif
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ndbg("Duplex: %s Speed: %d MBps\n",
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priv->fduplex ? "FULL" : "HALF",
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priv->mbps100 ? 100 : 10);
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nvdbg("Duplex: %s Speed: %d MBps\n",
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priv->fduplex ? "FULL" : "HALF",
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priv->mbps100 ? 100 : 10);
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return OK;
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}
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2
configs
2
configs
@ -1 +1 @@
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Subproject commit 789d48043629e77cc10b0531db7c8dbb9d069317
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Subproject commit 904bbaa3eaf109d15ab1cdbdb09fb59d1b5fc028
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