From 9278c5d5ee7cc0d9799c687bddd5cda1838b0f29 Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 16 May 2011 15:09:39 +0000 Subject: [PATCH] Add initial CC1101 wireless logic from Uros git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3617 42af7a65-404d-4744-a932-0658087f49c3 --- configs/vsn/src/sif.c | 48 ++++++++++++++++++++++++++++++++++++++++++- configs/vsn/src/spi.c | 22 ++++++++++++++++---- configs/vsn/src/vsn.h | 4 ++++ 3 files changed, 69 insertions(+), 5 deletions(-) diff --git a/configs/vsn/src/sif.c b/configs/vsn/src/sif.c index 5b86db77a4..acce5afc4f 100644 --- a/configs/vsn/src/sif.c +++ b/configs/vsn/src/sif.c @@ -79,6 +79,9 @@ #include #include +#include +#include + #include #include #include @@ -86,7 +89,7 @@ #include #include "vsn.h" - +#include "stm32_gpio.h" /**************************************************************************** @@ -182,6 +185,8 @@ struct vsn_sif_s { struct i2c_dev_s * i2c1; struct i2c_dev_s * i2c2; + struct spi_dev_s * spi2; + sem_t exclusive_access; }; @@ -329,6 +334,8 @@ int sif_anout_init(void) vsn_sif.i2c1 = up_i2cinitialize(1); vsn_sif.i2c2 = up_i2cinitialize(2); + + vsn_sif.spi2 = up_spiinitialize(2); return OK; } @@ -489,6 +496,8 @@ int sif_init(void) * Provides direct access to the sensor connector, readings, and diagnostic. **/ +extern void cc1101_eventcb(void); + int sif_main(int argc, char *argv[]) { if (argc >= 2) { @@ -583,6 +592,43 @@ int sif_main(int argc, char *argv[]) return 0; } + else if (!strcmp(argv[1], "cc")) { + struct cc1101_dev_s * cc; + uint8_t buf[64]; + int sta; + + cc = cc1101_init(vsn_sif.spi2, CC1101_PIN_GDO0, GPIO_CC1101_GDO0, + &cc1101_rfsettings_ISM1_868MHzGFSK100kbps); + + if (cc) { + + /* Work-around: enable falling edge, event and interrupt */ + stm32_gpiosetevent(GPIO_CC1101_GDO0, false, true, true, cc1101_eventcb); + + /* Enable clock to ARM PLL, allowing to speed-up to 72 MHz */ + cc1101_setgdo(cc, CC1101_PIN_GDO2, CC1101_GDO_CLK_XOSC3); + + cc1101_setchannel(cc, 0); /* AV Test Hex, receive on that channel */ + cc1101_receive(cc); /* Enter RX mode */ + while(1) + { + fflush(stdout); + sta = cc1101_read(cc, buf, 64); + if (sta > 0) { + printf("Received %d bytes: rssi=%d [dBm], LQI=%d (CRC %s)\n", + sta, cc1101_calcRSSIdBm(buf[sta-2]), buf[sta-1]&0x7F, + (buf[sta-1]&0x80)?"OK":"BAD"); + + cc1101_write(cc, buf, 61); + cc1101_send(cc); + + printf("Packet send back\n"); + + cc1101_receive(cc); + } + } + } + } } fprintf(stderr, "%s:\tinit\n\tgpio\tA B\n\tpwr\tval\n", argv[0]); diff --git a/configs/vsn/src/spi.c b/configs/vsn/src/spi.c index a452197b71..f3be9f5bf6 100644 --- a/configs/vsn/src/spi.c +++ b/configs/vsn/src/spi.c @@ -58,6 +58,7 @@ #include "chip.h" #include "stm32_gpio.h" #include "stm32_internal.h" +#include "stm32_waste.h" #include "vsn.h" @@ -98,11 +99,13 @@ void weak_function stm32_spiinitialize(void) * Configurations of SPI pins is performed in stm32_spi.c. * Here, we only initialize chip select pins unique to the board architecture. */ + +#ifdef CONFIG_STM32_SPI2 + stm32_configgpio(GPIO_CC1101_CS); +#endif #ifdef CONFIG_STM32_SPI3 - - // Configure the SPI-based FRAM CS GPIO - stm32_configgpio(GPIO_FRAM_CS); + stm32_configgpio(GPIO_FRAM_CS); #endif } @@ -147,7 +150,18 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { - spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + if (devid == SPIDEV_WIRELESS) { + + stm32_gpiowrite(GPIO_CC1101_CS, !selected); + + /* Wait for MISO to go low, indicates that Quart has stabilized */ + if (selected) { + while( stm32_gpioread(GPIO_SPI2_MISO) ) up_waste(); + } + + } } uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) diff --git a/configs/vsn/src/vsn.h b/configs/vsn/src/vsn.h index c9058663ee..6a41b6bc1b 100644 --- a/configs/vsn/src/vsn.h +++ b/configs/vsn/src/vsn.h @@ -153,6 +153,10 @@ /* Radio Connector */ +#define GPIO_CC1101_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12|GPIO_OUTPUT_SET) +#define GPIO_CC1101_GDO0 (GPIO_INPUT|GPIO_CNF_INFLOAT |GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9 ) +#define GPIO_CC1101_GDO2 (GPIO_INPUT|GPIO_CNF_INFLOAT |GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0 ) + /* Expansion Connector */