diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs old mode 100755 new mode 100644 index 1a96934720..47820afcc7 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -51,3 +51,6 @@ CHIP_CSRCS = stm32_start.c stm32_rcc.c stm32_gpio.c stm32_flash.c \ stm32_tim.c stm32_i2c.c stm32_pwr.c stm32_rtc.c \ stm32_idle.c stm32_waste.c +ifeq ($(CONFIG_STM32_RCCLOCK),y) +CHIP_CSRCS += stm32_rcclock.c +endif diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/chip/stm32_flash.h b/arch/arm/src/stm32/chip/stm32_flash.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_dma.c b/arch/arm/src/stm32/stm32_dma.c old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_flash.h b/arch/arm/src/stm32/stm32_flash.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_i2c.h b/arch/arm/src/stm32/stm32_i2c.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_idle.c b/arch/arm/src/stm32/stm32_idle.c old mode 100755 new mode 100644 index 3d999bcfff..0919265ff8 --- a/arch/arm/src/stm32/stm32_idle.c +++ b/arch/arm/src/stm32/stm32_idle.c @@ -42,6 +42,7 @@ #include #include "up_internal.h" +#include "stm32_rcc.h" /**************************************************************************** * Pre-processor Definitions @@ -94,6 +95,20 @@ void up_idle(void) sched_process_timer(); #else +#ifdef CONFIG_STM32_RCCLOCK + + /* Decide, which power saving level can be obtained */ + + if (stm32_getrccactivity()) + { + /* Sleep mode */ + } + else + { + /* Stop mode */ + } +#endif + /* Sleep until an interrupt occurs to save power */ BEGIN_IDLE(); diff --git a/arch/arm/src/stm32/stm32_internal.h b/arch/arm/src/stm32/stm32_internal.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c old mode 100755 new mode 100644 index a9155f1a26..e0db104ccf --- a/arch/arm/src/stm32/stm32_rcc.c +++ b/arch/arm/src/stm32/stm32_rcc.c @@ -63,18 +63,6 @@ * Private Data ****************************************************************************/ -/* Activity reference count, showing inactivity after start-up. - * Device drivers increment this count using rcclock() and rccunlock() - * - * If this value goes beyond the range [0, MAX_RCCs] indicates - * reference count leakage (asymetric number of locks vs. unlocks) and - * system enters permanent active state. - */ - -#ifdef CONFIG_STM32_RCCLOCK -static int stm32_rcclock_count = 0; -#endif - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -491,7 +479,7 @@ void stm32_clockconfig(void) /* Make sure that we are starting in the reset state */ rcc_reset(); - + #if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG) /* Invoke Board Custom Clock Configuration */ @@ -507,7 +495,7 @@ void stm32_clockconfig(void) #endif /* Enable peripheral clocking */ - + rcc_enableahb(); rcc_enableapb2(); rcc_enableapb1(); @@ -536,43 +524,3 @@ void stm32_rcc_enablelse(void) modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN); } - -#ifdef CONFIG_STM32_RCCLOCK -uint32_t stm32_rcclock(uint8_t domain_id) -{ - // THINK: - // maybe just shift domain_id into 32-bit or 64-bit register - // and if there value of this var != 0, we are active... - // increment some variable, so it is possible to test leakage - // multiple locks or multiple unlocks - - if (stm32_rcclock_count >= 0) - { - stm32_rcclock_count++; - if (stm32_rcclock_count > 64) - { - stm32_rcclock_count = -1; /* capture error */ - } - } - - return 0; -} - -uint32_t stm32_rccunlock(uint8_t domain_id) -{ - if (stm32_rcclock_count > -1) - { - stm32_rcclock_count--; - } - return 0; -} - -uint32_t stm32_setrccoptions(uint8_t domain_id, uint32_t options) -{ -} - -int stm32_getrccactivity(void) -{ - return stm32_rcclock_count; -} -#endif diff --git a/arch/arm/src/stm32/stm32_rcc.h b/arch/arm/src/stm32/stm32_rcc.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_rcclock.c b/arch/arm/src/stm32/stm32_rcclock.c new file mode 100644 index 0000000000..928e34b20d --- /dev/null +++ b/arch/arm/src/stm32/stm32_rcclock.c @@ -0,0 +1,111 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_rcc.c + * + * Copyright (C) 2011 Uros Platise. All rights reserved. + * Author: Author: Uros Platise + * + * This file is part of NuttX: + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +/**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Activity reference count, showing inactivity after start-up. + * Device drivers increment this count using rcclock() and rccunlock() + * + * If this value goes beyond the range [0, MAX_RCCs] indicates + * reference count leakage (asymetric number of locks vs. unlocks) and + * system enters permanent active state. + */ + +static int stm32_rcclock_count = 0; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +uint32_t stm32_rcclock(uint8_t domain_id) +{ + // THINK: + // maybe just shift domain_id into 32-bit or 64-bit register + // and if there value of this var != 0, we are active... + // increment some variable, so it is possible to test leakage + // multiple locks or multiple unlocks + + if (stm32_rcclock_count >= 0) + { + stm32_rcclock_count++; + if (stm32_rcclock_count > 64) + { + stm32_rcclock_count = -1; /* capture error */ + } + } + + return 0; +} + +uint32_t stm32_rccunlock(uint8_t domain_id) +{ + if (stm32_rcclock_count > -1) + { + stm32_rcclock_count--; + } + return 0; +} + +uint32_t stm32_setrccoptions(uint8_t domain_id, uint32_t options) +{ + return 0; +} + +int stm32_getrccactivity(void) +{ + return stm32_rcclock_count; +} diff --git a/arch/arm/src/stm32/stm32_sdio.h b/arch/arm/src/stm32/stm32_sdio.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_spi.h b/arch/arm/src/stm32/stm32_spi.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_waste.c b/arch/arm/src/stm32/stm32_waste.c old mode 100755 new mode 100644 diff --git a/arch/arm/src/stm32/stm32_waste.h b/arch/arm/src/stm32/stm32_waste.h old mode 100755 new mode 100644