arch/stm32f0l0g0: add SPI3 support (STM32G0B0 chips)
This commit is contained in:
raiden00pl
Xiang Xiao
parent
35fe1cd7d7
commit
93584f8668
@ -1090,6 +1090,10 @@ config STM32F0L0G0_HAVE_SPI2
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bool
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default n
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config STM32F0L0G0_HAVE_SPI3
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bool
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default n
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config STM32F0L0G0_HAVE_SAIPLL
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bool
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default n
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@ -1272,6 +1276,13 @@ config STM32F0L0G0_SPI2
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select SPI
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select STM32F0L0G0_SPI
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config STM32F0L0G0_SPI3
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bool "SPI3"
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default n
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depends on STM32F0L0G0_HAVE_SPI3
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select SPI
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select STM32F0L0G0_SPI
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config STM32F0L0G0_SYSCFG
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bool "SYSCFG"
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default y
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@ -2708,6 +2719,14 @@ config STM32F0L0G0_SPI2_DMA
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---help---
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Use DMA to improve SPI2 transfer performance. Cannot be used with STM32F0L0G0_SPI_INTERRUPT.
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config STM32F0L0G0_SPI3_DMA
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bool "SPI3 DMA"
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default n
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depends on STM32F0L0G0_SPI3 && !STM32F0L0G0_SPI_INTERRUPTS
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select STM32F0L0G0_SPI_DMA
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---help---
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Use DMA to improve SPI3 transfer performance. Cannot be used with STM32F0L0G0_SPI_INTERRUPT.
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config STM32F0L0G0_SPI1_COMMTYPE
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int "SPI1 Operation mode"
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default 0
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@ -2724,6 +2743,14 @@ config STM32F0L0G0_SPI2_COMMTYPE
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---help---
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Select full-duplex (0), simplex tx (1), simplex rx (2) or half-duplex (3)
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config STM32F0L0G0_SPI3_COMMTYPE
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int "SPI3 Operation mode"
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default 0
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range 0 3
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depends on STM32F0L0G0_SPI3
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---help---
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Select full-duplex (0), simplex tx (1), simplex rx (2) or half-duplex (3)
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endmenu # SPI Configuration
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menu "I2C Configuration"
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@ -134,6 +134,7 @@
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#elif defined(CONFIG_STM32F0L0G0_STM32G0)
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# define SPI1_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
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# define SPI2_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
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# define SPI3_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
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#else
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# error Unsupported family
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#endif
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@ -386,6 +387,60 @@ static struct stm32_spidev_s g_spi2dev =
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};
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#endif
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#ifdef CONFIG_STM32F0L0G0_SPI3
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static const struct spi_ops_s g_spi3ops =
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{
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.lock = spi_lock,
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.select = stm32_spi3select,
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.setfrequency = spi_setfrequency,
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.setmode = spi_setmode,
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.setbits = spi_setbits,
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#ifdef CONFIG_SPI_HWFEATURES
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.hwfeatures = spi_hwfeatures,
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#endif
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.status = stm32_spi3status,
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#ifdef CONFIG_SPI_CMDDATA
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.cmddata = stm32_spi3cmddata,
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#endif
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.send = spi_send,
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#ifdef CONFIG_SPI_EXCHANGE
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.exchange = spi_exchange,
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#else
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.sndblock = spi_sndblock,
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.recvblock = spi_recvblock,
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#endif
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#ifdef CONFIG_SPI_TRIGGER
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.trigger = spi_trigger,
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#endif
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#ifdef CONFIG_SPI_CALLBACK
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.registercallback = stm32_spi3register, /* provided externally */
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#else
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.registercallback = 0, /* not implemented */
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#endif
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};
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static struct stm32_spidev_s g_spi3dev =
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{
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.spidev =
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{
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&g_spi3ops
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},
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.spibase = STM32_SPI3_BASE,
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.spiclock = SPI1_PCLK_FREQUENCY,
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#ifdef CONFIG_STM32F0L0G0_SPI_INTERRUPTS
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.spiirq = STM32_IRQ_SPI3,
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#endif
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#ifdef CONFIG_STM32F0L0G0_SPI3_DMA
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.rxch = DMACHAN_SPI3_RX,
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.txch = DMACHAN_SPI3_TX,
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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#endif
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.config = CONFIG_STM32F0L0G0_SPI3_COMMTYPE,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -2028,6 +2083,30 @@ struct spi_dev_s *stm32_spibus_initialize(int bus)
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}
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}
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else
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#endif
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#ifdef CONFIG_STM32F0L0G0_SPI3
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if (bus == 3)
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{
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/* Select SPI3 */
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priv = &g_spi3dev;
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/* Only configure if the bus is not already configured */
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if (!priv->initialized)
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{
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/* Configure SPI3 pins: SCK, MISO, and MOSI */
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stm32_configgpio(GPIO_SPI3_SCK);
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stm32_configgpio(GPIO_SPI3_MOSI);
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if (priv->config == FULL_DUPLEX || priv->config == SIMPLEX_RX)
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{
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stm32_configgpio(GPIO_SPI3_MISO);
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}
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}
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}
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else
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#endif
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{
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spierr("ERROR: Unsupported SPI bus: %d\n", bus);
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@ -116,6 +116,13 @@ uint8_t stm32_spi2status(struct spi_dev_s *dev, uint32_t devid);
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int stm32_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
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#endif
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#ifdef CONFIG_STM32F0L0G0_SPI3
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void stm32_spi3select(struct spi_dev_s *dev, uint32_t devid,
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bool selected);
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uint8_t stm32_spi3status(struct spi_dev_s *dev, uint32_t devid);
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int stm32_spi3cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
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#endif
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/****************************************************************************
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* Name: stm32_spi1/2/...register
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*
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@ -146,6 +153,11 @@ int stm32_spi1register(struct spi_dev_s *dev, spi_mediachange_t callback,
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int stm32_spi2register(struct spi_dev_s *dev, spi_mediachange_t callback,
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void *arg);
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#endif
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#ifdef CONFIG_STM32F0L0G0_SPI3
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int stm32_spi3register(struct spi_dev_s *dev, spi_mediachange_t callback,
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void *arg);
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#endif
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#endif
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#undef EXTERN
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