arch/arm/src/am335x/chip/am335x_uart.h: Cosmetic changes for am335x_uart.h
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@ -248,19 +248,19 @@
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/* UART Receive Buffer Register */
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#define UART_RBR_MASK 0x000000ff
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#define UART_RBR_MASK (0x000000ff)
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/* UART Transmit Holding Register */
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#define UART_THR_MASK 0x000000ff
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#define UART_THR_MASK (0x000000ff)
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/* UART Divisor Latch Low Register */
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#define UART_DLL_MASK 0x000000ff
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#define UART_DLL_MASK (0x000000ff)
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/* UART Divisor Latch High Register */
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#define UART_DLH_MASK 0x0000003f
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#define UART_DLH_MASK (0x0000003f)
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/* UART Interrupt Enable Register */
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@ -270,7 +270,7 @@
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#define UART_IER_MODEM_STS (1 << 3) /* Bit 3: Enable Modem Status Interrupt */
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#define UART_IER_RTS (1 << 6) /* Bit 6: Enable RTS (active-low) interrupt */
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#define UART_IER_CTS (1 << 7) /* Bit 7: Enable CTS (active-low) interrupt */
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#define UART_IER_ALLIE 0x000000cf
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#define UART_IER_ALLIE (0x000000cf)
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/* UART Interrupt Identification Register */
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@ -326,9 +326,9 @@
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# define UART_LCR_PARITY_EVEN (3 << UART_LCR_PARITY_SHIFT) /* Even Parity Bit */
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#define UART_LCR_BC (1 << 6) /* Bit 6: Break Control Bit */
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#define UART_LCR_DLAB (1 << 7) /* Bit 7: Divisor Latch Access Enable Bit */
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#define UART_LCR_CONFIG_MODE_A 0x00000080
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#define UART_LCR_CONFIG_MODE_B 0x000000bf
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#define UART_LCR_OPER_MODE 0x0000007f
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#define UART_LCR_CONFIG_MODE_A (0x00000080)
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#define UART_LCR_CONFIG_MODE_B (0x000000bf)
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#define UART_LCR_OPER_MODE (0x0000007f)
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/* UART Modem Control Register */
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@ -360,7 +360,7 @@
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/* UART Scratchpad Register */
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#define UART_SPR_MASK 0x000000ff
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#define UART_SPR_MASK (0x000000ff)
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/* UART Transmit FIFO Level */
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@ -402,3 +402,4 @@
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#define UART_EFR_AUTOCTSEN (1 << 7) /* Bit 7: Enable Auto-CTS */
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#endif /* __ARCH_ARM_SRC_AM335X_CHIP_AM335X_UART_H */
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