arch/nrf53: add PWM support
This commit is contained in:
raiden00pl
Petro Karashchenko
parent
c2abd16dd7
commit
93ac27ff63
@ -280,6 +280,7 @@ config ARCH_CHIP_NRF52
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config ARCH_CHIP_NRF53
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bool "Nordic NRF53"
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select ARCH_CORTEXM33
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select ARCH_HAVE_PWM_MULTICHAN
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depends on EXPERIMENTAL
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---help---
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Nordic NRF53 architectures (ARM dual Cortex-M33).
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@ -21,6 +21,8 @@ config NRF53_APPCORE
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bool
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default n
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select ARM_HAVE_DSP
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select ARCH_HAVE_FPU
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select NRF53_HAVE_PWM
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config NRF53_NETCORE
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bool
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@ -66,6 +68,12 @@ config NRF53_ENABLE_APPROTECT
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bool "NRF53 enable APPROTECT"
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default n
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# Peripheral support
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config NRF53_HAVE_PWM
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bool
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default n
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# Peripheral Selection
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config NRF53_IPC
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@ -80,6 +88,10 @@ config NRF53_TIMER
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bool
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default n
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config NRF53_PWM
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bool
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default n
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menu "NRF53 Peripheral Selection"
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config NRF53_UART0
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@ -108,6 +120,20 @@ config NRF53_TIMER1
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config NRF53_TIMER2
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bool "TIMER2"
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select NRF53_TIMER
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config NRF53_PWM0
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bool "PWM0"
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select NRF53_PWM
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default n
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config NRF53_PWM1
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bool "PWM1"
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select NRF53_PWM
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default n
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config NRF53_PWM2
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bool "PWM2"
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select NRF53_PWM
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default n
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endmenu # NRF53 Peripheral Selection
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@ -188,6 +214,124 @@ endchoice
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endmenu # System Timer
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menu "PWM configuration"
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config NRF53_PWM_MULTICHAN
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bool "PWM Multiple Output Channels"
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default n
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if NRF53_PWM_MULTICHAN
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if NRF53_PWM0
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config NRF53_PWM0_CH0
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bool "PWM0 Channel 0 Output"
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default n
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---help---
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Enables channel 0 output.
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config NRF53_PWM0_CH1
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bool "PWM0 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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config NRF53_PWM0_CH2
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bool "PWM0 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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config NRF53_PWM0_CH3
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bool "PWM0 Channel 3 Output"
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default n
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---help---
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Enables channel 3 output.
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endif # NRF53_PWM0
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if NRF53_PWM1
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config NRF53_PWM1_CH0
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bool "PWM1 Channel 0 Output"
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default n
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---help---
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Enables channel 0 output.
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config NRF53_PWM1_CH1
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bool "PWM1 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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config NRF53_PWM1_CH2
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bool "PWM1 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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config NRF53_PWM1_CH3
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bool "PWM1 Channel 3 Output"
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default n
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---help---
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Enables channel 3 output.
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endif # NRF53_PWM1
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if NRF53_PWM2
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config NRF53_PWM2_CH0
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bool "PWM2 Channel 0 Output"
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default n
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---help---
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Enables channel 0 output.
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config NRF53_PWM2_CH1
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bool "PWM2 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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config NRF53_PWM2_CH2
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bool "PWM2 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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config NRF53_PWM2_CH3
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bool "PWM2 Channel 3 Output"
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default n
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---help---
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Enables channel 3 output.
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endif # NRF53_PWM2
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endif # !NRF53_PWM_MULTICHAN
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if !NRF53_PWM_MULTICHAN
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config NRF53_PWM0_CHANNEL
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int "PWM0 Output Channel"
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depends on NRF53_PWM0
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default 0
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range 0 3
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config NRF53_PWM1_CHANNEL
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int "PWM1 Output Channel"
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depends on NRF53_PWM1
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default 0
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range 0 3
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config NRF53_PWM2_CHANNEL
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int "PWM2 Output Channel"
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depends on NRF53_PWM2
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default 0
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range 0 3
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endif # !NRF53_PWM_MULTICHAN
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endmenu # PWM configuration
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menuconfig NRF53_SOFTDEVICE_CONTROLLER
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bool "SoftDevice Controller"
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depends on ALLOW_BSDNORDIC_COMPONENTS
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@ -58,6 +58,10 @@ CHIP_CSRCS += nrf53_tim_lowerhalf.c
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endif
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endif
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ifeq ($(CONFIG_NRF53_PWM),y)
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CHIP_CSRCS += nrf53_pwm.c
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endif
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ifeq ($(CONFIG_PM),y)
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CHIP_CSRCS += nrf53_pminitialize.c
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endif
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696
arch/arm/src/nrf53/nrf53_pwm.c
Normal file
696
arch/arm/src/nrf53/nrf53_pwm.c
Normal file
@ -0,0 +1,696 @@
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/****************************************************************************
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* arch/arm/src/nrf53/nrf53_pwm.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "nrf53_gpio.h"
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#include "nrf53_pwm.h"
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#include "hardware/nrf53_pwm.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Default PWM polarity */
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#define PWM_POLARITY_DEFAULT (PWM_DECODER_POL_FALLING)
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/* Sequence 0 length */
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#define PWM_SEQ0_LEN (4)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct nrf53_pwm_s
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{
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const struct pwm_ops_s *ops; /* PWM operations */
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uint32_t base; /* Base address of PWM register */
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uint32_t frequency; /* Current frequency setting */
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uint32_t cntrtop; /* Counter top */
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uint32_t ch0_pin; /* Channel 1 pin */
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uint32_t ch1_pin; /* Channel 2 pin */
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uint32_t ch2_pin; /* Channel 3 pin */
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uint32_t ch3_pin; /* Channel 4 pin */
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/* Sequence 0 */
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uint16_t seq0[PWM_SEQ0_LEN];
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* PWM Register access */
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static inline void nrf53_pwm_putreg(struct nrf53_pwm_s *priv,
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uint32_t offset,
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uint32_t value);
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static inline uint32_t nrf53_pwm_getreg(struct nrf53_pwm_s *priv,
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uint32_t offset);
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/* PWM helpers */
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static int nrf53_pwm_configure(struct nrf53_pwm_s *priv);
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static int nrf53_pwm_duty(struct nrf53_pwm_s *priv, uint8_t chan,
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ub16_t duty);
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static int nrf53_pwm_freq(struct nrf53_pwm_s *priv, uint32_t freq);
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/* PWM driver methods */
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static int nrf53_pwm_setup(struct pwm_lowerhalf_s *dev);
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static int nrf53_pwm_shutdown(struct pwm_lowerhalf_s *dev);
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#ifdef CONFIG_PWM_PULSECOUNT
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static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev,
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const struct pwm_info_s *info,
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void *handle);
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#else
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static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev,
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const struct pwm_info_s *info);
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#endif
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static int nrf53_pwm_stop(struct pwm_lowerhalf_s *dev);
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static int nrf53_pwm_ioctl(struct pwm_lowerhalf_s *dev,
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int cmd, unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* This is the list of lower half PWM driver methods used by the upper half
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* driver.
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*/
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static const struct pwm_ops_s g_nrf53_pwmops =
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{
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.setup = nrf53_pwm_setup,
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.shutdown = nrf53_pwm_shutdown,
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.start = nrf53_pwm_start,
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.stop = nrf53_pwm_stop,
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.ioctl = nrf53_pwm_ioctl,
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};
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#ifdef CONFIG_NRF53_PWM0
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/* PWM 0 */
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struct nrf53_pwm_s g_nrf53_pwm0 =
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{
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.ops = &g_nrf53_pwmops,
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.base = NRF53_PWM0_BASE,
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#ifdef CONFIG_NRF53_PWM0_CH0
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.ch0_pin = NRF53_PWM0_CH0_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM0_CH1
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.ch1_pin = NRF53_PWM0_CH1_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM0_CH2
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.ch2_pin = NRF53_PWM0_CH2_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM0_CH3
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.ch3_pin = NRF53_PWM0_CH3_PIN,
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#endif
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};
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#endif
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#ifdef CONFIG_NRF53_PWM1
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/* PWM 1 */
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struct nrf53_pwm_s g_nrf53_pwm1 =
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{
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.ops = &g_nrf53_pwmops,
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.base = NRF53_PWM1_BASE,
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#ifdef CONFIG_NRF53_PWM1_CH0
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.ch0_pin = NRF53_PWM1_CH0_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM1_CH1
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.ch1_pin = NRF53_PWM1_CH1_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM1_CH2
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.ch2_pin = NRF53_PWM1_CH2_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM1_CH3
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.ch3_pin = NRF53_PWM1_CH3_PIN,
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#endif
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};
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#endif
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#ifdef CONFIG_NRF53_PWM2
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/* PWM 2 */
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struct nrf53_pwm_s g_nrf53_pwm2 =
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{
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.ops = &g_nrf53_pwmops,
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.base = NRF53_PWM2_BASE,
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#ifdef CONFIG_NRF53_PWM2_CH0
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.ch0_pin = NRF53_PWM2_CH0_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM2_CH1
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.ch1_pin = NRF53_PWM2_CH1_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM2_CH2
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.ch2_pin = NRF53_PWM2_CH2_PIN,
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#endif
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#ifdef CONFIG_NRF53_PWM2_CH3
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.ch3_pin = NRF53_PWM2_CH3_PIN,
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#endif
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: nrf53_pwm_putreg
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*
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* Description:
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* Put a 32-bit register value by offset
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*
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****************************************************************************/
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static inline void nrf53_pwm_putreg(struct nrf53_pwm_s *priv,
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uint32_t offset,
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uint32_t value)
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{
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putreg32(value, priv->base + offset);
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}
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/****************************************************************************
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* Name: nrf53_pwm_getreg
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*
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* Description:
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* Get a 32-bit register value by offset
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*
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****************************************************************************/
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static inline uint32_t nrf53_pwm_getreg(struct nrf53_pwm_s *priv,
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uint32_t offset)
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{
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return getreg32(priv->base + offset);
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}
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/****************************************************************************
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* Name: nrf53_pwm_configure
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*
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* Description:
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* Configure PWM
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*
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****************************************************************************/
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static int nrf53_pwm_configure(struct nrf53_pwm_s *priv)
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{
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uint32_t regval = 0;
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int ret = OK;
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DEBUGASSERT(priv);
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/* Configure PWM mode */
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nrf53_pwm_putreg(priv, NRF53_PWM_MODE_OFFSET, PWM_MODE_UP);
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/* Configure decoder */
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regval = PWM_DECODER_LOAD_INDIVIDUAL | PWM_DECODER_MODE_REFRESH;
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nrf53_pwm_putreg(priv, NRF53_PWM_DECODER_OFFSET, regval);
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/* Configure sequence 0 */
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regval = (uint32_t)priv->seq0;
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nrf53_pwm_putreg(priv, NRF53_PWM_SEQ0PTR_OFFSET, regval);
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regval = PWM_SEQ0_LEN;
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nrf53_pwm_putreg(priv, NRF53_PWM_SEQ0CNT_OFFSET, regval);
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regval = 0;
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nrf53_pwm_putreg(priv, NRF53_PWM_SEQ0REFRESH_OFFSET, regval);
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return ret;
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}
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/****************************************************************************
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* Name: nrf53_pwm_duty
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*
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* Description:
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* Configure PWM duty
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*
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****************************************************************************/
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static int nrf53_pwm_duty(struct nrf53_pwm_s *priv, uint8_t chan,
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ub16_t duty)
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{
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uint16_t compare = 0;
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DEBUGASSERT(priv);
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pwminfo("PWM channel: %d duty: %" PRId32 "\n", chan, duty);
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/* Get compare
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*
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* duty cycle = compare / reload (fractional value)
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*/
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compare = b16toi(duty * priv->cntrtop + b16HALF);
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/* Configure channel sequence */
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priv->seq0[chan] = PWM_POLARITY_DEFAULT | compare;
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pwminfo("seq0[%d]: %d %d\n", chan, compare, priv->seq0[chan]);
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return OK;
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}
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/****************************************************************************
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* Name: nrf53_pwm_freq
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*
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* Description:
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* Configure PWM frequency
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*
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****************************************************************************/
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static int nrf53_pwm_freq(struct nrf53_pwm_s *priv, uint32_t freq)
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{
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uint32_t regval = 0;
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uint32_t pwm_clk = 0;
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uint32_t top = 0;
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uint32_t prescaler = 0;
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uint64_t tmp = 0;
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int ret = OK;
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DEBUGASSERT(priv);
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/* Get best prescaler */
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tmp = PWM_COUNTERTOP_MASK * freq;
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if (tmp >= 16000000)
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{
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pwm_clk = 16000000;
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prescaler = PWM_PRESCALER_16MHZ;
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}
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else if (tmp >= 8000000)
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{
|
||||
pwm_clk = 8000000;
|
||||
prescaler = PWM_PRESCALER_8MHZ;
|
||||
}
|
||||
else if (tmp >= 4000000)
|
||||
{
|
||||
pwm_clk = 4000000;
|
||||
prescaler = PWM_PRESCALER_4MHZ;
|
||||
}
|
||||
else if (tmp >= 2000000)
|
||||
{
|
||||
pwm_clk = 2000000;
|
||||
prescaler = PWM_PRESCALER_2MHZ;
|
||||
}
|
||||
else if (tmp >= 1000000)
|
||||
{
|
||||
pwm_clk = 1000000;
|
||||
prescaler = PWM_PRESCALER_1MHZ;
|
||||
}
|
||||
else if (tmp >= 500000)
|
||||
{
|
||||
pwm_clk = 500000;
|
||||
prescaler = PWM_PRESCALER_500KHZ;
|
||||
}
|
||||
else if (tmp >= 250000)
|
||||
{
|
||||
pwm_clk = 250000;
|
||||
prescaler = PWM_PRESCALER_250KHZ;
|
||||
}
|
||||
else
|
||||
{
|
||||
pwm_clk = 125000;
|
||||
prescaler = PWM_PRESCALER_125KHZ;
|
||||
}
|
||||
|
||||
/* Configure prescaler */
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_PRESCALER_OFFSET, prescaler);
|
||||
|
||||
/* Get counter max */
|
||||
|
||||
top = pwm_clk / freq;
|
||||
if (top < 2)
|
||||
{
|
||||
top = 1;
|
||||
}
|
||||
else if (top > PWM_COUNTERTOP_MASK)
|
||||
{
|
||||
top = PWM_COUNTERTOP_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
top = top - 1;
|
||||
}
|
||||
|
||||
/* Configure counter max */
|
||||
|
||||
regval = top;
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_COUNTERTOP_OFFSET, regval);
|
||||
|
||||
priv->cntrtop = top;
|
||||
|
||||
pwminfo("PWM frequency: %" PRId32 " pwm_clk: %" PRId32
|
||||
" pwm_prescaler: %" PRId32 " top: %" PRId32 "\n",
|
||||
freq, pwm_clk, prescaler, top);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwm_setup
|
||||
*
|
||||
* Description:
|
||||
* This method is called when the driver is opened. The lower half driver
|
||||
* should configure and initialize the device so that it is ready for use.
|
||||
* It should not, however, output pulses until the start method is called.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int nrf53_pwm_setup(struct pwm_lowerhalf_s *dev)
|
||||
{
|
||||
struct nrf53_pwm_s *priv = (struct nrf53_pwm_s *)dev;
|
||||
int ret = OK;
|
||||
uint32_t regval = 0;
|
||||
uint32_t pin = 0;
|
||||
uint32_t port = 0;
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
|
||||
/* Configure channels */
|
||||
|
||||
if (priv->ch0_pin != 0)
|
||||
{
|
||||
nrf53_gpio_config(priv->ch0_pin);
|
||||
|
||||
pin = GPIO_PIN_DECODE(priv->ch0_pin);
|
||||
port = GPIO_PORT_DECODE(priv->ch0_pin);
|
||||
|
||||
regval = (port << PWM_PSEL_PORT_SHIFT);
|
||||
regval |= (pin << PWM_PSEL_PIN_SHIFT);
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_PSEL0_OFFSET, regval);
|
||||
}
|
||||
|
||||
if (priv->ch1_pin != 0)
|
||||
{
|
||||
nrf53_gpio_config(priv->ch1_pin);
|
||||
|
||||
pin = GPIO_PIN_DECODE(priv->ch1_pin);
|
||||
port = GPIO_PORT_DECODE(priv->ch1_pin);
|
||||
|
||||
regval = (port << PWM_PSEL_PORT_SHIFT);
|
||||
regval |= (pin << PWM_PSEL_PIN_SHIFT);
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_PSEL1_OFFSET, regval);
|
||||
}
|
||||
|
||||
if (priv->ch2_pin != 0)
|
||||
{
|
||||
nrf53_gpio_config(priv->ch2_pin);
|
||||
|
||||
pin = GPIO_PIN_DECODE(priv->ch2_pin);
|
||||
port = GPIO_PORT_DECODE(priv->ch2_pin);
|
||||
|
||||
regval = (port << PWM_PSEL_PORT_SHIFT);
|
||||
regval |= (pin << PWM_PSEL_PIN_SHIFT);
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_PSEL2_OFFSET, regval);
|
||||
}
|
||||
|
||||
if (priv->ch3_pin != 0)
|
||||
{
|
||||
nrf53_gpio_config(priv->ch3_pin);
|
||||
|
||||
pin = GPIO_PIN_DECODE(priv->ch3_pin);
|
||||
port = GPIO_PORT_DECODE(priv->ch3_pin);
|
||||
|
||||
regval = (port << PWM_PSEL_PORT_SHIFT);
|
||||
regval |= (pin << PWM_PSEL_PIN_SHIFT);
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_PSEL3_OFFSET, regval);
|
||||
}
|
||||
|
||||
/* Configure PWM */
|
||||
|
||||
ret = nrf53_pwm_configure(priv);
|
||||
if (ret < 0)
|
||||
{
|
||||
pwmerr("ERROR: nrf53_pwm_configure failed %d\n", ret);
|
||||
goto errout;
|
||||
}
|
||||
|
||||
/* Enable PWM */
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_ENABLE_OFFSET, 1);
|
||||
|
||||
errout:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwm_shutdown
|
||||
*
|
||||
* Description:
|
||||
* This method is called when the driver is closed. The lower half driver
|
||||
* stop pulsed output, free any resources, disable the timer hardware, and
|
||||
* put the system into the lowest possible power usage state
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int nrf53_pwm_shutdown(struct pwm_lowerhalf_s *dev)
|
||||
{
|
||||
struct nrf53_pwm_s *priv = (struct nrf53_pwm_s *)dev;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
|
||||
/* Disable PWM */
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_ENABLE_OFFSET, 0);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwm_start
|
||||
*
|
||||
* Description:
|
||||
* (Re-)initialize the PWM and start the pulsed output
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev,
|
||||
const struct pwm_info_s *info,
|
||||
void *handle)
|
||||
{
|
||||
#error Not supported
|
||||
}
|
||||
#else
|
||||
static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev,
|
||||
const struct pwm_info_s *info)
|
||||
{
|
||||
struct nrf53_pwm_s *priv = (struct nrf53_pwm_s *)dev;
|
||||
int ret = OK;
|
||||
#ifdef CONFIG_PWM_MULTICHAN
|
||||
int i = 0;
|
||||
#endif
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
|
||||
/* If frequency has not changed we just update duty */
|
||||
|
||||
if (info->frequency != priv->frequency)
|
||||
{
|
||||
/* Update frequency */
|
||||
|
||||
ret = nrf53_pwm_freq(priv, info->frequency);
|
||||
|
||||
if (ret == OK)
|
||||
{
|
||||
priv->frequency = info->frequency;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PWM_MULTICHAN
|
||||
for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++)
|
||||
{
|
||||
/* Break the loop if all following channels are not configured */
|
||||
|
||||
if (info->channels[i].channel == -1)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
/* Set output if channel configured */
|
||||
|
||||
if (info->channels[i].channel != 0)
|
||||
{
|
||||
ret = nrf53_pwm_duty(priv,
|
||||
(info->channels[i].channel - 1),
|
||||
info->channels[i].duty);
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
ret = nrf53_pwm_duty(dev,
|
||||
(info->channels[0].channel - 1),
|
||||
info->duty);
|
||||
#endif /* CONFIG_PWM_MULTICHAN */
|
||||
|
||||
/* Start sequence 0 */
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_TASKS_SEQSTART0_OFFSET, 1);
|
||||
|
||||
/* Wait for sequence started */
|
||||
|
||||
while (nrf53_pwm_getreg(priv, NRF53_PWM_EVENTS_SEQSTARTED0_OFFSET) != 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwm_stop
|
||||
*
|
||||
* Description:
|
||||
* Stop the PWM
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int nrf53_pwm_stop(struct pwm_lowerhalf_s *dev)
|
||||
{
|
||||
struct nrf53_pwm_s *priv = (struct nrf53_pwm_s *)dev;
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
|
||||
/* Stop PWM */
|
||||
|
||||
nrf53_pwm_putreg(priv, NRF53_PWM_TASKS_STOP_OFFSET, 1);
|
||||
|
||||
/* Wait for PWM stopped */
|
||||
|
||||
while (nrf53_pwm_getreg(priv, NRF53_PWM_EVENTS_STOPPED_OFFSET) != 1);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwm_ioctl
|
||||
*
|
||||
* Description:
|
||||
* Lower-half logic may support platform-specific ioctl commands
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int nrf53_pwm_ioctl(struct pwm_lowerhalf_s *dev,
|
||||
int cmd, unsigned long arg)
|
||||
{
|
||||
struct nrf53_pwm_s *priv = (struct nrf53_pwm_s *)dev;
|
||||
|
||||
DEBUGASSERT(dev);
|
||||
|
||||
/* There are no platform-specific ioctl commands */
|
||||
|
||||
UNUSED(priv);
|
||||
|
||||
return -ENOTTY;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize one timer for use with the upper_level PWM driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* pwm - A number identifying the pwm instance.
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, a pointer to the NRF53 lower half PWM driver is returned.
|
||||
* NULL is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct pwm_lowerhalf_s *nrf53_pwminitialize(int pwm)
|
||||
{
|
||||
struct nrf53_pwm_s *lower = NULL;
|
||||
|
||||
pwminfo("Initialize PWM%u\n", pwm);
|
||||
|
||||
switch (pwm)
|
||||
{
|
||||
#ifdef CONFIG_NRF53_PWM0
|
||||
case 0:
|
||||
{
|
||||
lower = &g_nrf53_pwm0;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NRF53_PWM1
|
||||
case 1:
|
||||
{
|
||||
lower = &g_nrf53_pwm1;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NRF53_PWM2
|
||||
case 2:
|
||||
{
|
||||
lower = &g_nrf53_pwm2;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
default:
|
||||
{
|
||||
pwmerr("ERROR: No such PWM device %d\n", pwm);
|
||||
lower = NULL;
|
||||
goto errout;
|
||||
}
|
||||
}
|
||||
|
||||
errout:
|
||||
return (struct pwm_lowerhalf_s *)lower;
|
||||
}
|
||||
115
arch/arm/src/nrf53/nrf53_pwm.h
Normal file
115
arch/arm/src/nrf53/nrf53_pwm.h
Normal file
@ -0,0 +1,115 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/nrf53/nrf53_pwm.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_NRF53_NRF53_PWM_H
|
||||
#define __ARCH_ARM_SRC_NRF53_NRF53_PWM_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/timers/pwm.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* Enable the specified PWM channel if multichannel PWM is disabled */
|
||||
|
||||
#ifndef CONFIG_NRF53_PWM_MULTICHAN
|
||||
|
||||
# ifdef CONFIG_NRF53_PWM0
|
||||
# if !defined(CONFIG_NRF53_PWM0_CHANNEL)
|
||||
# error "CONFIG_NRF53_PWM0_CHANNEL must be provided"
|
||||
# elif CONFIG_NRF53_PWM0_CHANNEL == 0
|
||||
# define CONFIG_NRF53_PWM0_CH0 1
|
||||
# elif CONFIG_NRF53_PWM0_CHANNEL == 1
|
||||
# define CONFIG_NRF53_PWM0_CH1 1
|
||||
# elif CONFIG_NRF53_PWM0_CHANNEL == 2
|
||||
# define CONFIG_NRF53_PWM0_CH2 1
|
||||
# elif CONFIG_NRF53_PWM0_CHANNEL == 3
|
||||
# define CONFIG_NRF53_PWM0_CH3 1
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_NRF53_PWM0_CHANNEL"
|
||||
# endif
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_NRF53_PWM1
|
||||
# if !defined(CONFIG_NRF53_PWM1_CHANNEL)
|
||||
# error "CONFIG_NRF53_PWM1_CHANNEL must be provided"
|
||||
# elif CONFIG_NRF53_PWM1_CHANNEL == 0
|
||||
# define CONFIG_NRF53_PWM1_CH0 1
|
||||
# elif CONFIG_NRF53_PWM1_CHANNEL == 1
|
||||
# define CONFIG_NRF53_PWM1_CH1 1
|
||||
# elif CONFIG_NRF53_PWM1_CHANNEL == 2
|
||||
# define CONFIG_NRF53_PWM1_CH2 1
|
||||
# elif CONFIG_NRF53_PWM1_CHANNEL == 3
|
||||
# define CONFIG_NRF53_PWM1_CH3 1
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_NRF53_PWM1_CHANNEL"
|
||||
# endif
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_NRF53_PWM2
|
||||
# if !defined(CONFIG_NRF53_PWM2_CHANNEL)
|
||||
# error "CONFIG_NRF53_PWM2_CHANNEL must be provided"
|
||||
# elif CONFIG_NRF53_PWM2_CHANNEL == 0
|
||||
# define CONFIG_NRF53_PWM2_CH0 1
|
||||
# elif CONFIG_NRF53_PWM2_CHANNEL == 1
|
||||
# define CONFIG_NRF53_PWM2_CH1 1
|
||||
# elif CONFIG_NRF53_PWM2_CHANNEL == 2
|
||||
# define CONFIG_NRF53_PWM2_CH2 1
|
||||
# elif CONFIG_NRF53_PWM2_CHANNEL == 3
|
||||
# define CONFIG_NRF53_PWM2_CH3 1
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_NRF53_PWM2_CHANNEL"
|
||||
# endif
|
||||
# endif
|
||||
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nrf53_pwminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize one timer for use with the upper_level PWM driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* pwm - A number identifying the pwm instance.
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, a pointer to the NRF53 lower half PWM driver is returned.
|
||||
* NULL is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct pwm_lowerhalf_s *nrf53_pwminitialize(int pwm);
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_NRF53_NRF53_PWM_H */
|
||||
Loading…
Reference in New Issue
Block a user