Move SAM4L peripheral clock logic to a separate file
This commit is contained in:
Gregory Nutt
parent
30f5d90430
commit
93b67f1598
@ -4908,3 +4908,6 @@
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Power Management. Leveraged from AVR32 (2013-6-5).
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* arch/arm/src/sam34/sarm4l_clockconfig.c: SAM4L clock configuration
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logic (leveraged from AVR32).
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* nuttx/arch/arm/src/sam34/sam4l_periphclks.c/h: Add common
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logic to enabled/disable SAM4L peripheral clocking (2013-6-5).
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@ -83,7 +83,7 @@ CHIP_CSRCS += sam_serial.c sam_start.c sam_timerisr.c
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# Configuration-dependent SAM3/4 files
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ifeq ($(CONFIG_ARCH_CHIP_SAM4L),y)
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CHIP_CSRCS += sam4l_clockconfig.c sam4l_gpio.c
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CHIP_CSRCS += sam4l_clockconfig.c sam4l_periphclks.c sam4l_gpio.c
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else
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CHIP_CSRCS += sam3u_clockconfig.c sam3u_gpio.c
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endif
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@ -186,6 +186,14 @@
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#define PM_PBAMASK_TWIM3 (1 << 22) /* Bit 22: TWIM3 */
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#define PM_PBAMASK_LCDCA (1 << 23) /* Bit 23: LCDCA*/
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/* These are the PBMA peripherals that use divided clocks enabled in the
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* PBADIVMASK register.
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*/
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#define PM_PBAMASK_TIMERS (PM_PBAMASK_TC0 | PM_PBAMASK_TC1)
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#define PM_PBAMASK_UARTS (PM_PBAMASK_USART0 | PM_PBAMASK_USART1 | \
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PM_PBAMASK_USART2 | PM_PBAMASK_USART3)
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/* PBB Mask Register Bit-field Definitions */
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#define PM_PBBMASK_FLASHCALW (1 << 0) /* Bit 0: FLASHCALW */
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@ -221,6 +229,10 @@
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#define PM_PBADIVMASK_TIMER_CLOCK4 (1 << 4) /* Bit 4: TIMER_CLOCK4 (TC0-1) */
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#define PM_PBADIVMASK_TIMER_CLOCK5 (1 << 6) /* Bit 5: TIMER_CLOCK5 (TC0-1) */
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#define PM_PBADIVMASK_TIMER_CLOCKS \
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(PM_PBADIVMASK_TIMER_CLOCK2 | PM_PBADIVMASK_TIMER_CLOCK3 | \
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PM_PBADIVMASK_TIMER_CLOCK4 | PM_PBADIVMASK_TIMER_CLOCK5)
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/* Clock Failure Detector Control */
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#define PM_CFDCTRL_CFDEN (1 << 0) /* Bit 0: Clock Failure Detection Enable */
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@ -569,152 +569,3 @@ void sam_clockconfig(void)
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void sam_usbclock();
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#endif
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}
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/****************************************************************************
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* Name: sam_modifyperipheral
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*
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* Description:
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* This is a convenience function that is intended to be used to enable
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* or disable peripheral module clocking.
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*
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****************************************************************************/
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void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits)
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{
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irqstate_t flags;
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uint32_t regval;
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/* Make sure that the following operations are atomic */
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flags = irqsave();
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/* Enable/disabling clocking */
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regval = getreg32(regaddr);
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regval &= ~clrbits;
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regval |= setbits;
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putreg32(PM_UNLOCK_KEY(0xaa) | PM_UNLOCK_ADDR(regaddr - SAM_PM_BASE), SAM_PM_UNLOCK);
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putreg32(regval, regaddr);
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: sam_pba_enableperipheral
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*
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* Description:
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* This is a convenience function to enable a peripheral on the APBA
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* bridge.
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*
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****************************************************************************/
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void sam_pba_enableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* The following operations must be atomic */
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flags = irqsave();
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/* Enable the APBA bridge if necessary */
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if (getreg32(SAM_PM_PBAMASK) == 0)
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{
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sam_hsb_enableperipheral(PM_HSBMASK_APBA);
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}
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irqrestore(flags);
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/* Enable the module */
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sam_enableperipheral(SAM_PM_PBAMASK, bitset);
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}
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/****************************************************************************
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* Name: sam_pba_disableperipheral
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*
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* Description:
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* This is a convenience function to disable a peripheral on the APBA
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* bridge.
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*
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****************************************************************************/
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void sam_pba_disableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* Disable clocking to the module */
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sam_disableperipheral(SAM_PM_PBAMASK, bitset);
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/* Disable the APBA bridge if possible */
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flags = irqsave();
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if (getreg32(SAM_PM_PBAMASK) == 0)
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{
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sam_hsb_disableperipheral(PM_HSBMASK_APBA);
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}
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: sam_pbb_enableperipheral
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*
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* Description:
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* This is a convenience function to enable a peripheral on the APBB
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* bridge.
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*
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****************************************************************************/
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void sam_pbb_enableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* The following operations must be atomic */
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flags = irqsave();
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/* Enable the APBB bridge if necessary */
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if (getreg32(SAM_PM_PBBMASK) == 0)
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{
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sam_hsb_enableperipheral(PM_HSBMASK_APBB);
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}
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irqrestore(flags);
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/* Enable the module */
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sam_enableperipheral(SAM_PM_PBBMASK, bitset);
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}
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/****************************************************************************
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* Name: sam_pbb_disableperipheral
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*
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* Description:
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* This is a convenience function to disable a peripheral on the APBA
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* bridge.
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*
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****************************************************************************/
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void sam_pbb_disableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* Disable clocking to the peripheral module */
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sam_disableperipheral(SAM_PM_PBBMASK, bitset);
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/* Disable the APBB bridge if possible */
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flags = irqsave();
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if (getreg32(SAM_PM_PBBMASK) == 0)
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{
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sam_hsb_disableperipheral(PM_HSBMASK_APBB);
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}
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irqrestore(flags);
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}
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272
arch/arm/src/sam34/sam4l_periphclks.c
Normal file
272
arch/arm/src/sam34/sam4l_periphclks.c
Normal file
@ -0,0 +1,272 @@
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/****************************************************************************
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* arch/avr/src/sam34/sam4l_periphclks.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* This file is derived from nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "chip/sam4l_pm.h"
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#include "sam4l_periphclks.h"
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/****************************************************************************
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* Private Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Global Variables
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****************************************************************************/
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/****************************************************************************
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* Private Variables
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_modifyperipheral
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*
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* Description:
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* This is a convenience function that is intended to be used to enable
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* or disable peripheral module clocking.
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*
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****************************************************************************/
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void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits)
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{
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irqstate_t flags;
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uint32_t regval;
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/* Make sure that the following operations are atomic */
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flags = irqsave();
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/* Enable/disabling clocking */
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regval = getreg32(regaddr);
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regval &= ~clrbits;
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regval |= setbits;
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putreg32(PM_UNLOCK_KEY(0xaa) | PM_UNLOCK_ADDR(regaddr - SAM_PM_BASE), SAM_PM_UNLOCK);
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putreg32(regval, regaddr);
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: sam_pba_modifydivmask
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*
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* Description:
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* This is a convenience function that is intended to be used to modify
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* bits in the PBA divided clock (DIVMASK) register.
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*
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****************************************************************************/
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void sam_pba_modifydivmask(uint32_t clrbits, uint32_t setbits)
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{
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irqstate_t flags;
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uint32_t regval;
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/* Make sure that the following operations are atomic */
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flags = irqsave();
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/* Modify the PBA DIVMASK */
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regval = getreg32(SAM_PM_PBADIVMASK);
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regval &= ~clrbits;
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regval |= setbits;
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putreg32(PM_UNLOCK_KEY(0xaa) | PM_UNLOCK_ADDR(SAM_PM_PBADIVMASK_OFFSET), SAM_PM_UNLOCK);
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putreg32(regval, SAM_PM_PBADIVMASK);
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: sam_pba_enableperipheral
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*
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* Description:
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* This is a convenience function to enable a peripheral on the APBA
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* bridge.
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*
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****************************************************************************/
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void sam_pba_enableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* The following operations must be atomic */
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flags = irqsave();
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/* Enable the APBA bridge if necessary */
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if (getreg32(SAM_PM_PBAMASK) == 0)
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{
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sam_hsb_enableperipheral(PM_HSBMASK_APBA);
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}
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irqrestore(flags);
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/* Enable the module */
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sam_enableperipheral(SAM_PM_PBAMASK, bitset);
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}
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/****************************************************************************
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* Name: sam_pba_disableperipheral
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*
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* Description:
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* This is a convenience function to disable a peripheral on the APBA
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* bridge.
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*
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****************************************************************************/
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void sam_pba_disableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* Disable clocking to the module */
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sam_disableperipheral(SAM_PM_PBAMASK, bitset);
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/* Disable the APBA bridge if possible */
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flags = irqsave();
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if (getreg32(SAM_PM_PBAMASK) == 0)
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{
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sam_hsb_disableperipheral(PM_HSBMASK_APBA);
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}
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/* Disable PBA UART divided clock if none of the UARTS are in use */
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if ((getreg32(SAM_PM_PBAMASK) & PM_PBAMASK_UARTS) == 0)
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{
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sam_pba_disabledivmask(PM_PBADIVMASK_CLK_USART);
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}
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/* Disable PBA TIMER divided clocks if none of the UARTS are in use */
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if ((getreg32(SAM_PM_PBAMASK) & PM_PBAMASK_TIMERS) == 0)
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{
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sam_pba_disabledivmask(PM_PBADIVMASK_TIMER_CLOCKS);
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}
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: sam_pbb_enableperipheral
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*
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* Description:
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* This is a convenience function to enable a peripheral on the APBB
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* bridge.
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*
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****************************************************************************/
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void sam_pbb_enableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* The following operations must be atomic */
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flags = irqsave();
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/* Enable the APBB bridge if necessary */
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if (getreg32(SAM_PM_PBBMASK) == 0)
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{
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sam_hsb_enableperipheral(PM_HSBMASK_APBB);
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}
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irqrestore(flags);
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/* Enable the module */
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sam_enableperipheral(SAM_PM_PBBMASK, bitset);
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}
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/****************************************************************************
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* Name: sam_pbb_disableperipheral
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*
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* Description:
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* This is a convenience function to disable a peripheral on the APBA
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* bridge.
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*
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****************************************************************************/
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void sam_pbb_disableperipheral(uint32_t bitset)
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{
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irqstate_t flags;
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/* Disable clocking to the peripheral module */
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sam_disableperipheral(SAM_PM_PBBMASK, bitset);
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/* Disable the APBB bridge if possible */
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flags = irqsave();
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if (getreg32(SAM_PM_PBBMASK) == 0)
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{
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sam_hsb_disableperipheral(PM_HSBMASK_APBB);
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}
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irqrestore(flags);
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}
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349
arch/arm/src/sam34/sam4l_periphclks.h
Normal file
349
arch/arm/src/sam34/sam4l_periphclks.h
Normal file
@ -0,0 +1,349 @@
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/************************************************************************************
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* arch/arm/src/sam34/sam4l_periphclks.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
|
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* Author: Gregory Nutt <gnutt@nuttx.org>
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_SAM4L_PERIPHCLKS_H
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#define __ARCH_ARM_SRC_SAM34_SAM4L_PERIPHCLKS_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* SAM4L helper macros */
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#define sam_enableperipheral(a,s) sam_modifyperipheral(a,0,s)
|
||||
#define sam_disableperipheral(a,s) sam_modifyperipheral(a,s,0)
|
||||
|
||||
#define sam_cpu_enableperipheral(s) sam_enableperipheral(SAM_PM_CPUMASK,s)
|
||||
#define sam_hsb_enableperipheral(s) sam_enableperipheral(SAM_PM_HSBMASK,s)
|
||||
#define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s)
|
||||
#define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s)
|
||||
|
||||
#define sam_cpu_disableperipheral(s) sam_disableperipheral(SAM_PM_CPUMASK,s)
|
||||
#define sam_hsb_disableperipheral(s) sam_disableperipheral(SAM_PM_HSBMASK,s)
|
||||
#define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s)
|
||||
#define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s)
|
||||
|
||||
#define sam_pba_enabledivmask(s) sam_pba_modifydivmask(0,s)
|
||||
#define sam_pba_disabledivmask(s) sam_pba_modifydivmask(s,0)
|
||||
|
||||
/* Macros to enable clocking to individual peripherals */
|
||||
|
||||
#define sam_aesa_enableclk() sam_hsb_enableperipheral(PM_HSBMASK_AESA)
|
||||
#define sam_iisc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_IISC)
|
||||
#define sam_spi_enableclk() sam_pba_enableperipheral(PM_PBAMASK_SPI)
|
||||
|
||||
#define sam_tc0_enableclk() \
|
||||
do { \
|
||||
sam_pba_enableperipheral(PM_PBAMASK_TC0); \
|
||||
sam_pba_enabledivmask(PM_PBADIVMASK_TIMER_CLOCKS); \
|
||||
} while (0)
|
||||
|
||||
#define sam_tc1_enableclk() \
|
||||
do { \
|
||||
sam_pba_enableperipheral(PM_PBAMASK_TC1); \
|
||||
sam_pba_enabledivmask(PM_PBADIVMASK_TIMER_CLOCKS); \
|
||||
} while (0)
|
||||
|
||||
#define sam_twim0_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM0)
|
||||
#define sam_twis0_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIS0)
|
||||
#define sam_twim1_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM1)
|
||||
#define sam_twis1_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIS1)
|
||||
|
||||
#define sam_usart0_enableclk() \
|
||||
do { \
|
||||
sam_pba_enableperipheral(PM_PBAMASK_USART0); \
|
||||
sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \
|
||||
} while (0)
|
||||
|
||||
#define sam_usart1_enableclk() \
|
||||
do { \
|
||||
sam_pba_enableperipheral(PM_PBAMASK_USART1); \
|
||||
sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \
|
||||
} while (0)
|
||||
|
||||
#define sam_usart2_enableclk() \
|
||||
do { \
|
||||
sam_pba_enableperipheral(PM_PBAMASK_USART2); \
|
||||
sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \
|
||||
} while (0)
|
||||
|
||||
#define sam_usart3_enableclk() \
|
||||
do { \
|
||||
sam_pba_enableperipheral(PM_PBAMASK_USART3); \
|
||||
sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \
|
||||
} while (0)
|
||||
|
||||
#define sam_adcife_enableclk() sam_pba_enableperipheral(PM_PBAMASK_ADCIFE)
|
||||
#define sam_dacc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_DACC)
|
||||
#define sam_acifc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_ACIFC)
|
||||
#define sam_gloc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_GLOC)
|
||||
#define sam_abdacb_enableclk() sam_pba_enableperipheral(PM_PBAMASK_ABDACB)
|
||||
#define sam_trng_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TRNG)
|
||||
#define sam_parc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_PARC)
|
||||
#define sam_catb_enableclk() sam_pba_enableperipheral(PM_PBAMASK_CATB)
|
||||
#define sam_twim2_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM2)
|
||||
#define sam_twim3_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM3)
|
||||
#define sam_lcdca_enableclk() sam_pba_enableperipheral(PM_PBAMASK_LCDCA)
|
||||
|
||||
#define sam_flashcalw_enableclk() \
|
||||
do { \
|
||||
sam_hsb_enableperipheral(PM_HSBMASK_FLASHCALW); \
|
||||
sam_pbb_enableperipheral(PM_PBBMASK_FLASHCALW); \
|
||||
} while (0)
|
||||
|
||||
#define sam_picocache_enableclk() \
|
||||
do { \
|
||||
sam_hsb_enableperipheral(PM_HSBMASK_HRAMC1); \
|
||||
sam_pbb_enableperipheral(PM_PBBMASK_HRAMC1); \
|
||||
} while (0)
|
||||
|
||||
#define sam_hmatrix_enableclk() sam_pbb_enableperipheral(PM_PBBMASK_HMATRIX)
|
||||
|
||||
#define sam_pdca_enableclk() \
|
||||
do { \
|
||||
sam_hsb_enableperipheral(PM_HSBMASK_PDCA); \
|
||||
sam_pbb_enableperipheral(PM_PBBMASK_PDCA); \
|
||||
} while (0)
|
||||
|
||||
#define sam_crccu_enableclk() \
|
||||
do { \
|
||||
sam_hsb_enableperipheral(PM_HSBMASK_CRCCU); \
|
||||
sam_pbb_enableperipheral(PM_PBBMASK_CRCCU); \
|
||||
} while (0)
|
||||
|
||||
#define sam_usbc_enableclk() \
|
||||
do { \
|
||||
sam_hsb_enableperipheral(PM_HSBMASK_USBC); \
|
||||
sam_pbb_enableperipheral(PM_PBBMASK_USBC); \
|
||||
} while (0)
|
||||
|
||||
#define sam_pevc_enableclk() sam_pbb_enableperipheral(PM_PBBMASK_PEVC)
|
||||
#define sam_pm_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_PM)
|
||||
#define sam_chipid_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_CHIPID)
|
||||
#define sam_scif_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_SCIF)
|
||||
#define sam_freqm_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_FREQM)
|
||||
#define sam_gpio_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_GPIO)
|
||||
#define sam_bpm_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_BPM)
|
||||
#define sam_bscif_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_BSCIF)
|
||||
#define sam_ast_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_AST)
|
||||
#define sam_wdt_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_WDT)
|
||||
#define sam_eic_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_EIC)
|
||||
#define sam_picouart_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_PICOUART)
|
||||
|
||||
/* Macros to disable clocking to individual peripherals */
|
||||
|
||||
#define sam_aesa_disableclk() sam_hsb_disableperipheral(PM_HSBMASK_AESA)
|
||||
#define sam_iisc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_IISC)
|
||||
#define sam_spi_disableclk() sam_pba_disableperipheral(PM_PBAMASK_SPI)
|
||||
#define sam_tc0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TC0)
|
||||
#define sam_tc1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TC1)
|
||||
#define sam_twim0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM0)
|
||||
#define sam_twis0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIS0)
|
||||
#define sam_twim1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM1)
|
||||
#define sam_twis1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIS1)
|
||||
#define sam_usart0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART0)
|
||||
#define sam_usart1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART1)
|
||||
#define sam_usart2_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART2)
|
||||
#define sam_usart3_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART3)
|
||||
#define sam_adcife_disableclk() sam_pba_disableperipheral(PM_PBAMASK_ADCIFE)
|
||||
#define sam_dacc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_DACC)
|
||||
#define sam_acifc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_ACIFC)
|
||||
#define sam_gloc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_GLOC)
|
||||
#define sam_abdacb_disableclk() sam_pba_disableperipheral(PM_PBAMASK_ABDACB)
|
||||
#define sam_trng_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TRNG)
|
||||
#define sam_parc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_PARC)
|
||||
#define sam_catb_disableclk() sam_pba_disableperipheral(PM_PBAMASK_CATB)
|
||||
#define sam_twim2_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM2)
|
||||
#define sam_twim3_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM3)
|
||||
#define sam_lcdca_disableclk() sam_pba_disableperipheral(PM_PBAMASK_LCDCA)
|
||||
#define sam_flashcalw_disableclk() sam_pba_disableperipheral(PM_HSBMASK_FLASHCALW)
|
||||
|
||||
#define sam_picocache_disableclk() \
|
||||
do { \
|
||||
sam_hsb_disableperipheral(PM_HSBMASK_HRAMC1); \
|
||||
sam_pbb_disableperipheral(PM_PBBMASK_HRAMC1); \
|
||||
} while (0)
|
||||
|
||||
#define sam_hmatrix_disableclk() sam_pbb_disableperipheral(PM_PBBMASK_HMATRIX)
|
||||
|
||||
#define sam_pdca_disableclk() \
|
||||
do { \
|
||||
sam_hsb_disableperipheral(PM_HSBMASK_PDCA); \
|
||||
sam_pbb_disableperipheral(PM_PBBMASK_PDCA); \
|
||||
} while (0)
|
||||
|
||||
#define sam_crccu_disableclk() \
|
||||
do { \
|
||||
sam_hsb_disableperipheral(PM_HSBMASK_CRCCU); \
|
||||
sam_pbb_disableperipheral(PM_PBBMASK_CRCCU); \
|
||||
} while (0)
|
||||
|
||||
#define sam_usbc_disableclk() \
|
||||
do { \
|
||||
sam_hsb_disableperipheral(PM_HSBMASK_USBC); \
|
||||
sam_pbb_disableperipheral(PM_PBBMASK_USBC); \
|
||||
} while (0)
|
||||
|
||||
#define sam_pevc_disableclk() sam_pbb_disableperipheral(PM_PBBMASK_PEVC)
|
||||
#define sam_pm_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_PM)
|
||||
#define sam_chipid_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_CHIPID)
|
||||
#define sam_scif_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_SCIF)
|
||||
#define sam_freqm_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_FREQM)
|
||||
#define sam_gpio_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_GPIO)
|
||||
#define sam_bpm_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_BPM)
|
||||
#define sam_bscif_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_BSCIF)
|
||||
#define sam_ast_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_AST)
|
||||
#define sam_wdt_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_WDT)
|
||||
#define sam_eic_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_EIC)
|
||||
#define sam_picouart_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_PICOUART)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_modifyperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function that is intended to be used to enable
|
||||
* or disable module clocking.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pba_modifydivmask
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function that is intended to be used to modify
|
||||
* bits in the PBA divided clock (DIVMASK) register.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pba_modifydivmask(uint32_t clrbits, uint32_t setbits);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pba_enableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to enable a peripheral on the APBA
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pba_enableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pba_disableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to disable a peripheral on the APBA
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pba_disableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pbb_enableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to enable a peripheral on the APBB
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pbb_enableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pbb_disableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to disable a peripheral on the APBA
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pbb_disableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_SAM34_SAM4L_PERIPHCLKS_H */
|
||||
@ -46,23 +46,6 @@
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* SAM4L helper functions */
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
# define sam_enableperipheral(a,s) sam_modifyperipheral(a,0,s)
|
||||
# define sam_disableperipheral(a,s) sam_modifyperipheral(a,s,0)
|
||||
|
||||
# define sam_cpu_enableperipheral(s) sam_enableperipheral(SAM_PM_CPUMASK,s)
|
||||
# define sam_hsb_enableperipheral(s) sam_enableperipheral(SAM_PM_HSBMASK,s)
|
||||
# define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s)
|
||||
# define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s)
|
||||
|
||||
# define sam_cpu_disableperipheral(s) sam_disableperipheral(SAM_PM_CPUMASK,s)
|
||||
# define sam_hsb_disableperipheral(s) sam_disableperipheral(SAM_PM_HSBMASK,s)
|
||||
# define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s)
|
||||
# define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
@ -102,71 +85,6 @@ extern "C"
|
||||
|
||||
void sam_clockconfig(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_modifyperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function that is intended to be used to enable
|
||||
* or disable module clocking.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pba_enableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to enable a peripheral on the APBA
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pba_enableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pba_disableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to disable a peripheral on the APBA
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pba_disableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pbb_enableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to enable a peripheral on the APBB
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pbb_enableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_pbb_disableperipheral
|
||||
*
|
||||
* Description:
|
||||
* This is a convenience function to disable a peripheral on the APBA
|
||||
* bridge.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_SAM4L
|
||||
void sam_pbb_disableperipheral(uint32_t bitset);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user