From 944e132e9574487c3a5ff90e010f3fe1fb36539e Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 21 Aug 2010 22:27:42 +0000 Subject: [PATCH] Finishes basic paging support git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2876 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/src/arm/pg_macros.h | 6 +++ arch/arm/src/lpc313x/lpc313x_boot.c | 66 ++++++++++++++++++++++++++++- 2 files changed, 71 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/arm/pg_macros.h b/arch/arm/src/arm/pg_macros.h index 84b8df9fcc..47abf10abf 100644 --- a/arch/arm/src/arm/pg_macros.h +++ b/arch/arm/src/arm/pg_macros.h @@ -91,6 +91,9 @@ # define MMU_L1_PGTABFLAGS (PMD_TYPE_FINE|PMD_BIT4) # define MMU_L2_PGTABFLAGS (PTE_TYPE_TINY|PTE_EXT_AP_UNO_SRW) +# define MMU_L2_VECTRWFLAGS (PTE_TYPE_TINY|PTE_EXT_AP_UNO_SRW) +# define MMU_L2_VECTROFLAGS (PTE_TYPE_TINY|PTE_EXT_AP_UNO_SRO|PTE_CACHEABLE) + #elif CONFIG_PAGING_PAGESIZE == 4096 /* Number of pages in an L2 table per L1 entry */ @@ -115,6 +118,9 @@ # define MMU_L1_PGTABFLAGS (PMD_TYPE_COARSE|PMD_BIT4) # define MMU_L2_PGTABFLAGS (PTE_TYPE_SMALL|PTE_SMALL_AP_UNO_SRW) +# define MMU_L2_VECTRWFLAGS (PTE_TYPE_SMALL|PTE_SMALL_AP_UNO_SRW) +# define MMU_L2_VECTROFLAGS (PTE_TYPE_SMALL|PTE_SMALL_AP_UNO_SRO|PTE_CACHEABLE) + #else # error "Need extended definitions for CONFIG_PAGING_PAGESIZE" #endif diff --git a/arch/arm/src/lpc313x/lpc313x_boot.c b/arch/arm/src/lpc313x/lpc313x_boot.c index c0c3a154d2..1f0744328b 100755 --- a/arch/arm/src/lpc313x/lpc313x_boot.c +++ b/arch/arm/src/lpc313x/lpc313x_boot.c @@ -192,6 +192,56 @@ static void up_setupmappings(void) } #endif +/************************************************************************************ + * Name: up_vectorpermissions + * + * Description: + * Set permissions on the vector mapping. + * + ************************************************************************************/ + +#if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING) +static void up_vectorpermissions(uint32 mmuflags) +{ + uint32_t *ptr = (uint3t*)PG_L2_VECT_VADDR; + uint32_t pte; + + /* This is easily because we have already been told everything! */ + + pte = *ptr; +#ifdef CONFIG_PAGING_VECPPAGE + /* We've been told to use a specify page for the vectors. In this + * case, I expect the pte to be zero the first time this function is + * called (what if it is not?) + */ + + if (pte == 0) + { + pte = PG_VECT_PBASE; + } + else + { + pte &= PG_L1_PADDRMASK; + } +#else + /* Otherwise, we should be using the page at the beginning of the + * locked text region. + */ + + ASSERT(pte != 0); + pte &= PG_L1_PADDRMASK; +#endif + + /* Update the MMU flags and save */ + + *ptr = pte | mmuflags; + + /* Invalid the TLB for this address */ + + tlb_invalidate_single(PG_L2_VECT_VADDR); +} +#endif + /************************************************************************************ * Name: up_vectormapping * @@ -288,6 +338,14 @@ void up_boot(void) #ifndef CONFIG_ARCH_ROMPGTABLE up_setupmappings(); + /* If we are using vectors in low memory but RAM in that area has been marked + * read only, then temparily mark the mapping write-able (non-buffered). + */ + +#if defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING) + up_vectorpermissions(MMU_L2_VECTRWFLAGS); +#endif + /* Provide a special mapping for the IRAM interrupt vector positioned in high * memory. */ @@ -295,7 +353,7 @@ void up_boot(void) #ifndef CONFIG_ARCH_LOWVECTORS up_vectormapping(); #endif -#endif +#endif /* CONFIG_ARCH_ROMPGTABLE */ /* Setup up vector block. _vector_start and _vector_end are exported from * up_vector.S @@ -303,6 +361,12 @@ void up_boot(void) up_copyvectorblock(); + /* Make the vectors read-only, cacheable again */ + +#if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING) + up_vectorpermissions(MMU_L2_VECTROFLAGS); +#endif + /* Reset all clocks */ lpc313x_resetclks();