arch/arm/src/sama5/sam_emaca.c: Fix syslog formats
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700eaaa6fe
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@ -51,6 +51,7 @@
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#include <nuttx/config.h>
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#include <inttypes.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <time.h>
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@ -1027,7 +1028,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
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up_invalidate_dcache((uintptr_t)rxdesc,
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(uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
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ninfo("rxndx: %d\n", rxndx);
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ninfo("rxndx: %" PRId32 "\n", rxndx);
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while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
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{
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@ -1138,7 +1139,8 @@ static int sam_recvframe(struct sam_emac_s *priv)
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/* Frame size from the EMAC */
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dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
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ninfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
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ninfo("packet %d-%" PRId32 " (%d)\n",
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priv->rxndx, rxndx, dev->d_len);
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/* All data have been copied in the application frame buffer,
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* release the RX descriptor
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@ -1173,7 +1175,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
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if (pktlen < dev->d_len)
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{
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nerr("ERROR: Buffer size %d; frame size %d\n",
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nerr("ERROR: Buffer size %d; frame size %" PRId32 "\n",
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dev->d_len, pktlen);
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return -E2BIG;
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}
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@ -1509,7 +1511,7 @@ static void sam_interrupt_work(FAR void *arg)
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imr = sam_getreg(priv, SAM_EMAC_IMR);
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pending = isr & ~(imr | EMAC_INT_UNUSED);
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ninfo("isr: %08x pending: %08x\n", isr, pending);
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ninfo("isr: %08" PRIx32 " pending: %08" PRIx32 "\n", isr, pending);
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/* Check for the completion of a transmission. This should be done before
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* checking for received data (because receiving can cause another
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@ -1535,7 +1537,7 @@ static void sam_interrupt_work(FAR void *arg)
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clrbits = EMAC_TSR_RLES | sam_txinuse(priv);
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sam_txreset(priv);
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nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
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nerr("ERROR: Retry Limit Exceeded TSR: %08" PRIx32 "\n", tsr);
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regval = sam_getreg(priv, SAM_EMAC_NCR);
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regval |= EMAC_NCR_TE;
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@ -1546,7 +1548,7 @@ static void sam_interrupt_work(FAR void *arg)
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if ((tsr & EMAC_TSR_COL) != 0)
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{
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nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
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nerr("ERROR: Collision occurred TSR: %08" PRIx32 "\n", tsr);
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clrbits |= EMAC_TSR_COL;
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}
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@ -1554,7 +1556,8 @@ static void sam_interrupt_work(FAR void *arg)
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if ((tsr & EMAC_TSR_BEX) != 0)
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{
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nerr("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
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nerr("ERROR: Buffers exhausted mid-frame TSR: %08" PRIx32 "\n",
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tsr);
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clrbits |= EMAC_TSR_BEX;
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}
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@ -1569,7 +1572,7 @@ static void sam_interrupt_work(FAR void *arg)
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if ((tsr & EMAC_TSR_UND) != 0)
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{
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nerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
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nerr("ERROR: Transmit Underrun TSR: %08" PRIx32 "\n", tsr);
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clrbits |= EMAC_TSR_UND;
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}
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@ -1606,7 +1609,7 @@ static void sam_interrupt_work(FAR void *arg)
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if ((rsr & EMAC_RSR_OVR) != 0)
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{
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nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
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nerr("ERROR: Receiver overrun RSR: %08" PRIx32 "\n", rsr);
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clrbits |= EMAC_RSR_OVR;
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}
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@ -1623,7 +1626,7 @@ static void sam_interrupt_work(FAR void *arg)
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if ((rsr & EMAC_RSR_BNA) != 0)
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{
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nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
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nerr("ERROR: Buffer not available RSR: %08" PRIx32 "\n", rsr);
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clrbits |= EMAC_RSR_BNA;
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}
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@ -1878,8 +1881,10 @@ static int sam_ifup(struct net_driver_s *dev)
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int ret;
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ninfo("Bringing up: %d.%d.%d.%d\n",
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dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
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(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
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(int)(dev->d_ipaddr & 0xff),
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(int)((dev->d_ipaddr >> 8) & 0xff),
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(int)((dev->d_ipaddr >> 16) & 0xff),
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(int)(dev->d_ipaddr >> 24));
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/* Configure the EMAC interface for normal operation. */
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