Small changes from review of last PR
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@ -2634,10 +2634,12 @@ config STM32_FLASH_PREFETCH
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properly and enabling this option may interfere with ADC accuracy.
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config STM32_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW
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bool "Enable the workaround to fix flash data cache corruption when reading from one flash bank while writing on other flash bank"
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default n
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---help---
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See your STM32 errata to check if your STM32 is affected by this problem.
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bool "Workaround for FLASH data cache corruption"
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default n
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---help---
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Enable the workaround to fix flash data cache corruption when reading
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from one flash bank while writing on other flash bank. See your STM32
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errata to check if your STM32 is affected by this problem.
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choice
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prompt "JTAG Configuration"
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@ -392,7 +392,6 @@
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* Public Functions
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************************************************************************************/
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void stm32_flash_initialize(void);
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void stm32_flash_lock(void);
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void stm32_flash_unlock(void);
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@ -48,8 +48,10 @@
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <errno.h>
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#include <stdbool.h>
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#include <semaphore.h>
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#include <assert.h>
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#include <errno.h>
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#include "stm32_flash.h"
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#include "stm32_rcc.h"
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@ -82,31 +84,27 @@
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#define FLASH_SR_WRITE_PROTECTION_ERROR FLASH_SR_WRPERR
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#endif
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/************************************************************************************
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* Private Data
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************************************************************************************/
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static sem_t g_sem = SEM_INITIALIZER(1);
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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static sem_t g_sem;
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/*
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* After all SMT32 boards starts calling stm32_flash_initialize() this can
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* be removed.
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*/
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static bool g_initialized = false;
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static void sem_lock(void)
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{
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if (g_initialized)
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while (sem_wait(&g_sem) < 0)
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{
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sem_wait(&g_sem);
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DEBUGASSERT(errno == EINTR);
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}
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}
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static void sem_unlock(void)
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static inline void sem_unlock(void)
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{
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if (g_initialized)
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{
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sem_post(&g_sem);
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}
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sem_post(&g_sem);
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}
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static void flash_unlock(void)
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@ -137,24 +135,18 @@ static void data_cache_disable(void)
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static void data_cache_enable(void)
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{
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/* reset data cache */
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/* Reset data cache */
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modifyreg32(STM32_FLASH_ACR, 0, FLASH_ACR_DCRST);
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/* enable data cache */
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/* Enable data cache */
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modifyreg32(STM32_FLASH_ACR, 0, FLASH_ACR_DCEN);
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}
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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void stm32_flash_initialize(void)
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{
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g_initialized = true;
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/*
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* Initialize the semaphore that manages exclusive access flash registers
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*/
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sem_init(&g_sem, 0, 1);
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}
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void stm32_flash_unlock(void)
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{
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@ -171,7 +163,6 @@ void stm32_flash_lock(void)
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}
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#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
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size_t up_progmem_pagesize(size_t page)
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{
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return STM32_FLASH_PAGESIZE;
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@ -63,7 +63,7 @@
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* Name: stm32_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the stm32f4discovery board.
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* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2 STM32 board.
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*
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************************************************************************************/
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