Add PIC32MX GPIO handling; add button/LED support for the Sure PIC32MX
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4040 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
06fe742529
commit
9491c6d810
@ -2162,3 +2162,6 @@
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returned.
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* arch/sim/src/Makefile: Correct build issue for sim/nsh2 target. Old
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libboard.a was not being cleaned.
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* arch/mips/src/pic32mx/pic32mx-gpio*.c: Add GPIO support for the PIC32MX.
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* configs/sure-pic32mx/src/up_leds.c and up_buttons.c: Add button and LED
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support for the Sure Electronics PIC32MX board.
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@ -2,7 +2,7 @@
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* arch/arm/src/sam3u/sam3u_pio.c
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -2,7 +2,7 @@
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# arch/mips/src/pic32mx/Make.defs
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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@ -61,8 +61,11 @@ endif
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# Required PIC32MX files
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CHIP_ASRCS =
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CHIP_CSRCS = pic32mx-irq.c pic32mx-decodeirq.c pic32mx-dobev.c pic32mx-lowconsole.c \
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pic32mx-lowinit.c pic32mx-serial.c pic32mx-timerisr.c
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CHIP_CSRCS = pic32mx-irq.c pic32mx-decodeirq.c pic32mx-dobev.c pic32mx-gpio.c \
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pic32mx-lowconsole.c pic32mx-lowinit.c pic32mx-serial.c pic32mx-timerisr.c
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# Configuration-dependent PIC32MX files
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ifeq ($(CONFIG_GPIO_IRQ),y)
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CHIP_CSRCS += up_gpioirq.c
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endif
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@ -354,14 +354,14 @@
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# error "CONFIG_PIC32MX_UART2PRIO is too large"
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#endif
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#ifndef CONFIG_PIC32MX_CN /* Input Change Interrupt */
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# define CONFIG_PIC32MX_CN (INT_ICP_MID_PRIORITY << 2)
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#ifndef CONFIG_PIC32MX_CNPRIO /* Input Change Interrupt */
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# define CONFIG_PIC32MX_CNPRIO (INT_ICP_MID_PRIORITY << 2)
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#endif
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#if CONFIG_PIC32MX_CN < 4
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# error "CONFIG_PIC32MX_CN is too small"
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#if CONFIG_PIC32MX_CNPRIO < 4
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# error "CONFIG_PIC32MX_CNPRIO is too small"
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#endif
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#if CONFIG_PIC32MX_CN > 31
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# error "CONFIG_PIC32MX_CN is too large"
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#if CONFIG_PIC32MX_CNPRIO > 31
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# error "CONFIG_PIC32MX_CNPRIO is too large"
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#endif
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#ifndef CONFIG_PIC32MX_ADCPRIO /* ADC1 Convert Done */
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@ -2,7 +2,7 @@
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* arch/mips/src/pic32mx/pic32mx-decodeirq.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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298
arch/mips/src/pic32mx/pic32mx-gpio.c
Normal file
298
arch/mips/src/pic32mx/pic32mx-gpio.c
Normal file
@ -0,0 +1,298 @@
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/****************************************************************************
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* arch/mips/src/pic32mx/pic32mx-gpio.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <errno.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "pic32mx-ioport.h"
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#include "pic32mx-internal.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define GPIO_NPORTS 7
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const uintptr_t g_gpiobase[GPIO_NPORTS] =
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{
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PIC32MX_IOPORTA_K1BASE, PIC32MX_IOPORTB_K1BASE, PIC32MX_IOPORTC_K1BASE,
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PIC32MX_IOPORTD_K1BASE, PIC32MX_IOPORTE_K1BASE, PIC32MX_IOPORTF_K1BASE,
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PIC32MX_IOPORTG_K1BASE
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: Inline PIN set field extractors
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****************************************************************************/
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static inline bool pic32mx_output(uint16_t pinset)
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{
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return ((pinset & GPIO_OUTPUT) != 0);
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}
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static inline bool pic32mx_opendrain(uint16_t pinset)
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{
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return ((pinset & GPIO_MODE_MASK) == GPIO_OPENDRAN);
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}
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static inline bool pic32mx_outputhigh(uint16_t pinset)
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{
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return ((pinset & GPIO_VALUE_MASK) != 0);
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}
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static inline bool pic32mx_value(uint16_t pinset)
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{
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return ((pinset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO);
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}
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static inline unsigned int pic32mx_portno(uint16_t pinset)
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{
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return ((pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT);
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}
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static inline unsigned int pic32mx_pinno(uint16_t pinset)
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{
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return ((pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: pic32mx_configgpio
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*
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin (the
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* interrupt will be configured when pic32mx_attach() is called.
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*
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* Returned Value:
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* OK on success; negated errno on failure.
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*
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****************************************************************************/
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int pic32mx_configgpio(uint16_t cfgset)
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{
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unsigned int port = pic32mx_portno(cfgset);
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unsigned int pin = pic32mx_pinno(cfgset);
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uintptr_t base;
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/* Verify that the port number is within range */
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if (port < GPIO_NPORTS)
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{
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/* Get the base address of the ports */
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base = g_gpiobase[port];
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/* Is this an input or an output? */
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sched_lock();
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if (pic32mx_output(cfgset))
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{
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/* It is an output; set the corresponding bit in the TRIS register */
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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/* Is it an open drain output? */
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if (pic32mx_opendrain(cfgset))
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{
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/* It is an open drain output. Set the corresponding bit in
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* the ODC register.
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*/
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCSET_OFFSET);
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}
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else
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{
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/* Is is a normal output. Clear the corresponding bit in the
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* ODC register.
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*/
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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}
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/* Set the initial output value */
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pic32mx_gpiowrite(cfgset, pic32mx_outputhigh(cfgset));
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}
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else
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{
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/* It is an input; clear the corresponding bit in the TRIS
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* register.
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*/
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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}
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sched_unlock();
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return OK;
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}
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return -EINVAL;
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}
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/****************************************************************************
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* Name: pic32mx_gpiowrite
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*
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* Description:
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* Write one or zero to the selected GPIO pin
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*
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****************************************************************************/
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void pic32mx_gpiowrite(uint16_t pinset, bool value)
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{
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unsigned int port = pic32mx_portno(pinset);
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unsigned int pin = pic32mx_pinno(pinset);
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uintptr_t base;
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/* Verify that the port number is within range */
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if (port < GPIO_NPORTS)
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{
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/* Get the base address of the ports */
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base = g_gpiobase[port];
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/* Set or clear the output */
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if (value)
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{
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putreg32(1 << pin, base + PIC32MX_IOPORT_PORTSET_OFFSET);
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}
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else
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{
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putreg32(1 << pin, base + PIC32MX_IOPORT_PORTCLR_OFFSET);
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}
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}
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}
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/****************************************************************************
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* Name: pic32mx_gpioread
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*
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* Description:
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* Read one or zero from the selected GPIO pin
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*
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****************************************************************************/
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bool pic32mx_gpioread(uint16_t pinset)
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{
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unsigned int port = pic32mx_portno(pinset);
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unsigned int pin = pic32mx_pinno(pinset);
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uintptr_t base;
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/* Verify that the port number is within range */
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if (port < GPIO_NPORTS)
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{
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/* Get the base address of the ports */
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base = g_gpiobase[port];
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/* Get ane return the input value */
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return (getreg32(base + PIC32MX_IOPORT_PORT_OFFSET) & (1 << pin)) != 0;
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}
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return false;
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}
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/****************************************************************************
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* Function: pic32mx_dumpgpio
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*
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* Description:
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* Dump all GPIO registers associated with the provided base address
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*
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****************************************************************************/
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_GPIO)
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void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
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{
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unsigned int port = pic32mx_portno(pinset);
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irqstate_t flags;
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uintptr_t base;
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/* Verify that the port number is within range */
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if (port < GPIO_NPORTS)
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{
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/* Get the base address of the ports */
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base = g_gpiobase[port];
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/* The following requires exclusive access to the GPIO registers */
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sched_lock();
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lldbg("IOPORT%c pinset: %04x base: %08x -- %s\n",
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'A'+port, pinset, base, msg);
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lldbg(" TRIS: %08x PORT: %08x LAT: %08x ODC: %08x\n",
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getreg32(base + PIC32MX_IOPORT_TRIS_OFFSET),
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getreg32(base + PIC32MX_IOPORT_PORT_OFFSET),
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getreg32(base + PIC32MX_IOPORT_LAT_OFFSET),
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getreg32(base + PIC32MX_IOPORT_ODC_OFFSET));
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lldbg(" CNCON: %08x CNEN: %08x CNPUE: %08x\n",
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getreg32(PIC32MX_IOPORT_CNCON),
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getreg32(PIC32MX_IOPORT_CNEN),
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getreg32(PIC32MX_IOPORT_CNPUE));
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sched_unlock();
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}
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}
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#endif
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288
arch/mips/src/pic32mx/pic32mx-gpioirq.c
Normal file
288
arch/mips/src/pic32mx/pic32mx-gpioirq.c
Normal file
@ -0,0 +1,288 @@
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/****************************************************************************
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* arch/mips/src/pic32mx/pic32mx-gpio.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
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* are met:
|
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*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
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* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "pic32mx-gpio.h"
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#include "pic32mx-internal.h"
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#ifdef CONFIG_GPIO_IRQ
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static xcpt_t g_cnisrs[IOPORT_NUMCN];
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: Inline PIN set field extractors
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****************************************************************************/
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static inline bool pic32mx_input(uint16_t pinset)
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{
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return ((pinset & GPIO_MODE_MASK) != GPIO_INPUT);
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}
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static inline bool pic32mx_interrupt(uint16_t pinset)
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{
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return ((pinset & GPIO_INTERRUPT) != 0);
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}
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static inline bool pic32mx_pullup(uint16_t pinset)
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{
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return ((pinset & GPIO_INT_MASK) == GPIO_PUINT);
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}
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/****************************************************************************
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* Name: pic32mx_cninterrupt
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*
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* Description:
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* Change notification interrupt handler.
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*
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****************************************************************************/
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static int pic32mx_cninterrupt(int irq, FAR void *context)
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{
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int status;
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int ret = OK;
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int i;
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/* Call all attached handlers */
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for (i = 0; i < IOPORT_NUMCN; i++)
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{
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/* Is this one attached */
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if (g_cnisrs[i])
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{
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/* Call the attached handler */
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status = g_cnisrs[i](irq, context);
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|
||||
/* Keep track of the status of the last handler that failed */
|
||||
|
||||
if (status < 0)
|
||||
{
|
||||
ret = status;
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear the pending interrupt */
|
||||
|
||||
up_clrpend_irq(PIC32MX_IRQ_CN);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mx_gpioirqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize logic to support a GPIO change notification interrupts.
|
||||
* This function is called internally by the system on power up and should
|
||||
* not be called again.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void pic32mx_gpioirqinitialize(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Attach the change notice interrupt handler */
|
||||
|
||||
ret = irqattach(PIC32MX_IRQ_CN, pic32mx_cninterrupt);
|
||||
DEBUGASSERT(ret == OK);
|
||||
|
||||
/* Set the interrupt priority */
|
||||
|
||||
#ifdef CONFIG_ARCH_IRQPRIO
|
||||
ret = up_prioritize_irq(PIC32MX_IRQ_CN, CONFIG_PIC32MX_CNPRIO);
|
||||
DEBUGASSERT(ret == OK);
|
||||
#endif
|
||||
|
||||
/* Reset all registers and enable the CN module */
|
||||
|
||||
putreg32(IOPORT_CN_ALL, PIC32MX_IOPORT_CNENCLR);
|
||||
putreg32(IOPORT_CN_ALL, PIC32MX_IOPORT_CNPUECLR);
|
||||
putreg32(IOPORT_CNCON_ON, PIC32MX_IOPORT_CNCON);
|
||||
|
||||
/* And enable the GPIO interrupt */
|
||||
|
||||
ret = up_enable_irq(PIC32MX_IRQSRC_CN);
|
||||
DEBUGASSERT(ret == OK);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mx_gpioattach
|
||||
*
|
||||
* Description:
|
||||
* Attach an interrupt service routine to a GPIO interrupt. This will
|
||||
* also reconfigure the pin as an interrupting input. The change
|
||||
* notification number is associated with all interrupt-capabile GPIO pins.
|
||||
* The association could, however, differ from part to part and must be
|
||||
* provided by the caller.
|
||||
*
|
||||
* When an interrupt occurs, it is due to a change on the GPIO input pin.
|
||||
* In that case, all attached handlers will be called. Each handler must
|
||||
* maintain state and determine if the unlying GPIO input value changed.
|
||||
*
|
||||
* Parameters:
|
||||
* - pinset: GPIO pin configuration
|
||||
* - cn: The change notification number associated with the pin.
|
||||
* - handler: Interrupt handler (may be NULL to detach)
|
||||
*
|
||||
* Returns:
|
||||
* The previous value of the interrupt handler function pointer. This
|
||||
* value may, for example, be used to restore the previous handler when
|
||||
* multiple handlers are used.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler)
|
||||
{
|
||||
xcpt_t oldhandler = NULL;
|
||||
irqstate_t flags;
|
||||
|
||||
DEBUGASSERT(cn < IOPORT_NUMCN);
|
||||
|
||||
/* First verify that the pinset is configured as an interrupting input */
|
||||
|
||||
if (pic32mx_input(pinset) && pic32mx_interrupt(pinset))
|
||||
{
|
||||
/* Get the previously attached handler as the return value */
|
||||
|
||||
flags = irqsave();
|
||||
oldhandler = g_cnisrs[cn];
|
||||
|
||||
/* Are we attaching or detaching? */
|
||||
|
||||
if (handler != NULL)
|
||||
{
|
||||
/* Attaching... Make sure that the GPIO is properly configured as
|
||||
* an input
|
||||
*/
|
||||
|
||||
pic32mx_configgpio(pinset);
|
||||
|
||||
/* Pull-up requested? */
|
||||
|
||||
if (pic32mx_pullup(pinset))
|
||||
{
|
||||
putreg32(1 << cn, PIC32MX_IOPORT_CNPUESET);
|
||||
}
|
||||
else
|
||||
{
|
||||
putreg32(1 << cn, PIC32MX_IOPORT_CNPUECLR);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Make sure that any further interrupts are disabled.
|
||||
* (disable the pull-up as well).
|
||||
*/
|
||||
|
||||
putreg32(1 << cn, PIC32MX_IOPORT_CNENCLR);
|
||||
putreg32(1 << cn, PIC32MX_IOPORT_CNPUECLR);
|
||||
}
|
||||
|
||||
/* Set the new handler (perhaps NULLifying the current handler) */
|
||||
|
||||
g_cnisrs[cn] = handler;
|
||||
irqrestore(flags);
|
||||
}
|
||||
|
||||
return oldhandler;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mx_gpioirqenable
|
||||
*
|
||||
* Description:
|
||||
* Enable the interrupt for specified GPIO IRQ
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void pic32mx_gpioirqenable(unsigned int cn)
|
||||
{
|
||||
DEBUGASSERT(cn < IOPORT_NUMCN);
|
||||
putreg32(1 << cn, PIC32MX_IOPORT_CNENSET);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mx_gpioirqdisable
|
||||
*
|
||||
* Description:
|
||||
* Disable the interrupt for specified GPIO IRQ
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void pic32mx_gpioirqdisable(unsigned int cn)
|
||||
{
|
||||
DEBUGASSERT(cn < IOPORT_NUMCN);
|
||||
putreg32(1 << cn, PIC32MX_IOPORT_CNENCLR);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_GPIO_IRQ */
|
||||
@ -2,7 +2,7 @@
|
||||
* arch/mips/src/pic32mx/pic32mx-internal.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@ -54,6 +54,56 @@
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
************************************************************************************/
|
||||
/* GPIO settings used in the configport, readport, writeport, etc.
|
||||
*
|
||||
* General encoding:
|
||||
* MMxV Ixxx RRRx PPPP
|
||||
*/
|
||||
|
||||
#define GPIO_MODE_SHIFT (14) /* Bits 14-15: I/O mode */
|
||||
#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
|
||||
# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* 00 Normal input */
|
||||
# define GPIO_OUTPUT (2 << GPIO_MODE_SHIFT) /* 10 Normal output */
|
||||
# define GPIO_OPENDRAN (3 << GPIO_MODE_SHIFT) /* 11 Open drain output */
|
||||
|
||||
#define GPIO_VALUE_MASK (1 << 12) /* Bit 12: Initial output value */
|
||||
# define GPIO_VALUE_ONE (1 << 12)
|
||||
# define GPIO_VALUE_ZERO (0)
|
||||
|
||||
#define GPIO_INT_SHIFT (14) /* Bits 10-11: Interrupt mode */
|
||||
#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
|
||||
# define GPIO_INT_NONE (0 << GPIO_INT_SHIFT) /* Bit 00: No interrupt */
|
||||
# define GPIO_INT (1 << GPIO_INT_SHIFT) /* Bit 01: Change notification enable */
|
||||
# define GPIO_PUINT (3 << GPIO_INT_SHIFT) /* Bit 11: Pulled-up interrupt input */
|
||||
|
||||
#define GPIO_PORT_SHIFT (5) /* Bits 5-7: Port number */
|
||||
#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
|
||||
# define GPIO_PORTG (6 << GPIO_PORT_SHIFT)
|
||||
|
||||
#define GPIO_PIN_SHIFT 0 /* Bits 0-3: GPIO number: 0-15 */
|
||||
#define GPIO_PIN_MASK (15 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
|
||||
#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
@ -191,6 +241,129 @@ EXTERN uint32_t *pic32mx_decodeirq(uint32_t *regs);
|
||||
|
||||
EXTERN uint32_t *pic32mx_dobev(uint32_t *regs);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_configgpio
|
||||
*
|
||||
* Description:
|
||||
* Configure a GPIO pin based on bit-encoded description of the pin (the interrupt
|
||||
* will be configured when pic32mx_attach() is called).
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; negated errno on failure.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
EXTERN int pic32mx_configgpio(uint16_t cfgset);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_gpiowrite
|
||||
*
|
||||
* Description:
|
||||
* Write one or zero to the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
EXTERN void pic32mx_gpiowrite(uint16_t pinset, bool value);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_gpioread
|
||||
*
|
||||
* Description:
|
||||
* Read one or zero from the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
EXTERN bool pic32mx_gpioread(uint16_t pinset);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_gpioirqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize logic to support a GPIO change notification interrupts. This
|
||||
* function is called internally by the system on power up and should not be
|
||||
* called again.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
EXTERN void pic32mx_gpioirqinitialize(void);
|
||||
#else
|
||||
# define pic32mx_gpioirqinitialize()
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_gpioattach
|
||||
*
|
||||
* Description:
|
||||
* Attach an interrupt service routine to a GPIO interrupt. This will also
|
||||
* reconfigure the pin as an interrupting input. The change notification number is
|
||||
* associated with all interrupt-capabile GPIO pins. The association could,
|
||||
* however, differ from part to part and must be provided by the caller.
|
||||
*
|
||||
* When an interrupt occurs, it is due to a change on the GPIO input pin. In that
|
||||
* case, all attached handlers will be called. Each handler must maintain state
|
||||
* and determine if the unlying GPIO input value changed.
|
||||
*
|
||||
* Parameters:
|
||||
* - pinset: GPIO pin configuration
|
||||
* - cn: The change notification number associated with the pin
|
||||
* - handler: Interrupt handler (may be NULL to detach)
|
||||
*
|
||||
* Returns:
|
||||
* The previous value of the interrupt handler function pointer. This value may,
|
||||
* for example, be used to restore the previous handler when multiple handlers are
|
||||
* used.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
EXTERN xcpt_t pic32mx_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler);
|
||||
#else
|
||||
# define pic32mx_gpioattach(p,f) (NULL)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_gpioirqenable
|
||||
*
|
||||
* Description:
|
||||
* Enable the interrupt for specified GPIO IRQ
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
EXTERN void pic32mx_gpioirqenable(unsigned int cn);
|
||||
#else
|
||||
# define pic32mx_gpioirqenable(irq)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_gpioirqdisable
|
||||
*
|
||||
* Description:
|
||||
* Disable the interrupt for specified GPIO IRQ
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
EXTERN void pic32mx_gpioirqdisable(unsigned int cn);
|
||||
#else
|
||||
# define pic32mx_gpioirqdisable(irq)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Function: pic32mx_dumpgpio
|
||||
*
|
||||
* Description:
|
||||
* Dump all GPIO registers associated with the provided base address
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_GPIO
|
||||
EXTERN void pic32mx_dumpgpio(uint32_t pinset, const char *msg);
|
||||
#else
|
||||
# define pic32mx_dumpgpio(p,m)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: pic32mx_spiNselect, pic32mx_spiNstatus, and pic32mx_spiNcmddata
|
||||
*
|
||||
|
||||
@ -42,6 +42,7 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "pic32mx-memorymap.h"
|
||||
|
||||
/********************************************************************************************
|
||||
@ -265,6 +266,14 @@
|
||||
|
||||
#define IOPORT_CNPUE(n) (1 << (n)) /* Bits 0-18/21: Port pin pull-up enabled */
|
||||
|
||||
#if defined(CHIP_PIC32MX3) || defined(CHIP_PIC32MX4)
|
||||
# define IOPORT_CN_ALL 0x0007ffff /* Bits 0-18 */
|
||||
# define IOPORT_NUMCN 19
|
||||
#elif defined(CHIP_PIC32MX5) || defined(CHIP_PIC32MX6) || defined(CHIP_PIC32MX7)
|
||||
# define IOPORT_CN_ALL 0x003fffff /* Bits 0-21 */
|
||||
# define IOPORT_NUMCN 22
|
||||
#endif
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Types
|
||||
********************************************************************************************/
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
* arch/mips/src/chip/pic32mx-irq.c
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@ -124,6 +124,12 @@ void up_irqinitialize(void)
|
||||
putreg32(INT_INTCON_MVEC, PIC32MX_INT_INTCONCLR);
|
||||
#endif
|
||||
|
||||
/* Initialize GPIO change notifiction handling */
|
||||
|
||||
#ifdef CONFIG_GPIO_IRQ
|
||||
pic32mx_gpioirqinitialize();
|
||||
#endif
|
||||
|
||||
/* currents_regs is non-NULL only while processing an interrupt */
|
||||
|
||||
current_regs = NULL;
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
* include/arch/board/board.h
|
||||
*
|
||||
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
|
||||
@ -102,6 +102,24 @@
|
||||
#define LED_SIGNAL 4 /* N/C N/C ON N/C N/C N/C OFF N/C */
|
||||
#define LED_ASSERTION 4 /* N/C N/C ON N/C N/C N/C OFF N/C */
|
||||
#define LED_PANIC 5 /* N/C N/C N/C ON N/C N/C N/C OFF */
|
||||
#define LED_NVALUES 6
|
||||
|
||||
/* Button Definitions *******************************************************/
|
||||
/* The Sure PIC32MX board has three buttons.
|
||||
*
|
||||
* SW1 (SW_UP, left arrow) RB3 Pulled high, Grounded/low when depressed
|
||||
* SW2 (SW_DOWN, down/right arrow) RB2 Pulled high, Grounded/low when depressed
|
||||
* SW3 (SW_OK, right arrow) RB4 Pulled high, Grounded/low when depressed
|
||||
*/
|
||||
|
||||
#define BUTTON_SW1 0
|
||||
#define BUTTON_SW2 1
|
||||
#define BUTTON_SW3 2
|
||||
#define NUM_BUTTONS 3
|
||||
|
||||
#define BUTTON_SW1_BIT (1 << BUTTON_SW1)
|
||||
#define BUTTON_SW2_BIT (1 << BUTTON_SW2)
|
||||
#define BUTTON_SW3_BIT (1 << BUTTON_SW3)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
@ -124,6 +142,42 @@ extern "C" {
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Button support.
|
||||
*
|
||||
* Description:
|
||||
* up_buttoninit() must be called to initialize button resources. After
|
||||
* that, up_buttons() may be called to collect the current state of all
|
||||
* buttons or up_irqbutton() may be called to register button interrupt
|
||||
* handlers.
|
||||
*
|
||||
* After up_buttoninit() has been called, up_buttons() may be called to
|
||||
* collect the state of all buttons. up_buttons() returns an 8-bit bit set
|
||||
* with each bit associated with a button. See the BUTTON_*_BIT
|
||||
* definitions in board.h for the meaning of each bit.
|
||||
*
|
||||
* up_irqbutton() may be called to register an interrupt handler that will
|
||||
* be called when a button is depressed or released. The ID value is a
|
||||
* button enumeration value that uniquely identifies a button resource.
|
||||
* See the BUTTON_* definitions in board.h for the meaning of enumeration
|
||||
* value. The previous interrupt handler address is returned (so that it
|
||||
* may restored, if so desired).
|
||||
*
|
||||
* When an interrupt occurs, it is due to a change on the GPIO input pin
|
||||
* associated with the button. In that case, all attached change
|
||||
* notification handlers will be called. Each handler must maintain state
|
||||
* and determine if the unlying GPIO button input value changed.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_BUTTONS
|
||||
EXTERN void up_buttoninit(void);
|
||||
EXTERN uint8_t up_buttons(void);
|
||||
#ifdef CONFIG_ARCH_IRQBUTTONS
|
||||
EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
# configs/sure-pic32mx/src/Makefile
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
@ -44,6 +44,10 @@ ifeq ($(CONFIG_ARCH_LEDS),y)
|
||||
CSRCS += up_leds.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_BUTTONS),y)
|
||||
CSRCS += up_buttons.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_NSH_ARCHINIT),y)
|
||||
CSRCS += up_nsh.c
|
||||
endif
|
||||
|
||||
210
configs/sure-pic32mx/src/up_buttons.c
Normal file
210
configs/sure-pic32mx/src/up_buttons.c
Normal file
@ -0,0 +1,210 @@
|
||||
/****************************************************************************
|
||||
* configs/sure-pic32mx/src/up_buttons.c
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "pic32mx-internal.h"
|
||||
#include "pic32mx-ioport.h"
|
||||
#include "pic32mx-adc.h"
|
||||
#include "sure-internal.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_BUTTONS
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
****************************************************************************/
|
||||
/* The Sure PIC32MX board has three buttons.
|
||||
*
|
||||
* SW1 (SW_UP, left arrow) RB3 Pulled high, Grounded/low when depressed
|
||||
* SW2 (SW_DOWN, down/right arrow) RB2 Pulled high, Grounded/low when depressed
|
||||
* SW3 (SW_OK, right arrow) RB4 Pulled high, Grounded/low when depressed
|
||||
*
|
||||
* Internal pull-ups are not required since the LEDs are pull-up externally.
|
||||
* Change notification interrupts are not *automatically* enabled. Change
|
||||
* notification will be enabled when pic32mx_gpioattach() is called.
|
||||
*/
|
||||
|
||||
#define GPIO_SW1 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN_3)
|
||||
#define GPIO_SW2 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN_2)
|
||||
#define GPIO_SW3 (GPIO_INPUT|GPIO_INT|GPIO_PORTB|GPIO_PIN_4)
|
||||
|
||||
/* Change notification numbers:
|
||||
* RB3 -> CN5
|
||||
* RB2 -> CN2
|
||||
* RB4 -> CN6
|
||||
*/
|
||||
|
||||
#define CN_SW1 5
|
||||
#define CN_SW2 2
|
||||
#define CN_SW3 6
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* Pin configuration for each button */
|
||||
|
||||
static const uint16_t g_buttonset[NUM_BUTTONS] =
|
||||
{
|
||||
BUTTON_SW1 BUTTON_SW2, BUTTON_SW3
|
||||
}
|
||||
|
||||
/* Change notification number for each button */
|
||||
|
||||
#ifdef CONFIG_ARCH_IRQBUTTONS
|
||||
static const uint8_t g_buttoncn[NUM_BUTTONS] =
|
||||
{
|
||||
CN_SW1, CN_SW2, CN_SW3
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_buttoninit
|
||||
*
|
||||
* Description:
|
||||
* up_buttoninit() must be called to initialize button resources. After
|
||||
* that, up_buttons() may be called to collect the current state of all
|
||||
* buttons or up_irqbutton() may be called to register button interrupt
|
||||
* handlers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_buttoninit(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Configure input pins */
|
||||
|
||||
for (i = 0; i < NUM_BUTTONS; i++)
|
||||
{
|
||||
pic32mx_configgpio(g_buttonset[i]);
|
||||
}
|
||||
|
||||
/* Change AN2/AN3/AN4 to digital */
|
||||
|
||||
putreg32(0xffff, PIC32MX_ADC_CFG);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_buttons
|
||||
****************************************************************************/
|
||||
|
||||
uint8_t up_buttons(void)
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
int id;
|
||||
|
||||
/* Configure input pins */
|
||||
|
||||
for (id = 0; id < NUM_BUTTONS; id++)
|
||||
{
|
||||
if (pic32mx_gpioread(g_buttonset[id]))
|
||||
{
|
||||
ret |= (1 << id);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Button support.
|
||||
*
|
||||
* Description:
|
||||
* up_buttoninit() must be called to initialize button resources. After
|
||||
* that, up_buttons() may be called to collect the current state of all
|
||||
* buttons or up_irqbutton() may be called to register button interrupt
|
||||
* handlers.
|
||||
*
|
||||
* After up_buttoninit() has been called, up_buttons() may be called to
|
||||
* collect the state of all buttons. up_buttons() returns an 8-bit bit set
|
||||
* with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT
|
||||
* definitions in board.h for the meaning of each bit.
|
||||
*
|
||||
* up_irqbutton() may be called to register an interrupt handler that will
|
||||
* be called when a button is depressed or released. The ID value is a
|
||||
* button enumeration value that uniquely identifies a button resource. See the
|
||||
* BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
|
||||
* value. The previous interrupt handler address is returned (so that it may
|
||||
* restored, if so desired).
|
||||
*
|
||||
* Interrupts are automatically enabled when the button handler is attached and
|
||||
* automatically disabled when the button handler is detached.
|
||||
*
|
||||
* When an interrupt occurs, it is due to a change on the GPIO input pin
|
||||
* associated with the button. In that case, all attached change
|
||||
* notification handlers will be called. Each handler must maintain state
|
||||
* and determine if the unlying GPIO button input value changed.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_IRQBUTTONS
|
||||
xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
|
||||
{
|
||||
xcpt_t oldhandler = NULL;
|
||||
|
||||
if (id < NUM_BUTTONS)
|
||||
{
|
||||
oldhandler = pic32mx_gpioattach(g_buttonset[id], g_buttoncn[id], irqhandler);
|
||||
if (irqbuttron)
|
||||
{
|
||||
pic32mx_gpioirqenable(g_buttoncn[id]);
|
||||
}
|
||||
}
|
||||
return oldhandler;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_ARCH_BUTTONS */
|
||||
@ -3,7 +3,7 @@
|
||||
* arch/arm/src/board/up_leds.c
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@ -51,6 +51,7 @@
|
||||
#include "up_internal.h"
|
||||
|
||||
#include "pic32mx-internal.h"
|
||||
#include "pic32mx-ioport.h"
|
||||
#include "sure-internal.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
@ -58,6 +59,7 @@
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
****************************************************************************/
|
||||
/* LED Configuration ********************************************************/
|
||||
/* The Sure PIC32MX board has five LEDs. One (D4, lablel "Power") is not
|
||||
* controllable by software. Four are controllable by software:
|
||||
*
|
||||
@ -78,6 +80,18 @@
|
||||
* LED_PANIC 5 N/C N/C N/C ON N/C N/C N/C OFF
|
||||
*/
|
||||
|
||||
#define GPIO_USB_LED (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN7)
|
||||
#define GPIO_SD_LED (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN8)
|
||||
#define GPIO_FLASH_LED (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN9)
|
||||
#define GPIO_ERROR_LED (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTD|GPIO_PIN10)
|
||||
|
||||
/* LED Management Definitions ***********************************************/
|
||||
|
||||
#define LED_OFF 0
|
||||
#define LED_ON 1
|
||||
#define LED_NC 2
|
||||
|
||||
/* Debug ********************************************************************/
|
||||
/* Enables debug output from this file (needs CONFIG_DEBUG with
|
||||
* CONFIG_DEBUG_VERBOSE too)
|
||||
*/
|
||||
@ -99,13 +113,72 @@
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private types
|
||||
****************************************************************************/
|
||||
|
||||
struct led_setting_s
|
||||
{
|
||||
uint8_t usb : 2;
|
||||
uint8_t sd : 2;
|
||||
uint8_t flash : 2;
|
||||
uint8_t error : 2;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static const g_ledonvalues[LED_NVALUES] =
|
||||
{
|
||||
{LED_OFF, LED_OFF, LED_OFF, LED_OFF},
|
||||
{LED_ON, LED_OFF, LED_NC, LED_NC},
|
||||
{LED_OFF, LED_ON, LED_NC, LED_NC},
|
||||
{LED_ON, LED_ON, LED_NC, LED_NC},
|
||||
{LED_NC, LED_NC, LED_ON, LED_NC},
|
||||
{LED_NC, LED_NC, LED_NC, LED_ON},
|
||||
};
|
||||
|
||||
static const g_ledoffvalues[LED_NVALUES] =
|
||||
{
|
||||
{LED_NC, LED_NC, LED_NC, LED_NC},
|
||||
{LED_NC, LED_NC, LED_NC, LED_NC},
|
||||
{LED_NC, LED_NC, LED_NC, LED_NC},
|
||||
{LED_NC, LED_NC, LED_NC, LED_NC},
|
||||
{LED_NC, LED_NC, LED_OFF, LED_NC},
|
||||
{LED_NC, LED_NC, LED_NC, LED_OFF}
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_ledinit
|
||||
****************************************************************************/
|
||||
|
||||
void up_setleds(struct led_setting_s *setting)
|
||||
{
|
||||
if (setting->usb != LED_NC)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_USB_LED, setting->usb != LED_ON);
|
||||
}
|
||||
|
||||
if (setting->sd != LED_NC)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_SD_LED, setting->sd != LED_ON);
|
||||
}
|
||||
|
||||
if (setting->flash != LED_NC)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_FLASH_LED, setting->flash != LED_ON);
|
||||
}
|
||||
|
||||
if (setting->error != LED_NC)
|
||||
{
|
||||
pic32mx_gpiowrite(GPIO_ERROR_LED, setting->error != LED_ON);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@ -116,7 +189,12 @@
|
||||
|
||||
void up_ledinit(void)
|
||||
{
|
||||
#warning "Missing logic"
|
||||
/* Configure output pins */
|
||||
|
||||
pic32mx_configgpio(GPIO_USB_LED);
|
||||
pic32mx_configgpio(GPIO_SD_LED);
|
||||
pic32mx_configgpio(GPIO_FLASH_LED);
|
||||
pic32mx_configgpio(GPIO_ERROR_LED);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -125,7 +203,10 @@ void up_ledinit(void)
|
||||
|
||||
void up_ledon(int led)
|
||||
{
|
||||
#warning "Missing logic"
|
||||
if (led < LED_NVALUES)
|
||||
{
|
||||
up_setleds(&g_ledonvalues[led]);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -134,6 +215,9 @@ void up_ledon(int led)
|
||||
|
||||
void up_ledoff(int led)
|
||||
{
|
||||
#warning "Missing logic"
|
||||
if (led < LED_NVALUES)
|
||||
{
|
||||
up_setleds(&g_ledoffvalues[led]);
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_ARCH_LEDS */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user