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arch:Mark key functions to prohibit instrumentation to prevent recursive calls

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Signed-off-by: anjiahao <anjiahao@xiaomi.com>
This commit is contained in:
anjiahao 2023-10-25 20:11:20 +08:00 committed by Xiang Xiao
parent d932e0af2a
commit 94d449e722
10 changed files with 27 additions and 21 deletions
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4
arch/arm/include/armv7-a/irq.h
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@ -350,7 +350,7 @@ static inline irqstate_t irqstate(void)
/* Disable IRQs and return the previous IRQ state */ /* Disable IRQs and return the previous IRQ state */
static inline irqstate_t up_irq_save(void) noinstrument_function static inline irqstate_t up_irq_save(void)
{ {
unsigned int cpsr; unsigned int cpsr;
@ -392,7 +392,7 @@ static inline irqstate_t up_irq_enable(void)
/* Restore saved IRQ & FIQ state */ /* Restore saved IRQ & FIQ state */
static inline void up_irq_restore(irqstate_t flags) noinstrument_function static inline void up_irq_restore(irqstate_t flags)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (

6
arch/arm/include/armv7-m/irq.h
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@ -394,7 +394,8 @@ static inline void up_irq_disable(void)
/* Save the current primask state & disable IRQs */ /* Save the current primask state & disable IRQs */
static inline irqstate_t up_irq_save(void) always_inline_function; static inline irqstate_t up_irq_save(void)
always_inline_function noinstrument_function;
static inline irqstate_t up_irq_save(void) static inline irqstate_t up_irq_save(void)
{ {
#ifdef CONFIG_ARMV7M_USEBASEPRI #ifdef CONFIG_ARMV7M_USEBASEPRI
@ -437,7 +438,8 @@ static inline void up_irq_enable(void)
/* Restore saved primask state */ /* Restore saved primask state */
static inline void up_irq_restore(irqstate_t flags) always_inline_function; static inline void up_irq_restore(irqstate_t flags)
always_inline_function noinstrument_function;
static inline void up_irq_restore(irqstate_t flags) static inline void up_irq_restore(irqstate_t flags)
{ {
#ifdef CONFIG_ARMV7M_USEBASEPRI #ifdef CONFIG_ARMV7M_USEBASEPRI

6
arch/arm/include/armv8-m/irq.h
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@ -367,7 +367,8 @@ static inline void up_irq_disable(void)
/* Save the current primask state & disable IRQs */ /* Save the current primask state & disable IRQs */
static inline irqstate_t up_irq_save(void) always_inline_function; static inline irqstate_t up_irq_save(void)
always_inline_function noinstrument_function;
static inline irqstate_t up_irq_save(void) static inline irqstate_t up_irq_save(void)
{ {
#ifdef CONFIG_ARMV8M_USEBASEPRI #ifdef CONFIG_ARMV8M_USEBASEPRI
@ -410,7 +411,8 @@ static inline void up_irq_enable(void)
/* Restore saved primask state */ /* Restore saved primask state */
static inline void up_irq_restore(irqstate_t flags) always_inline_function; static inline void up_irq_restore(irqstate_t flags)
always_inline_function noinstrument_function;
static inline void up_irq_restore(irqstate_t flags) static inline void up_irq_restore(irqstate_t flags)
{ {
#ifdef CONFIG_ARMV8M_USEBASEPRI #ifdef CONFIG_ARMV8M_USEBASEPRI

3
arch/arm/include/irq.h
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@ -116,7 +116,7 @@ EXTERN volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
int up_cpu_index(void); int up_cpu_index(void) noinstrument_function;
#else #else
# define up_cpu_index() (0) # define up_cpu_index() (0)
#endif #endif
@ -134,6 +134,7 @@ int up_cpu_index(void);
* *
****************************************************************************/ ****************************************************************************/
noinstrument_function
static inline bool up_interrupt_context(void) static inline bool up_interrupt_context(void)
{ {
#ifdef CONFIG_SMP #ifdef CONFIG_SMP

1
arch/arm/src/armv7-a/sctlr.h
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@ -463,6 +463,7 @@ static inline unsigned int cp15_rdid(void)
/* Get the Multiprocessor Affinity Register (MPIDR) */ /* Get the Multiprocessor Affinity Register (MPIDR) */
noinstrument_function
static inline unsigned int cp15_rdmpidr(void) static inline unsigned int cp15_rdmpidr(void)
{ {
return CP15_GET(MPIDR); return CP15_GET(MPIDR);

6
arch/risc-v/include/irq.h
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@ -680,7 +680,7 @@ int up_cpu_index(void);
* *
****************************************************************************/ ****************************************************************************/
static inline irqstate_t up_irq_save(void) noinstrument_function static inline irqstate_t up_irq_save(void)
{ {
irqstate_t flags; irqstate_t flags;
@ -709,7 +709,7 @@ static inline irqstate_t up_irq_save(void)
* *
****************************************************************************/ ****************************************************************************/
static inline void up_irq_restore(irqstate_t flags) noinstrument_function static inline void up_irq_restore(irqstate_t flags)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (
@ -729,7 +729,7 @@ static inline void up_irq_restore(irqstate_t flags)
* *
****************************************************************************/ ****************************************************************************/
static inline bool up_interrupt_context(void) noinstrument_function static inline bool up_interrupt_context(void)
{ {
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
irqstate_t flags = up_irq_save(); irqstate_t flags = up_irq_save();

10
arch/xtensa/include/irq.h
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@ -236,7 +236,7 @@ static inline uint32_t xtensa_getps(void)
/* Set the value of the PS register */ /* Set the value of the PS register */
static inline void xtensa_setps(uint32_t ps) noinstrument_function static inline void xtensa_setps(uint32_t ps)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (
@ -265,7 +265,7 @@ static inline uint32_t up_getsp(void)
/* Restore the value of the PS register */ /* Restore the value of the PS register */
static inline void up_irq_restore(uint32_t ps) noinstrument_function static inline void up_irq_restore(uint32_t ps)
{ {
__asm__ __volatile__ __asm__ __volatile__
( (
@ -279,7 +279,7 @@ static inline void up_irq_restore(uint32_t ps)
/* Disable interrupts and return the previous value of the PS register */ /* Disable interrupts and return the previous value of the PS register */
static inline uint32_t up_irq_save(void) noinstrument_function static inline uint32_t up_irq_save(void)
{ {
uint32_t ps; uint32_t ps;
@ -313,7 +313,7 @@ static inline void up_irq_enable(void)
/* Disable low- and medium- priority interrupts */ /* Disable low- and medium- priority interrupts */
static inline void up_irq_disable(void) noinstrument_function static inline void up_irq_disable(void)
{ {
#ifdef __XTENSA_CALL0_ABI__ #ifdef __XTENSA_CALL0_ABI__
xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
@ -440,7 +440,7 @@ int up_cpu_index(void);
****************************************************************************/ ****************************************************************************/
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
static inline bool up_interrupt_context(void) noinstrument_function static inline bool up_interrupt_context(void)
{ {
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
irqstate_t flags = up_irq_save(); irqstate_t flags = up_irq_save();

6
arch/xtensa/src/esp32s3/esp32s3_start.c
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@ -170,7 +170,7 @@ uint32_t g_idlestack[IDLETHREAD_STACKWORDS]
* *
****************************************************************************/ ****************************************************************************/
static void IRAM_ATTR configure_cpu_caches(void) noinstrument_function static void IRAM_ATTR configure_cpu_caches(void)
{ {
int s_instr_flash2spiram_off = 0; int s_instr_flash2spiram_off = 0;
int s_rodata_flash2spiram_off = 0; int s_rodata_flash2spiram_off = 0;
@ -272,7 +272,7 @@ static void IRAM_ATTR disable_app_cpu(void)
* *
****************************************************************************/ ****************************************************************************/
void noreturn_function IRAM_ATTR __esp32s3_start(void) noinstrument_function void noreturn_function IRAM_ATTR __esp32s3_start(void)
{ {
uint32_t sp; uint32_t sp;
@ -508,7 +508,7 @@ static int map_rom_segments(void)
* *
****************************************************************************/ ****************************************************************************/
void IRAM_ATTR __start(void) noinstrument_function void IRAM_ATTR __start(void)
{ {
#ifdef CONFIG_ESP32S3_APP_FORMAT_MCUBOOT #ifdef CONFIG_ESP32S3_APP_FORMAT_MCUBOOT
if (map_rom_segments() != 0) if (map_rom_segments() != 0)

4
include/nuttx/irq.h
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@ -184,7 +184,7 @@ int irqchain_detach(int irq, xcpt_t isr, FAR void *arg);
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_IRQCOUNT #ifdef CONFIG_IRQCOUNT
irqstate_t enter_critical_section(void); irqstate_t enter_critical_section(void) noinstrument_function;
#else #else
# define enter_critical_section() up_irq_save() # define enter_critical_section() up_irq_save()
#endif #endif
@ -214,7 +214,7 @@ irqstate_t enter_critical_section(void);
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_IRQCOUNT #ifdef CONFIG_IRQCOUNT
void leave_critical_section(irqstate_t flags); void leave_critical_section(irqstate_t flags) noinstrument_function;
#else #else
# define leave_critical_section(f) up_irq_restore(f) # define leave_critical_section(f) up_irq_restore(f)
#endif #endif

2
sched/sched/sched.h
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@ -381,7 +381,7 @@ void nxsched_suspend(FAR struct tcb_s *tcb);
#endif #endif
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
FAR struct tcb_s *this_task(void); FAR struct tcb_s *this_task(void) noinstrument_function;
int nxsched_select_cpu(cpu_set_t affinity); int nxsched_select_cpu(cpu_set_t affinity);
int nxsched_pause_cpu(FAR struct tcb_s *tcb); int nxsched_pause_cpu(FAR struct tcb_s *tcb);