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xtensa/esp32: Uniformize Kconfig alignment and styling

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This commit is contained in:
Gustavo Henrique Nihei 2021-04-27 18:17:54 -03:00 committed by patacongo
parent 03c8e2d5c7
commit 95a76adc90
1 changed files with 85 additions and 75 deletions
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160
arch/xtensa/src/esp32/Kconfig
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@ -110,7 +110,7 @@ config ESP32_FLASH_16M
config ESP32_FLASH_DETECT
bool "Auto-detect FLASH size"
default y
help
---help---
Auto detect flash size when flashing.
config ESP32_PSRAM_8M
@ -138,57 +138,60 @@ config ESP32_ESP32DXWDXX
choice ESP32_FLASH_MODE
prompt "SPI FLASH mode"
default ESP32_FLASH_MODE_DIO
help
---help---
These options control how many I/O pins are used for communication with the attached SPI flash chip.
The option selected here is then used by esptool when flashing.
config ESP32_FLASH_MODE_DIO
bool "Dual IO (DIO)"
config ESP32_FLASH_MODE_DIO
bool "Dual IO (DIO)"
config ESP32_FLASH_MODE_DOUT
bool "Dual Output (DOUT)"
config ESP32_FLASH_MODE_DOUT
bool "Dual Output (DOUT)"
config ESP32_FLASH_MODE_QIO
bool "Quad IO (QIO)"
config ESP32_FLASH_MODE_QIO
bool "Quad IO (QIO)"
config ESP32_FLASH_MODE_QOUT
bool "Quad Output (QOUT)"
config ESP32_FLASH_MODE_QOUT
bool "Quad Output (QOUT)"
endchoice # ESP32_FLASH_MODE
choice ESP32_FLASH_FREQ
prompt "SPI FLASH frequency"
default ESP32_FLASH_FREQ_40M
help
---help---
SPI FLASH frequency
config ESP32_FLASH_FREQ_80M
bool "80 MHz"
config ESP32_FLASH_FREQ_40M
bool "40 MHz"
config ESP32_FLASH_FREQ_80M
bool "80 MHz"
config ESP32_FLASH_FREQ_26M
bool "26 MHz"
config ESP32_FLASH_FREQ_40M
bool "40 MHz"
config ESP32_FLASH_FREQ_20M
bool "20 MHz"
config ESP32_FLASH_FREQ_26M
bool "26 MHz"
config ESP32_FLASH_FREQ_20M
bool "20 MHz"
endchoice # ESP32_FLASH_FREQ
choice ESP32_DEFAULT_CPU_FREQ
prompt "CPU frequency"
default ESP32_DEFAULT_CPU_FREQ_240
help
---help---
CPU frequency to be set on application startup.
config ESP32_DEFAULT_CPU_FREQ_80
bool "80 MHz"
config ESP32_DEFAULT_CPU_FREQ_160
bool "160 MHz"
config ESP32_DEFAULT_CPU_FREQ_240
bool "240 MHz"
endchoice # CPU frequency
config ESP32_DEFAULT_CPU_FREQ_80
bool "80 MHz"
config ESP32_DEFAULT_CPU_FREQ_160
bool "160 MHz"
config ESP32_DEFAULT_CPU_FREQ_240
bool "240 MHz"
endchoice # ESP32_DEFAULT_CPU_FREQ
config ESP32_DEFAULT_CPU_FREQ_MHZ
int
@ -357,14 +360,16 @@ if ESP32_SPIRAM && SMP
choice
prompt "How does SPIRAM share cache?"
default ESP32_MEMMAP_SPIRAM_CACHE_EVENODD
help
---help---
Selects the cache mode to CPU access the external memory.
config ESP32_MEMMAP_SPIRAM_CACHE_EVENODD
bool "Pro CPU uses even 32 byte ranges, App uses odd ones"
config ESP32_MEMMAP_SPIRAM_CACHE_LOWHIGH
bool "Pro CPU uses low 2MB ranges, App uses high ones"
endchoice # CPU frequency
config ESP32_MEMMAP_SPIRAM_CACHE_EVENODD
bool "Pro CPU uses even 32 byte ranges, App uses odd ones"
config ESP32_MEMMAP_SPIRAM_CACHE_LOWHIGH
bool "Pro CPU uses low 2MB ranges, App uses high ones"
endchoice # How does SPIRAM share cache?
endif
@ -542,6 +547,7 @@ config ESP32_UART1_RXPIN
range 0 39
if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL
config ESP32_UART1_RTSPIN
int "UART1 RTS Pin"
default 11
@ -553,6 +559,7 @@ config ESP32_UART1_CTSPIN
range 0 39
endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL
endif # ESP32_UART1
if ESP32_UART2
@ -568,6 +575,7 @@ config ESP32_UART2_RXPIN
range 0 39
if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL
config ESP32_UART2_RTSPIN
int "UART2 RTS Pin"
default 7
@ -579,6 +587,7 @@ config ESP32_UART2_CTSPIN
range 0 39
endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL
endif # ESP32_UART2
endmenu # UART configuration
@ -715,20 +724,20 @@ menu "SPI Flash configuration"
config ESP32_MTD_OFFSET
hex "MTD base address in SPI Flash"
default 0x180000
help
---help---
MTD base address in SPI Flash.
config ESP32_MTD_SIZE
hex "MTD size in SPI Flash"
default 0x100000
help
---help---
MTD size in SPI Flash.
config ESP32_SPIFLASH_DEBUG
bool "Debug SPI Flash"
default n
depends on DEBUG_FS_INFO
help
---help---
Enable this option, read and write of SPI Flash
will show input arguments and result.
@ -749,7 +758,8 @@ config ESP32_SPIRAM_TYPE_ESPPSRAM32
config ESP32_SPIRAM_TYPE_ESPPSRAM64
bool "ESP-PSRAM64 or LY68L6400"
endchoice #ESP32_SPIRAM_TYPE
endchoice # ESP32_SPIRAM_TYPE
config ESP32_SPIRAM_SIZE
int
@ -761,8 +771,8 @@ config ESP32_SPIRAM_SIZE
choice ESP32_SPIRAM_SPEED
prompt "Set RAM clock speed"
default ESP32_SPIRAM_SPEED_40M
help
Select the speed for the SPI RAM chip.
---help---
Select the speed for the SPI RAM chip.
config ESP32_SPIRAM_SPEED_40M
bool "40MHz clock speed"
@ -776,39 +786,39 @@ config ESP32_SPIRAM_BOOT_INIT
bool "Initialize SPI RAM during startup"
depends on ESP32_SPIRAM
default "y"
help
If this is enabled, the SPI RAM will be enabled during initial
boot. Unless you have specific requirements, you'll want to leave
this enabled so memory allocated during boot-up can also be
placed in SPI RAM.
---help---
If this is enabled, the SPI RAM will be enabled during initial
boot. Unless you have specific requirements, you'll want to leave
this enabled so memory allocated during boot-up can also be
placed in SPI RAM.
config ESP32_SPIRAM_IGNORE_NOTFOUND
bool "Ignore PSRAM when not found"
default "n"
depends on ESP32_SPIRAM_BOOT_INIT && !BOOT_SDRAM_DATA
help
Normally, if psram initialization is enabled during compile time
but not found at runtime, it is seen as an error making the CPU
panic. If this is enabled, booting will complete but no PSRAM
will be available.
---help---
Normally, if psram initialization is enabled during compile time
but not found at runtime, it is seen as an error making the CPU
panic. If this is enabled, booting will complete but no PSRAM
will be available.
config ESP32_SPIRAM_2T_MODE
bool "Enable SPI PSRAM 2T mode"
depends on ESP32_SPIRAM
default "n"
help
Enable this option to fix single bit errors inside 64Mbit PSRAM.
Some 64Mbit PSRAM chips have a hardware issue in the RAM which
causes bit errors at multiple fixed bit positions.
Note: If this option is enabled, the 64Mbit PSRAM chip will appear
to be 32Mbit in size.
Applications will not be affected unless the use the esp_himem
APIs, which are not supported in 2T mode.
---help---
Enable this option to fix single bit errors inside 64Mbit PSRAM.
Some 64Mbit PSRAM chips have a hardware issue in the RAM which
causes bit errors at multiple fixed bit positions.
Note: If this option is enabled, the 64Mbit PSRAM chip will appear
to be 32Mbit in size.
Applications will not be affected unless the use the esp_himem
APIs, which are not supported in 2T mode.
config ESP32_SPIRAM_BANKSWITCH_ENABLE
bool "Enable bank switching for >4MiB external RAM"
default n
help
---help---
The ESP32 only supports 4MiB of external RAM in its address
space. The hardware does support larger memories, but these
have to be bank-switched in and out of this address space.
@ -827,7 +837,7 @@ config SPIRAM_BANKSWITCH_RESERVE
depends on ESP32_SPIRAM_BANKSWITCH_ENABLE
default 8
range 1 62
help
---help---
Select the amount of banks reserved for bank switching. Note
that the amount of RAM allocatable with malloc will decrease
by 32K for each page reserved here.
@ -891,15 +901,15 @@ config ESP32_WIFI_STATION_SOFTAP_COEXISTENCE
endchoice # ESP32 WiFi mode
config ESP32_WIFI_STATIC_RXBUF_NUM
int "WiFi static RX buffer number"
int "WiFi static RX buffer number"
default 10
config ESP32_WIFI_DYNAMIC_RXBUF_NUM
int "WiFi dynamic RX buffer number"
int "WiFi dynamic RX buffer number"
default 32
config ESP32_WIFI_DYNAMIC_TXBUF_NUM
int "WiFi dynamic TX buffer number"
int "WiFi dynamic TX buffer number"
default 32
config ESP32_WIFI_TX_AMPDU
@ -911,7 +921,7 @@ config ESP32_WIFI_RX_AMPDU
default y
config ESP32_WIFI_RXBA_AMPDU_WZ
int "WiFi RX BA AMPDU windown size"
int "WiFi RX BA AMPDU windown size"
default 6
config ESP32_WLAN_PKTBUF_NUM
@ -921,36 +931,36 @@ config ESP32_WLAN_PKTBUF_NUM
config ESP32_WIFI_CONNECT_TIMEOUT
int "Connect timeout by second"
default 10
help
---help---
Max waiting time of connecting to AP.
config ESP32_WIFI_SCAN_RESULT_SIZE
int "Scan result buffer"
default 4096
help
---help---
Maximum scan result buffer size.
config ESP32_WIFI_SAVE_PARAM
bool "Save WiFi Parameters"
default n
help
---help---
If you enable this option, WiFi adapter parameters will be saved
into the file system instead of computing them each time.
These parameters mainly contains:
- SSID
- Password
- BSSID
- PMK(compute when connecting)
- Author mode
- MAC address
- WiFi hardware configuration parameters
- SSID
- Password
- BSSID
- PMK(compute when connecting)
- Author mode
- MAC address
- WiFi hardware configuration parameters
config ESP32_WIFI_FS_MOUNTPT
string "Save WiFi Parameters"
default "/mnt/esp/wifi"
depends on ESP32_WIFI_SAVE_PARAM
help
---help---
Mount point of WiFi storage file system.
config ESP32_WIFI_STA_DISCONNECT_PM