arch: Add xxx_tcbinfo.c to SoC level Make.defs
Fix build break with CONFIG_DEBUG_TCBINFO enabled. Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
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271518a5ff
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95b0c85f58
@ -59,7 +59,7 @@ CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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# Use common heap allocation for now (may need to be customized later)
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@ -59,7 +59,7 @@ CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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# Use common heap allocation for now (may need to be customized later)
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@ -28,7 +28,7 @@ CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c arm_interruptcontext
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CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
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CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
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CMN_CSRCS += arm_stackframe.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_usestack.c arm_vfork.c arm_puts.c
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CMN_CSRCS += arm_usestack.c arm_vfork.c arm_puts.c arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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@ -33,6 +33,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
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CMN_CSRCS += arm_svcall.c arm_vfork.c arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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@ -30,6 +30,7 @@ CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
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CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
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CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
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CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
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CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
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CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
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CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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@ -29,6 +29,7 @@ CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
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CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
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CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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@ -62,7 +62,7 @@ CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_initialstate.c arm_mmu.c
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CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
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CMN_CSRCS += arm_hostfs.c
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@ -31,7 +31,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
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CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_systemreset.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += arm_stackcheck.c
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@ -29,6 +29,7 @@ CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_releasepending.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_unblocktask.c arm_usestack.c
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CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_svcall.c arm_vfork.c
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CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += arm_stackcheck.c
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
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CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
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CMN_CSRCS += arm_switchcontext.c
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CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += arm_task_start.c arm_pthread_start.c
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
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CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
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CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_switchcontext.c
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CMN_CSRCS += arm_puts.c
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CMN_CSRCS += arm_puts.c arm_tcbinfo.c
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# CMN_CSRCS += up_dwt.c
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@ -31,7 +31,7 @@ CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_trigger_irq.c
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CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
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CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c arm_switchcontext.c
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CMN_CSRCS += arm_systemreset.c arm_puts.c
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CMN_CSRCS += arm_systemreset.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += arm_stackcheck.c
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@ -30,7 +30,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
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CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
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CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
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CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c
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CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
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CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
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CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_usestack.c arm_lowputs.c arm_vfork.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_puts.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_puts.c arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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@ -31,6 +31,7 @@ CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
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CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
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CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
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CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
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CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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@ -31,7 +31,7 @@ CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
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CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
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CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
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CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c
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CMN_CSRCS += arm_puts.c
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CMN_CSRCS += arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
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CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
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CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_etherstub.c
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CMN_CSRCS += arm_puts.c
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CMN_CSRCS += arm_puts.c arm_tcbinfo.c
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CHIP_ASRCS = moxart_lowputc.S
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
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CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
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CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c
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CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_systemreset.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_NRF52_SYSTIMER_SYSTICK),y)
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CMN_CSRCS += arm_systick.c nrf52_systick.c
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
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CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += arm_task_start.c arm_pthread_start.c
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@ -33,7 +33,7 @@ CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
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#CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
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CMN_CSRCS += phy62xx_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
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#CMN_CSRCS += arm_etherstub.c
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CMN_CSRCS += arm_switchcontext.c
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CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += arm_task_start.c arm_pthread_start.c
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
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CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
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@ -42,7 +42,7 @@ CMN_CSRCS += arm_itm_syslog.c arm_memfault.c arm_mpu.c arm_ramvec_attach.c
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CMN_CSRCS += arm_ramvec_initialize.c arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_signal_dispatch.c
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CMN_CSRCS += arm_stackcheck.c arm_svcall.c arm_systick.c arm_unblocktask.c
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CMN_CSRCS += arm_switchcontext.c
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CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
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# arch/arm/src/rtl8720c
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#
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@ -24,6 +24,7 @@ CMN_CSRCS = arm_allocateheap.c arm_exit.c arm_initialize.c arm_interruptcontext
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CMN_CSRCS += arm_lowputs.c arm_mdelay.c arm_modifyreg8.c arm_modifyreg16.c
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CMN_CSRCS += arm_modifyreg32.c arm_puts.c arm_releasestack.c arm_stackframe.c
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CMN_CSRCS += arm_task_start.c arm_udelay.c arm_usestack.c arm_vfork.c
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CMN_CSRCS += arm_tcbinfo.c
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += arm_checkstack.c
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@ -33,6 +33,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
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CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
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CMN_CSRCS += arm_tcbinfo.c
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ifneq ($(CONFIG_SMP),y)
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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@ -61,7 +61,7 @@ CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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# Configuration dependent C files
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@ -29,7 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
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CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
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CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
|
||||
|
@ -33,6 +33,7 @@ CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_trigger_irq.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_udelay.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
@ -34,6 +34,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_STM32_TICKLESS_SYSTICK),y)
|
||||
CMN_CSRCS += arm_systick.c
|
||||
|
@ -29,7 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
|
||||
|
@ -34,6 +34,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
@ -34,6 +34,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_udelay.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
@ -34,7 +34,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_puts.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
@ -39,7 +39,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_puts.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
@ -30,7 +30,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c
|
||||
CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
|
||||
CMN_CSRCS += arm_hostfs.c
|
||||
|
@ -31,7 +31,7 @@ CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
|
||||
CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S
|
||||
CMN_ASRCS += cp15_invalidate_dcache_all.S cp15_cache_size.S
|
||||
CMN_ASRCS += cp15_invalidate_dcache_all.S cp15_cache_size.S arm_tcbinfo.c
|
||||
|
||||
# Configuration dependent assembly language files
|
||||
|
||||
|
@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_udelay.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
|
||||
CMN_CSRCS += arm_stackcheck.c
|
||||
|
@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c riscv_mde
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_idle.c
|
||||
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -34,6 +34,7 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c riscv_idle.c
|
||||
CMN_CSRCS += riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -36,6 +36,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c riscv_mde
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c riscv_mde
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_idle.c
|
||||
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -34,6 +34,7 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c riscv_idle.c
|
||||
CMN_CSRCS += riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SMP), y)
|
||||
CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c riscv_cpustart.c
|
||||
|
@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c riscv_mde
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_idle.c
|
||||
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -31,7 +31,7 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_idle.c
|
||||
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_idle.c
|
||||
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c riscv_copyfullstate.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_idle.c
|
||||
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
|
Loading…
Reference in New Issue
Block a user