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Low uart fixes

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@710 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-02-18 18:53:07 +00:00
parent e6756626f8
commit 96565fd538
2 changed files with 46 additions and 3 deletions
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4
arch/z80/src/z8/z8_lowuart.c
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@ -102,7 +102,7 @@ void up_lowuartinit(void)
putreg8(0x00, PAADDR); putreg8(0x00, PAADDR);
putreg8(0x00, U0CTL1); /* no multi-processor operation mode */ putreg8(0x00, U0CTL1); /* no multi-processor operation mode */
putreg8(0x00, U0CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */ putreg8(0xc0, U0CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */
#elif defined(EZ8_UART1) && defined(CONFIG_UART1_SERIAL_CONSOLE) #elif defined(EZ8_UART1) && defined(CONFIG_UART1_SERIAL_CONSOLE)
/* Set the baudrate */ /* Set the baudrate */
@ -124,7 +124,7 @@ void up_lowuartinit(void)
putreg8(0x00, PDADDR); putreg8(0x00, PDADDR);
putreg8(0x00, U1CTL1); /* no multi-processor operation mode */ putreg8(0x00, U1CTL1); /* no multi-processor operation mode */
putreg8(0x00, U1CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */ putreg8(0xc0, U1CTL0); /* Transmit enable, Receive enable, no Parity, 1 Stop bit */
#endif #endif
} }
#endif /* CONFIG_USE_LOWUARTINIT */ #endif /* CONFIG_USE_LOWUARTINIT */

45
arch/z80/src/z8/z8_serial.c
View File

@ -290,6 +290,48 @@ static void z8_consoleput(ubyte ch)
putreg8(ch, priv->uartbase + Z8_UART_TXD); putreg8(ch, priv->uartbase + Z8_UART_TXD);
} }
/****************************************************************************
* Name: z8_uartconfigure
*
* Description:
* Configure hardware for UART functionality
*
****************************************************************************/
void z8_uartconfigure(void)
{
uint16 brg;
ubyte val;
/* Configure GPIO Port A pins 4 & 5 for alternate function */
putreg8(0x02, PAADDR);
val = getreg8(PACTL) | 0x30; /* Set bits in alternate function register */
putreg8(val, PACTL);
putreg8(0x07, PAADDR);
val = getreg8(PACTL) & 0xcf; /* Reset bits in alternate function set-1 register */
putreg8(val, PACTL);
putreg8(0x08, PAADDR);
val = getreg8(PACTL) & 0xcf; /* Reset bits in alternate function set-2 register */
putreg8(val, PACTL);
putreg8(0x00, PAADDR);
#ifdef EZ8_UART1
/* Configure GPIO Port D pins 4 & 5 for alternate function */
putreg8(0x02, PAADDR);
val = getreg8(PDCTL) | 0x30; /* Set bits in alternate function register */
putreg8(val, PDCTL);
putreg8(0x07, PDADDR);
val = getreg8(PDCTL) & 0xcf; /* Reset bits in alternate function set-1 register */
putreg8(val, PDCTL);
putreg8(0x08, PDADDR);
val = getreg8(PDCTL) & 0xcf; /* Reset bits in alternate function set-2 register */
putreg8(val, PDCTL);
putreg8(0x00, PDADDR);
#endif
}
/**************************************************************************** /****************************************************************************
* Name: z8_setup * Name: z8_setup
* *
@ -303,6 +345,7 @@ static int z8_setup(struct uart_dev_s *dev)
{ {
#ifndef CONFIG_SUPPRESS_UART_CONFIG #ifndef CONFIG_SUPPRESS_UART_CONFIG
struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv; struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv;
uint32 freq = get_freq();
uint32 brg; uint32 brg;
ubyte ctl0; ubyte ctl0;
ubyte ctl1; ubyte ctl1;
@ -311,7 +354,7 @@ static int z8_setup(struct uart_dev_s *dev)
* BRG = (freq + baud * 8)/(baud * 16) * BRG = (freq + baud * 8)/(baud * 16)
*/ */
brg = (_DEFCLK + (priv->baud << 3))/(priv->baud << 4); brg = (freq + (priv->baud << 3))/(priv->baud << 4);
putreg16((uint16)brg, priv->uartbase + Z8_UART_BR); putreg16((uint16)brg, priv->uartbase + Z8_UART_BR);
/* Configure STOP bits */ /* Configure STOP bits */