From 4c2c9898382e93a52cfd0f039e20797a07aeeab0 Mon Sep 17 00:00:00 2001 From: "Paul A. Patience" Date: Sun, 1 Nov 2015 17:09:11 -0500 Subject: [PATCH] STM32 PWM: Add support for multiple output channels --- arch/arm/src/stm32/Kconfig | 1610 ++++++++++++++++++++++++++- arch/arm/src/stm32/chip/stm32_tim.h | 12 +- arch/arm/src/stm32/stm32_pwm.c | 1182 ++++++++++++++++---- arch/arm/src/stm32/stm32_pwm.h | 839 +++++++++++++- 4 files changed, 3349 insertions(+), 294 deletions(-) diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 48e01e0efa..cfe4eb5d09 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -2486,15 +2486,137 @@ config STM32_TIM1_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM1_PWM + +config STM32_TIM1_MODE + int "TIM1 Mode" + default 0 + range 0 4 + ---help--- + Specifies the timer mode. + +if STM32_PWM_MULTICHAN + +config STM32_TIM1_CHANNEL1 + bool "TIM1 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM1_CHANNEL1 + +config STM32_TIM1_CH1MODE + int "TIM1 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM1_CH1OUT + bool "TIM1 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM1_CHANNEL1 + +config STM32_TIM1_CHANNEL2 + bool "TIM1 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM1_CHANNEL2 + +config STM32_TIM1_CH2MODE + int "TIM1 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM1_CH2OUT + bool "TIM1 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM1_CHANNEL2 + +config STM32_TIM1_CHANNEL3 + bool "TIM1 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM1_CHANNEL3 + +config STM32_TIM1_CH3MODE + int "TIM1 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM1_CH3OUT + bool "TIM1 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM1_CHANNEL3 + +config STM32_TIM1_CHANNEL4 + bool "TIM1 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM1_CHANNEL4 + +config STM32_TIM1_CH4MODE + int "TIM1 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM1_CH4OUT + bool "TIM1 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM1_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM1_CHANNEL int "TIM1 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM1_PWM ---help--- If TIM1 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM1_CHMODE + int "TIM1 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM1_PWM + config STM32_TIM2_PWM bool "TIM2 PWM" default n @@ -2508,15 +2630,137 @@ config STM32_TIM2_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM2_PWM + +config STM32_TIM2_MODE + int "TIM2 Mode" + default 0 + range 0 4 + ---help--- + Specifies the timer mode. + +if STM32_PWM_MULTICHAN + +config STM32_TIM2_CHANNEL1 + bool "TIM2 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM2_CHANNEL1 + +config STM32_TIM2_CH1MODE + int "TIM2 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM2_CH1OUT + bool "TIM2 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM2_CHANNEL1 + +config STM32_TIM2_CHANNEL2 + bool "TIM2 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM2_CHANNEL2 + +config STM32_TIM2_CH2MODE + int "TIM2 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM2_CH2OUT + bool "TIM2 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM2_CHANNEL2 + +config STM32_TIM2_CHANNEL3 + bool "TIM2 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM2_CHANNEL3 + +config STM32_TIM2_CH3MODE + int "TIM2 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM2_CH3OUT + bool "TIM2 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM2_CHANNEL3 + +config STM32_TIM2_CHANNEL4 + bool "TIM2 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM2_CHANNEL4 + +config STM32_TIM2_CH4MODE + int "TIM2 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM2_CH4OUT + bool "TIM2 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM2_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM2_CHANNEL int "TIM2 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM2_PWM ---help--- If TIM2 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM2_CHMODE + int "TIM2 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM2_PWM + config STM32_TIM3_PWM bool "TIM3 PWM" default n @@ -2530,15 +2774,137 @@ config STM32_TIM3_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM3_PWM + +config STM32_TIM3_MODE + int "TIM3 Mode" + default 0 + range 0 4 + ---help--- + Specifies the timer mode. + +if STM32_PWM_MULTICHAN + +config STM32_TIM3_CHANNEL1 + bool "TIM3 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM3_CHANNEL1 + +config STM32_TIM3_CH1MODE + int "TIM3 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM3_CH1OUT + bool "TIM3 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM3_CHANNEL1 + +config STM32_TIM3_CHANNEL2 + bool "TIM3 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM3_CHANNEL2 + +config STM32_TIM3_CH2MODE + int "TIM3 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM3_CH2OUT + bool "TIM3 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM3_CHANNEL2 + +config STM32_TIM3_CHANNEL3 + bool "TIM3 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM3_CHANNEL3 + +config STM32_TIM3_CH3MODE + int "TIM3 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM3_CH3OUT + bool "TIM3 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM3_CHANNEL3 + +config STM32_TIM3_CHANNEL4 + bool "TIM3 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM3_CHANNEL4 + +config STM32_TIM3_CH4MODE + int "TIM3 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM3_CH4OUT + bool "TIM3 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM3_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM3_CHANNEL int "TIM3 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM3_PWM ---help--- If TIM3 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM3_CHMODE + int "TIM3 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM3_PWM + config STM32_TIM4_PWM bool "TIM4 PWM" default n @@ -2552,15 +2918,137 @@ config STM32_TIM4_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM4_PWM + +config STM32_TIM4_MODE + int "TIM4 Mode" + default 0 + range 0 4 + ---help--- + Specifies the timer mode. + +if STM32_PWM_MULTICHAN + +config STM32_TIM4_CHANNEL1 + bool "TIM4 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM4_CHANNEL1 + +config STM32_TIM4_CH1MODE + int "TIM4 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM4_CH1OUT + bool "TIM4 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM4_CHANNEL1 + +config STM32_TIM4_CHANNEL2 + bool "TIM4 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM4_CHANNEL2 + +config STM32_TIM4_CH2MODE + int "TIM4 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM4_CH2OUT + bool "TIM4 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM4_CHANNEL2 + +config STM32_TIM4_CHANNEL3 + bool "TIM4 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM4_CHANNEL3 + +config STM32_TIM4_CH3MODE + int "TIM4 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM4_CH3OUT + bool "TIM4 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM4_CHANNEL3 + +config STM32_TIM4_CHANNEL4 + bool "TIM4 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM4_CHANNEL4 + +config STM32_TIM4_CH4MODE + int "TIM4 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM4_CH4OUT + bool "TIM4 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM4_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM4_CHANNEL int "TIM4 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM4_PWM ---help--- If TIM4 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM4_CHMODE + int "TIM4 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM4_PWM + config STM32_TIM5_PWM bool "TIM5 PWM" default n @@ -2574,15 +3062,137 @@ config STM32_TIM5_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM5_PWM + +config STM32_TIM5_MODE + int "TIM5 Mode" + default 0 + range 0 4 + ---help--- + Specifies the timer mode. + +if STM32_PWM_MULTICHAN + +config STM32_TIM5_CHANNEL1 + bool "TIM5 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM5_CHANNEL1 + +config STM32_TIM5_CH1MODE + int "TIM5 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM5_CH1OUT + bool "TIM5 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM5_CHANNEL1 + +config STM32_TIM5_CHANNEL2 + bool "TIM5 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM5_CHANNEL2 + +config STM32_TIM5_CH2MODE + int "TIM5 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM5_CH2OUT + bool "TIM5 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM5_CHANNEL2 + +config STM32_TIM5_CHANNEL3 + bool "TIM5 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM5_CHANNEL3 + +config STM32_TIM5_CH3MODE + int "TIM5 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM5_CH3OUT + bool "TIM5 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM5_CHANNEL3 + +config STM32_TIM5_CHANNEL4 + bool "TIM5 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM5_CHANNEL4 + +config STM32_TIM5_CH4MODE + int "TIM5 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM5_CH4OUT + bool "TIM5 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM5_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM5_CHANNEL int "TIM5 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM5_PWM ---help--- If TIM5 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM5_CHMODE + int "TIM5 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM5_PWM + config STM32_TIM8_PWM bool "TIM8 PWM" default n @@ -2596,15 +3206,137 @@ config STM32_TIM8_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM8_PWM + +config STM32_TIM8_MODE + int "TIM8 Mode" + default 0 + range 0 4 + ---help--- + Specifies the timer mode. + +if STM32_PWM_MULTICHAN + +config STM32_TIM8_CHANNEL1 + bool "TIM8 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM8_CHANNEL1 + +config STM32_TIM8_CH1MODE + int "TIM8 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM8_CH1OUT + bool "TIM8 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM8_CHANNEL1 + +config STM32_TIM8_CHANNEL2 + bool "TIM8 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM8_CHANNEL2 + +config STM32_TIM8_CH2MODE + int "TIM8 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM8_CH2OUT + bool "TIM8 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM8_CHANNEL2 + +config STM32_TIM8_CHANNEL3 + bool "TIM8 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM8_CHANNEL3 + +config STM32_TIM8_CH3MODE + int "TIM8 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM8_CH3OUT + bool "TIM8 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM8_CHANNEL3 + +config STM32_TIM8_CHANNEL4 + bool "TIM8 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM8_CHANNEL4 + +config STM32_TIM8_CH4MODE + int "TIM8 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM8_CH4OUT + bool "TIM8 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM8_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM8_CHANNEL int "TIM8 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM8_PWM ---help--- If TIM8 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM8_CHMODE + int "TIM8 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM8_PWM + config STM32_TIM9_PWM bool "TIM9 PWM" default n @@ -2618,15 +3350,130 @@ config STM32_TIM9_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM9_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM9_CHANNEL1 + bool "TIM9 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM9_CHANNEL1 + +config STM32_TIM9_CH1MODE + int "TIM9 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM9_CH1OUT + bool "TIM9 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM9_CHANNEL1 + +config STM32_TIM9_CHANNEL2 + bool "TIM9 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM9_CHANNEL2 + +config STM32_TIM9_CH2MODE + int "TIM9 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM9_CH2OUT + bool "TIM9 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM9_CHANNEL2 + +config STM32_TIM9_CHANNEL3 + bool "TIM9 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM9_CHANNEL3 + +config STM32_TIM9_CH3MODE + int "TIM9 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM9_CH3OUT + bool "TIM9 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM9_CHANNEL3 + +config STM32_TIM9_CHANNEL4 + bool "TIM9 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM9_CHANNEL4 + +config STM32_TIM9_CH4MODE + int "TIM9 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM9_CH4OUT + bool "TIM9 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM9_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM9_CHANNEL int "TIM9 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM9_PWM ---help--- If TIM9 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM9_CHMODE + int "TIM9 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM9_PWM + config STM32_TIM10_PWM bool "TIM10 PWM" default n @@ -2640,15 +3487,130 @@ config STM32_TIM10_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM10_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM10_CHANNEL1 + bool "TIM10 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM10_CHANNEL1 + +config STM32_TIM10_CH1MODE + int "TIM10 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM10_CH1OUT + bool "TIM10 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM10_CHANNEL1 + +config STM32_TIM10_CHANNEL2 + bool "TIM10 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM10_CHANNEL2 + +config STM32_TIM10_CH2MODE + int "TIM10 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM10_CH2OUT + bool "TIM10 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM10_CHANNEL2 + +config STM32_TIM10_CHANNEL3 + bool "TIM10 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM10_CHANNEL3 + +config STM32_TIM10_CH3MODE + int "TIM10 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM10_CH3OUT + bool "TIM10 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM10_CHANNEL3 + +config STM32_TIM10_CHANNEL4 + bool "TIM10 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM10_CHANNEL4 + +config STM32_TIM10_CH4MODE + int "TIM10 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM10_CH4OUT + bool "TIM10 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM10_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM10_CHANNEL int "TIM10 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM10_PWM ---help--- If TIM10 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM10_CHMODE + int "TIM10 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM10_PWM + config STM32_TIM11_PWM bool "TIM11 PWM" default n @@ -2662,15 +3624,130 @@ config STM32_TIM11_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM11_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM11_CHANNEL1 + bool "TIM11 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM11_CHANNEL1 + +config STM32_TIM11_CH1MODE + int "TIM11 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM11_CH1OUT + bool "TIM11 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM11_CHANNEL1 + +config STM32_TIM11_CHANNEL2 + bool "TIM11 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM11_CHANNEL2 + +config STM32_TIM11_CH2MODE + int "TIM11 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM11_CH2OUT + bool "TIM11 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM11_CHANNEL2 + +config STM32_TIM11_CHANNEL3 + bool "TIM11 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM11_CHANNEL3 + +config STM32_TIM11_CH3MODE + int "TIM11 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM11_CH3OUT + bool "TIM11 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM11_CHANNEL3 + +config STM32_TIM11_CHANNEL4 + bool "TIM11 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM11_CHANNEL4 + +config STM32_TIM11_CH4MODE + int "TIM11 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM11_CH4OUT + bool "TIM11 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM11_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM11_CHANNEL int "TIM11 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM11_PWM ---help--- If TIM11 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM11_CHMODE + int "TIM11 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM11_PWM + config STM32_TIM12_PWM bool "TIM12 PWM" default n @@ -2684,15 +3761,130 @@ config STM32_TIM12_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM12_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM12_CHANNEL1 + bool "TIM12 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM12_CHANNEL1 + +config STM32_TIM12_CH1MODE + int "TIM12 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM12_CH1OUT + bool "TIM12 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM12_CHANNEL1 + +config STM32_TIM12_CHANNEL2 + bool "TIM12 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM12_CHANNEL2 + +config STM32_TIM12_CH2MODE + int "TIM12 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM12_CH2OUT + bool "TIM12 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM12_CHANNEL2 + +config STM32_TIM12_CHANNEL3 + bool "TIM12 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM12_CHANNEL3 + +config STM32_TIM12_CH3MODE + int "TIM12 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM12_CH3OUT + bool "TIM12 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM12_CHANNEL3 + +config STM32_TIM12_CHANNEL4 + bool "TIM12 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM12_CHANNEL4 + +config STM32_TIM12_CH4MODE + int "TIM12 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM12_CH4OUT + bool "TIM12 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM12_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM12_CHANNEL int "TIM12 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM12_PWM ---help--- If TIM12 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM12_CHMODE + int "TIM12 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM12_PWM + config STM32_TIM13_PWM bool "TIM13 PWM" default n @@ -2706,15 +3898,130 @@ config STM32_TIM13_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM13_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM13_CHANNEL1 + bool "TIM13 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM13_CHANNEL1 + +config STM32_TIM13_CH1MODE + int "TIM13 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM13_CH1OUT + bool "TIM13 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM13_CHANNEL1 + +config STM32_TIM13_CHANNEL2 + bool "TIM13 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM13_CHANNEL2 + +config STM32_TIM13_CH2MODE + int "TIM13 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM13_CH2OUT + bool "TIM13 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM13_CHANNEL2 + +config STM32_TIM13_CHANNEL3 + bool "TIM13 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM13_CHANNEL3 + +config STM32_TIM13_CH3MODE + int "TIM13 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM13_CH3OUT + bool "TIM13 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM13_CHANNEL3 + +config STM32_TIM13_CHANNEL4 + bool "TIM13 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM13_CHANNEL4 + +config STM32_TIM13_CH4MODE + int "TIM13 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM13_CH4OUT + bool "TIM13 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM13_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM13_CHANNEL int "TIM13 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM13_PWM ---help--- If TIM13 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM13_CHMODE + int "TIM13 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM13_PWM + config STM32_TIM14_PWM bool "TIM14 PWM" default n @@ -2728,15 +4035,130 @@ config STM32_TIM14_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM14_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM14_CHANNEL1 + bool "TIM14 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM14_CHANNEL1 + +config STM32_TIM14_CH1MODE + int "TIM14 Channel 1 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM14_CH1OUT + bool "TIM14 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM14_CHANNEL1 + +config STM32_TIM14_CHANNEL2 + bool "TIM14 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM14_CHANNEL2 + +config STM32_TIM14_CH2MODE + int "TIM14 Channel 2 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM14_CH2OUT + bool "TIM14 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM14_CHANNEL2 + +config STM32_TIM14_CHANNEL3 + bool "TIM14 Channel 3" + default n + ---help--- + Enables channel 3. + +if STM32_TIM14_CHANNEL3 + +config STM32_TIM14_CH3MODE + int "TIM14 Channel 3 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM14_CH3OUT + bool "TIM14 Channel 3 Output" + default n + ---help--- + Enables channel 3 output. + +endif # STM32_TIM14_CHANNEL3 + +config STM32_TIM14_CHANNEL4 + bool "TIM14 Channel 4" + default n + ---help--- + Enables channel 4. + +if STM32_TIM14_CHANNEL4 + +config STM32_TIM14_CH4MODE + int "TIM14 Channel 4 Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM14_CH4OUT + bool "TIM14 Channel 4 Output" + default n + ---help--- + Enables channel 4 output. + +endif # STM32_TIM14_CHANNEL4 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM14_CHANNEL int "TIM14 PWM Output Channel" default 1 range 1 4 - depends on STM32_TIM14_PWM ---help--- If TIM14 is enabled for PWM usage, you also need specifies the timer output channel {1,..,4} +config STM32_TIM14_CHMODE + int "TIM14 Channel Mode" + default 0 + range 0 5 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM14_PWM + config STM32_TIM15_PWM bool "TIM15 PWM" default n @@ -2749,15 +4171,82 @@ config STM32_TIM15_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM15_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM15_CHANNEL1 + bool "TIM15 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM15_CHANNEL1 + +config STM32_TIM15_CH1MODE + int "TIM15 Channel 1 Mode" + default 0 + range 0 3 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM15_CH1OUT + bool "TIM15 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM15_CHANNEL1 + +config STM32_TIM15_CHANNEL2 + bool "TIM15 Channel 2" + default n + ---help--- + Enables channel 2. + +if STM32_TIM15_CHANNEL2 + +config STM32_TIM15_CH2MODE + int "TIM15 Channel 2 Mode" + default 0 + range 0 3 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +config STM32_TIM15_CH2OUT + bool "TIM15 Channel 2 Output" + default n + ---help--- + Enables channel 2 output. + +endif # STM32_TIM15_CHANNEL2 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM15_CHANNEL int "TIM15 PWM Output Channel" default 1 range 1 2 - depends on STM32_TIM15_PWM ---help--- If TIM15 is enabled for PWM usage, you also need specifies the timer output channel {1,2} +config STM32_TIM15_CHMODE + int "TIM15 Channel Mode" + default 0 + range 0 3 if STM32_STM32F30XX + range 0 1 if !STM32_STM32F30XX + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM15_PWM + config STM32_TIM16_PWM bool "TIM16 PWM" default n @@ -2770,15 +4259,56 @@ config STM32_TIM16_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM16_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM16_CHANNEL1 + bool "TIM16 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM16_CHANNEL1 + +config STM32_TIM16_CH1MODE + int "TIM16 Channel 1 Mode" + default 0 + range 0 1 + ---help--- + Specifies the channel mode. + +config STM32_TIM16_CH1OUT + bool "TIM16 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM16_CHANNEL1 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM16_CHANNEL int "TIM16 PWM Output Channel" default 1 range 1 1 - depends on STM32_TIM16_PWM ---help--- If TIM16 is enabled for PWM usage, you also need specifies the timer output channel {1} +config STM32_TIM16_CHMODE + int "TIM16 Channel Mode" + default 0 + range 0 1 + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM16_PWM + config STM32_TIM17_PWM bool "TIM17 PWM" default n @@ -2791,15 +4321,65 @@ config STM32_TIM17_PWM is defined then THIS following may also be defined to indicate that the timer is intended to be used for pulsed output modulation. +if STM32_TIM17_PWM + +if STM32_PWM_MULTICHAN + +config STM32_TIM17_CHANNEL1 + bool "TIM17 Channel 1" + default n + ---help--- + Enables channel 1. + +if STM32_TIM17_CHANNEL1 + +config STM32_TIM17_CH1MODE + int "TIM17 Channel 1 Mode" + default 0 + range 0 1 + ---help--- + Specifies the channel mode. + +config STM32_TIM17_CH1OUT + bool "TIM17 Channel 1 Output" + default n + ---help--- + Enables channel 1 output. + +endif # STM32_TIM17_CHANNEL1 + +endif # STM32_PWM_MULTICHAN + +if !STM32_PWM_MULTICHAN + config STM32_TIM17_CHANNEL int "TIM17 PWM Output Channel" default 1 range 1 1 - depends on STM32_TIM17_PWM ---help--- If TIM17 is enabled for PWM usage, you also need specifies the timer output channel {1} +config STM32_TIM17_CHMODE + int "TIM17 Channel Mode" + default 0 + range 0 1 + ---help--- + Specifies the channel mode. + +endif # !STM32_PWM_MULTICHAN + +endif # STM32_TIM17_PWM + +config STM32_PWM_MULTICHAN + bool "PWM Multiple Output Channels" + default n + depends on STM32_TIM1_PWM || STM32_TIM2_PWM || STM32_TIM3_PWM || STM32_TIM4_PWM || STM32_TIM5_PWM || STM32_TIM8_PWM || STM32_TIM9_PWM || STM32_TIM10_PWM || STM32_TIM11_PWM || STM32_TIM12_PWM || STM32_TIM13_PWM || STM32_TIM14_PWM || STM32_TIM15_PWM || STM32_TIM16_PWM || STM32_TIM17_PWM + select ARCH_HAVE_PWM_MULTICHAN + ---help--- + Specifies that the PWM driver supports multiple output + channels per timer. + config STM32_TIM1_ADC bool "TIM1 ADC" default n diff --git a/arch/arm/src/stm32/chip/stm32_tim.h b/arch/arm/src/stm32/chip/stm32_tim.h index 80e86c0026..573dd9dd84 100644 --- a/arch/arm/src/stm32/chip/stm32_tim.h +++ b/arch/arm/src/stm32/chip/stm32_tim.h @@ -677,8 +677,8 @@ #define ATIM_CCMR1_OC2CE (1 << 15) /* Bit 15: Output Compare 2 Clear Enable */ #ifdef CONFIG_STM32_STM32F30XX -# define ATIM_CCMR1_OC1M (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */ -# define ATIM_CCMR1_OC2M (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */ +# define ATIM_CCMR1_OC1M (1 << 16) /* Bit 16: Output Compare 1 mode - bit 3 */ +# define ATIM_CCMR1_OC2M (1 << 24) /* Bit 24: Output Compare 2 mode - bit 3 */ #endif /* Common CCMR (unshifted) Capture/Compare Selection bit-field definitions */ @@ -698,6 +698,10 @@ #define ATIM_CCMR_MODE_OCREFHI (5) /* 101: OCxREF forced high */ #define ATIM_CCMR_MODE_PWM1 (6) /* 110: PWM mode 1 */ #define ATIM_CCMR_MODE_PWM2 (7) /* 111: PWM mode 2 */ +#define ATIM_CCMR_MODE_COMBINED1 (12) /* 1100: Combined PWM mode 1 */ +#define ATIM_CCMR_MODE_COMBINED2 (13) /* 1101: Combined PWM mode 2 */ +#define ATIM_CCMR_MODE_ASYMMETRIC1 (14) /* 1110: Asymmetric PWM mode 1 */ +#define ATIM_CCMR_MODE_ASYMMETRIC2 (15) /* 1111: Asymmetric PWM mode 2 */ /* Capture/compare mode register 1 -- Input capture mode */ @@ -764,8 +768,8 @@ #define ATIM_CCMR2_OC4CE (1 << 15) /* Bit 15: Output Compare 4 Clear Enable */ #ifdef CONFIG_STM32_STM32F30XX -# define ATIM_CCMR1_OC3M 1 << 16) /* Bit 16: Output Compare 3 mode - bit 3 */ -# define ATIM_CCMR1_OC4M 1 << 24) /* Bit 24: Output Compare 4 mode - bit 3 */ +# define ATIM_CCMR2_OC3M (1 << 16) /* Bit 16: Output Compare 3 mode - bit 3 */ +# define ATIM_CCMR2_OC4M (1 << 24) /* Bit 24: Output Compare 4 mode - bit 3 */ #endif /* Capture/compare mode register 2 - Input Capture Mode */ diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index a3a1645688..d8b98e0ee2 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -2,7 +2,9 @@ * arch/arm/src/stm32/stm32_pwm.c * * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -65,7 +67,9 @@ defined(CONFIG_STM32_TIM5_PWM) || defined(CONFIG_STM32_TIM8_PWM) || \ defined(CONFIG_STM32_TIM9_PWM) || defined(CONFIG_STM32_TIM10_PWM) || \ defined(CONFIG_STM32_TIM11_PWM) || defined(CONFIG_STM32_TIM12_PWM) || \ - defined(CONFIG_STM32_TIM13_PWM) || defined(CONFIG_STM32_TIM14_PWM) + defined(CONFIG_STM32_TIM13_PWM) || defined(CONFIG_STM32_TIM14_PWM) || \ + defined(CONFIG_STM32_TIM15_PWM) || defined(CONFIG_STM32_TIM16_PWM) || \ + defined(CONFIG_STM32_TIM17_PWM) /**************************************************************************** * Pre-processor Definitions @@ -75,7 +79,7 @@ #define TIMTYPE_BASIC 0 /* Basic timers: TIM6-7 */ #define TIMTYPE_GENERAL16 1 /* General 16-bit timers: TIM2-5 on F1 */ -#define TIMTYPE_COUNTUP16 2 /* General 16-bit count-up timers: TIM9-14 on F4 */ +#define TIMTYPE_COUNTUP16 2 /* General 16-bit count-up timers: TIM9-14 on F4, TIM15-17 on F3 */ #define TIMTYPE_GENERAL32 3 /* General 32-bit timers: TIM2-5 on F4 */ #define TIMTYPE_ADVANCED 4 /* Advanced timers: TIM1-8 */ @@ -105,6 +109,9 @@ #define TIMTYPE_TIM12 TIMTYPE_COUNTUP16 #define TIMTYPE_TIM13 TIMTYPE_COUNTUP16 #define TIMTYPE_TIM14 TIMTYPE_COUNTUP16 +#define TIMTYPE_TIM15 TIMTYPE_COUNTUP16 +#define TIMTYPE_TIM16 TIMTYPE_COUNTUP16 +#define TIMTYPE_TIM17 TIMTYPE_COUNTUP16 /* Debug ********************************************************************/ /* Non-standard debug that may be enabled just for testing PWM */ @@ -136,14 +143,42 @@ /**************************************************************************** * Private Types ****************************************************************************/ + +enum stm32_timmode_e +{ + STM32_TIMMODE_COUNTUP = 0, + STM32_TIMMODE_COUNTDOWN = 1, + STM32_TIMMODE_CENTER1 = 2, + STM32_TIMMODE_CENTER2 = 3, + STM32_TIMMODE_CENTER3 = 4, +}; + +enum stm32_chanmode_e +{ + STM32_CHANMODE_PWM1 = 0, + STM32_CHANMODE_PWM2 = 1, + STM32_CHANMODE_COMBINED1 = 2, + STM32_CHANMODE_COMBINED2 = 3, + STM32_CHANMODE_ASYMMETRIC1 = 4, + STM32_CHANMODE_ASYMMETRIC2 = 5, +}; + +struct stm32_pwmchan_s +{ + uint8_t channel; /* Timer output channel: {1,..4} */ + uint32_t pincfg; /* Output pin configuration */ + enum stm32_chanmode_e mode; +}; + /* This structure represents the state of one PWM timer */ struct stm32_pwmtimer_s { FAR const struct pwm_ops_s *ops; /* PWM operations */ - uint8_t timid; /* Timer ID {1,...,14} */ - uint8_t channel; /* Timer output channel: {1,..4} */ + uint8_t timid; /* Timer ID {1,...,17} */ + struct stm32_pwmchan_s channels[PWM_NCHANNELS]; uint8_t timtype; /* See the TIMTYPE_* definitions */ + enum stm32_timmode_e mode; #ifdef CONFIG_PWM_PULSECOUNT uint8_t irq; /* Timer update IRQ */ uint8_t prev; /* The previous value of the RCR (pre-loaded) */ @@ -151,11 +186,10 @@ struct stm32_pwmtimer_s uint32_t count; /* Remaining pluse count */ #endif uint32_t base; /* The base address of the timer */ - uint32_t pincfg; /* Output pin configuration */ uint32_t pclk; /* The frequency of the peripheral clock * that drives the timer module. */ #ifdef CONFIG_PWM_PULSECOUNT - FAR void * handle; /* Handle used for upper-half callback */ + FAR void *handle; /* Handle used for upper-half callback */ #endif }; @@ -214,185 +248,515 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, static const struct pwm_ops_s g_pwmops = { - .setup = pwm_setup, - .shutdown = pwm_shutdown, - .start = pwm_start, - .stop = pwm_stop, - .ioctl = pwm_ioctl, + .setup = pwm_setup, + .shutdown = pwm_shutdown, + .start = pwm_start, + .stop = pwm_stop, + .ioctl = pwm_ioctl, }; #ifdef CONFIG_STM32_TIM1_PWM static struct stm32_pwmtimer_s g_pwm1dev = { - .ops = &g_pwmops, - .timid = 1, - .channel = CONFIG_STM32_TIM1_CHANNEL, - .timtype = TIMTYPE_TIM1, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM1UP, + .ops = &g_pwmops, + .timid = 1, + .channels = + { +#ifdef CONFIG_STM32_TIM1_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM1_CH1CFG, + .mode = CONFIG_STM32_TIM1_CH1MODE, + }, #endif - .base = STM32_TIM1_BASE, - .pincfg = PWM_TIM1_PINCFG, - .pclk = STM32_APB2_TIM1_CLKIN, +#ifdef CONFIG_STM32_TIM1_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM1_CH2CFG, + .mode = CONFIG_STM32_TIM1_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM1_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM1_CH3CFG, + .mode = CONFIG_STM32_TIM1_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM1_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM1_CH4CFG, + .mode = CONFIG_STM32_TIM1_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM1, + .mode = CONFIG_STM32_TIM1_MODE, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM1UP, +#endif + .base = STM32_TIM1_BASE, + .pclk = STM32_APB2_TIM1_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM2_PWM static struct stm32_pwmtimer_s g_pwm2dev = { - .ops = &g_pwmops, - .timid = 2, - .channel = CONFIG_STM32_TIM2_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM2, + .ops = &g_pwmops, + .timid = 2, + .channels = + { +#ifdef CONFIG_STM32_TIM2_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM2_CH1CFG, + .mode = CONFIG_STM32_TIM2_CH1MODE, + }, #endif - .timtype = TIMTYPE_TIM2, - .base = STM32_TIM2_BASE, - .pincfg = PWM_TIM2_PINCFG, - .pclk = STM32_APB1_TIM2_CLKIN, +#ifdef CONFIG_STM32_TIM2_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM2_CH2CFG, + .mode = CONFIG_STM32_TIM2_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM2_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM2_CH3CFG, + .mode = CONFIG_STM32_TIM2_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM2_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM2_CH4CFG, + .mode = CONFIG_STM32_TIM2_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM2, + .mode = CONFIG_STM32_TIM2_MODE, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM2, +#endif + .base = STM32_TIM2_BASE, + .pclk = STM32_APB1_TIM2_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM3_PWM static struct stm32_pwmtimer_s g_pwm3dev = { - .ops = &g_pwmops, - .timid = 3, - .channel = CONFIG_STM32_TIM3_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM3, + .ops = &g_pwmops, + .timid = 3, + .channels = + { +#ifdef CONFIG_STM32_TIM3_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM3_CH1CFG, + .mode = CONFIG_STM32_TIM3_CH1MODE, + }, #endif - .timtype = TIMTYPE_TIM3, - .base = STM32_TIM3_BASE, - .pincfg = PWM_TIM3_PINCFG, - .pclk = STM32_APB1_TIM3_CLKIN, +#ifdef CONFIG_STM32_TIM3_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM3_CH2CFG, + .mode = CONFIG_STM32_TIM3_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM3_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM3_CH3CFG, + .mode = CONFIG_STM32_TIM3_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM3_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM3_CH4CFG, + .mode = CONFIG_STM32_TIM3_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM3, + .mode = CONFIG_STM32_TIM3_MODE, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM3, +#endif + .base = STM32_TIM3_BASE, + .pclk = STM32_APB1_TIM3_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM4_PWM static struct stm32_pwmtimer_s g_pwm4dev = { - .ops = &g_pwmops, - .timid = 4, - .channel = CONFIG_STM32_TIM4_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM4, + .ops = &g_pwmops, + .timid = 4, + .channels = + { +#ifdef CONFIG_STM32_TIM4_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM4_CH1CFG, + .mode = CONFIG_STM32_TIM4_CH1MODE, + }, #endif - .timtype = TIMTYPE_TIM4, - .base = STM32_TIM4_BASE, - .pincfg = PWM_TIM4_PINCFG, - .pclk = STM32_APB1_TIM4_CLKIN, +#ifdef CONFIG_STM32_TIM4_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM4_CH2CFG, + .mode = CONFIG_STM32_TIM4_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM4_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM4_CH3CFG, + .mode = CONFIG_STM32_TIM4_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM4_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM4_CH4CFG, + .mode = CONFIG_STM32_TIM4_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM4, + .mode = CONFIG_STM32_TIM4_MODE, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM4, +#endif + .base = STM32_TIM4_BASE, + .pclk = STM32_APB1_TIM4_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM5_PWM static struct stm32_pwmtimer_s g_pwm5dev = { - .ops = &g_pwmops, - .timid = 5, - .channel = CONFIG_STM32_TIM5_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM5, + .ops = &g_pwmops, + .timid = 5, + .channels = + { +#ifdef CONFIG_STM32_TIM5_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM5_CH1CFG, + .mode = CONFIG_STM32_TIM5_CH1MODE, + }, #endif - .timtype = TIMTYPE_TIM5, - .base = STM32_TIM5_BASE, - .pincfg = PWM_TIM5_PINCFG, - .pclk = STM32_APB1_TIM5_CLKIN, +#ifdef CONFIG_STM32_TIM5_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM5_CH2CFG, + .mode = CONFIG_STM32_TIM5_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM5_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM5_CH3CFG, + .mode = CONFIG_STM32_TIM5_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM5_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM5_CH4CFG, + .mode = CONFIG_STM32_TIM5_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM5, + .mode = CONFIG_STM32_TIM5_MODE, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM5, +#endif + .base = STM32_TIM5_BASE, + .pclk = STM32_APB1_TIM5_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM8_PWM static struct stm32_pwmtimer_s g_pwm8dev = { - .ops = &g_pwmops, - .timid = 8, - .channel = CONFIG_STM32_TIM8_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM8UP, + .ops = &g_pwmops, + .timid = 8, + .channels = + { +#ifdef CONFIG_STM32_TIM8_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM8_CH1CFG, + .mode = CONFIG_STM32_TIM8_CH1MODE, + }, #endif - .timtype = TIMTYPE_TIM8, - .base = STM32_TIM8_BASE, - .pincfg = PWM_TIM8_PINCFG, - .pclk = STM32_APB2_TIM8_CLKIN, +#ifdef CONFIG_STM32_TIM8_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM8_CH2CFG, + .mode = CONFIG_STM32_TIM8_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM8_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM8_CH3CFG, + .mode = CONFIG_STM32_TIM8_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM8_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM8_CH4CFG, + .mode = CONFIG_STM32_TIM8_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM8, + .mode = CONFIG_STM32_TIM8_MODE, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM8UP, +#endif + .base = STM32_TIM8_BASE, + .pclk = STM32_APB2_TIM8_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM9_PWM static struct stm32_pwmtimer_s g_pwm9dev = { - .ops = &g_pwmops, - .timid = 9, - .channel = CONFIG_STM32_TIM9_CHANNEL, - .timtype = TIMTYPE_TIM9, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM9, + .ops = &g_pwmops, + .timid = 9, + .channels = + { +#ifdef CONFIG_STM32_TIM9_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM9_CH1CFG, + .mode = CONFIG_STM32_TIM9_CH1MODE, + }, #endif - .base = STM32_TIM9_BASE, - .pincfg = PWM_TIM9_PINCFG, - .pclk = STM32_APB2_TIM9_CLKIN, +#ifdef CONFIG_STM32_TIM9_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM9_CH2CFG, + .mode = CONFIG_STM32_TIM9_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM9_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM9_CH3CFG, + .mode = CONFIG_STM32_TIM9_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM9_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM9_CH4CFG, + .mode = CONFIG_STM32_TIM9_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM9, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM9, +#endif + .base = STM32_TIM9_BASE, + .pclk = STM32_APB2_TIM9_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM10_PWM static struct stm32_pwmtimer_s g_pwm10dev = { - .ops = &g_pwmops, - .timid = 10, - .channel = CONFIG_STM32_TIM10_CHANNEL, - .timtype = TIMTYPE_TIM10, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM10, + .ops = &g_pwmops, + .timid = 10, + .channels = + { +#ifdef CONFIG_STM32_TIM10_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM10_CH1CFG, + .mode = CONFIG_STM32_TIM10_CH1MODE, + }, #endif - .base = STM32_TIM10_BASE, - .pincfg = PWM_TIM10_PINCFG, - .pclk = STM32_APB2_TIM10_CLKIN, +#ifdef CONFIG_STM32_TIM10_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM10_CH2CFG, + .mode = CONFIG_STM32_TIM10_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM10_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM10_CH3CFG, + .mode = CONFIG_STM32_TIM10_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM10_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM10_CH4CFG, + .mode = CONFIG_STM32_TIM10_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM10, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM10, +#endif + .base = STM32_TIM10_BASE, + .pclk = STM32_APB2_TIM10_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM11_PWM static struct stm32_pwmtimer_s g_pwm11dev = { - .ops = &g_pwmops, - .timid = 11, - .channel = CONFIG_STM32_TIM11_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM11, + .ops = &g_pwmops, + .timid = 11, + .channels = + { +#ifdef CONFIG_STM32_TIM11_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM11_CH1CFG, + .mode = CONFIG_STM32_TIM11_CH1MODE, + }, #endif - .timtype = TIMTYPE_TIM11, - .base = STM32_TIM11_BASE, - .pincfg = PWM_TIM11_PINCFG, - .pclk = STM32_APB2_TIM11_CLKIN, +#ifdef CONFIG_STM32_TIM11_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM11_CH2CFG, + .mode = CONFIG_STM32_TIM11_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM11_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM11_CH3CFG, + .mode = CONFIG_STM32_TIM11_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM11_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM11_CH4CFG, + .mode = CONFIG_STM32_TIM11_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM11, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM11, +#endif + .base = STM32_TIM11_BASE, + .pclk = STM32_APB2_TIM11_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM12_PWM static struct stm32_pwmtimer_s g_pwm12dev = { - .ops = &g_pwmops, - .timid = 12, - .channel = CONFIG_STM32_TIM12_CHANNEL, - .timtype = TIMTYPE_TIM12, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM12, + .ops = &g_pwmops, + .timid = 12, + .channels = + { +#ifdef CONFIG_STM32_TIM12_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM12_CH1CFG, + .mode = CONFIG_STM32_TIM12_CH1MODE, + }, #endif - .base = STM32_TIM12_BASE, - .pincfg = PWM_TIM12_PINCFG, - .pclk = STM32_APB1_TIM12_CLKIN, +#ifdef CONFIG_STM32_TIM12_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM12_CH2CFG, + .mode = CONFIG_STM32_TIM12_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM12_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM12_CH3CFG, + .mode = CONFIG_STM32_TIM12_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM12_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM12_CH4CFG, + .mode = CONFIG_STM32_TIM12_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM12, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM12, +#endif + .base = STM32_TIM12_BASE, + .pclk = STM32_APB1_TIM12_CLKIN, }; #endif #ifdef CONFIG_STM32_TIM13_PWM static struct stm32_pwmtimer_s g_pwm13dev = { - .ops = &g_pwmops, - .timid = 13, - .channel = CONFIG_STM32_TIM13_CHANNEL, - .timtype = TIMTYPE_TIM13, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM13, + .ops = &g_pwmops, + .timid = 13, + .channels = + { +#ifdef CONFIG_STM32_TIM13_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM13_CH1CFG, + .mode = CONFIG_STM32_TIM13_CH1MODE, + }, #endif - .base = STM32_TIM13_BASE, - .pincfg = PWM_TIM13_PINCFG, +#ifdef CONFIG_STM32_TIM13_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM13_CH2CFG, + .mode = CONFIG_STM32_TIM13_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM13_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM13_CH3CFG, + .mode = CONFIG_STM32_TIM13_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM13_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM13_CH4CFG, + .mode = CONFIG_STM32_TIM13_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM13, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM13, +#endif + .base = STM32_TIM13_BASE, .pclk = STM32_APB1_TIM13_CLKIN, }; #endif @@ -400,16 +764,128 @@ static struct stm32_pwmtimer_s g_pwm13dev = #ifdef CONFIG_STM32_TIM14_PWM static struct stm32_pwmtimer_s g_pwm14dev = { - .ops = &g_pwmops, - .timid = 14, - .channel = CONFIG_STM32_TIM14_CHANNEL, - .timtype = TIMTYPE_TIM14, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = STM32_IRQ_TIM14, + .ops = &g_pwmops, + .timid = 14, + .channels = + { +#ifdef CONFIG_STM32_TIM14_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM14_CH1CFG, + .mode = CONFIG_STM32_TIM14_CH1MODE, + }, #endif - .base = STM32_TIM14_BASE, - .pincfg = PWM_TIM14_PINCFG, - .pclk = STM32_APB1_TIM14_CLKIN, +#ifdef CONFIG_STM32_TIM14_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM14_CH2CFG, + .mode = CONFIG_STM32_TIM14_CH2MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM14_CHANNEL3 + { + .channel = 3, + .pincfg = PWM_TIM14_CH3CFG, + .mode = CONFIG_STM32_TIM14_CH3MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM14_CHANNEL4 + { + .channel = 4, + .pincfg = PWM_TIM14_CH4CFG, + .mode = CONFIG_STM32_TIM14_CH4MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM14, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM14, +#endif + .base = STM32_TIM14_BASE, + .pclk = STM32_APB1_TIM14_CLKIN, +}; +#endif + +#ifdef CONFIG_STM32_TIM15_PWM +static struct stm32_pwmtimer_s g_pwm15dev = +{ + .ops = &g_pwmops, + .timid = 15, + .channels = + { +#ifdef CONFIG_STM32_TIM15_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM15_CH1CFG, + .mode = CONFIG_STM32_TIM15_CH1MODE, + }, +#endif +#ifdef CONFIG_STM32_TIM15_CHANNEL2 + { + .channel = 2, + .pincfg = PWM_TIM15_CH2CFG, + .mode = CONFIG_STM32_TIM15_CH2MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM15, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM15, +#endif + .base = STM32_TIM15_BASE, + .pclk = STM32_APB1_TIM15_CLKIN, +}; +#endif + +#ifdef CONFIG_STM32_TIM16_PWM +static struct stm32_pwmtimer_s g_pwm16dev = +{ + .ops = &g_pwmops, + .timid = 16, + .channels = + { +#ifdef CONFIG_STM32_TIM16_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM16_CH1CFG, + .mode = CONFIG_STM32_TIM16_CH1MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM16, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM16, +#endif + .base = STM32_TIM16_BASE, + .pclk = STM32_APB1_TIM16_CLKIN, +}; +#endif + +#ifdef CONFIG_STM32_TIM17_PWM +static struct stm32_pwmtimer_s g_pwm17dev = +{ + .ops = &g_pwmops, + .timid = 17, + .channels = + { +#ifdef CONFIG_STM32_TIM17_CHANNEL1 + { + .channel = 1, + .pincfg = PWM_TIM17_CH1CFG, + .mode = CONFIG_STM32_TIM17_CH1MODE, + }, +#endif + }, + .timtype = TIMTYPE_TIM17, + .mode = STM32_TIMMODE_COUNTUP, +#ifdef CONFIG_PWM_PULSECOUNT + .irq = STM32_IRQ_TIM17, +#endif + .base = STM32_TIM17_BASE, + .pclk = STM32_APB1_TIM17_CLKIN, }; #endif @@ -551,6 +1027,10 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg) static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, FAR const struct pwm_info_s *info) { +#ifdef CONFIG_PWM_MULTICHAN + int i; +#endif + /* Calculated values */ uint32_t prescaler; @@ -563,18 +1043,31 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, uint16_t cr1; uint16_t ccer; uint16_t cr2; +#ifdef CONFIG_STM32_STM32F30XX + uint32_t ccmr1; + uint32_t ccmr2; +#else uint16_t ccmr1; uint16_t ccmr2; +#endif /* New timer regiser bit settings */ uint16_t ccenable; +#ifdef CONFIG_STM32_STM32F30XX + uint32_t ocmode1; + uint32_t ocmode2; +#else uint16_t ocmode1; uint16_t ocmode2; +#endif DEBUGASSERT(priv != NULL && info != NULL); -#ifdef CONFIG_PWM_PULSECOUNT +#if defined(CONFIG_PWM_MULTICHAN) + pwmvdbg("TIM%d frequency: %d\n", + priv->timid, info->frequency); +#elif defined(CONFIG_PWM_PULSECOUNT) pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x count: %d\n", priv->timid, priv->channel, info->frequency, info->duty, info->count); @@ -582,8 +1075,10 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x\n", priv->timid, priv->channel, info->frequency, info->duty); #endif - DEBUGASSERT(info->frequency > 0 && info->duty > 0 && - info->duty < uitoub16(100)); + DEBUGASSERT(info->frequency > 0); +#ifndef CONFIG_PWM_MULTICHAN + DEBUGASSERT(info->duty > 0 && info->duty < uitoub16(100)); +#endif /* Disable all interrupts and DMA requests, clear all pending status */ @@ -647,22 +1142,16 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, reload = 65535; } - /* Duty cycle: - * - * duty cycle = ccr / reload (fractional value) - */ - - ccr = b16toi(info->duty * reload + b16HALF); - - pwmvdbg("TIM%d PCLK: %d frequency: %d TIMCLK: %d prescaler: %d reload: %d ccr: %d\n", - priv->timid, priv->pclk, info->frequency, timclk, prescaler, reload, ccr); + pwmvdbg("TIM%d PCLK: %d frequency: %d TIMCLK: %d prescaler: %d reload: %d\n", + priv->timid, priv->pclk, info->frequency, timclk, prescaler, reload); /* Set up the timer CR1 register: * - * 1-8 CKD[1:0] ARPE CMS[1:0] DIR OPM URS UDIS CEN - * 2-5 CKD[1:0] ARPE CMS DIR OPM URS UDIS CEN - * 6-7 ARPE OPM URS UDIS CEN - * 9-14 CKD[1:0] ARPE URS UDIS CEN + * 1,8 CKD[1:0] ARPE CMS[1:0] DIR OPM URS UDIS CEN + * 2-5 CKD[1:0] ARPE CMS DIR OPM URS UDIS CEN + * 6-7 ARPE OPM URS UDIS CEN + * 9-14 CKD[1:0] ARPE URS UDIS CEN + * 15-17 CKD[1:0] ARPE OPM URS UDIS CEN */ cr1 = pwm_getreg(priv, STM32_GTIM_CR1_OFFSET); @@ -672,25 +1161,53 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, cr1 &= ~GTIM_CR1_CEN; /* Set the counter mode for the advanced timers (1,8) and most general - * purpose timers (all 2-5, but not 9-14), i.e., all but TIMTYPE_COUNTUP16 + * purpose timers (all 2-5, but not 9-17), i.e., all but TIMTYPE_COUNTUP16 * and TIMTYPE_BASIC */ -#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM2_PWM) || \ - defined(CONFIG_STM32_TIM3_PWM) || defined(CONFIG_STM32_TIM4_PWM) || \ +#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM2_PWM) || \ + defined(CONFIG_STM32_TIM3_PWM) || defined(CONFIG_STM32_TIM4_PWM) || \ defined(CONFIG_STM32_TIM5_PWM) || defined(CONFIG_STM32_TIM8_PWM) if (priv->timtype != TIMTYPE_BASIC && priv->timtype != TIMTYPE_COUNTUP16) { - /* Select the Counter Mode == count up: + /* Select the Counter Mode: * * GTIM_CR1_EDGE: The counter counts up or down depending on the - * direction bit(DIR). + * direction bit (DIR). + * GTIM_CR1_CENTER1, GTIM_CR1_CENTER2, GTIM_CR1_CENTER3: The counter + * counts up then down. * GTIM_CR1_DIR: 0: count up, 1: count down */ cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK); - cr1 |= GTIM_CR1_EDGE; + + switch (priv->mode) + { + case STM32_TIMMODE_COUNTUP: + cr1 |= GTIM_CR1_EDGE; + break; + + case STM32_TIMMODE_COUNTDOWN: + cr1 |= GTIM_CR1_EDGE | GTIM_CR1_DIR; + break; + + case STM32_TIMMODE_CENTER1: + cr1 |= GTIM_CR1_CENTER1; + break; + + case STM32_TIMMODE_CENTER2: + cr1 |= GTIM_CR1_CENTER2; + break; + + case STM32_TIMMODE_CENTER3: + cr1 |= GTIM_CR1_CENTER3; + break; + + default: + pwmdbg("No such timer mode: %d\n", (int)priv->mode); + return -EINVAL; + } } #endif @@ -706,7 +1223,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, pwm_putreg(priv, STM32_GTIM_ARR_OFFSET, (uint16_t)reload); pwm_putreg(priv, STM32_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1)); - /* Set the advanced timer's repitition counter */ + /* Set the advanced timer's repetition counter */ #if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM) if (priv->timtype == TIMTYPE_ADVANCED) @@ -719,12 +1236,12 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, #ifdef CONFIG_PWM_PULSECOUNT if (info->count > 0) { - /* Save the remining count and the number of counts that will have + /* Save the remaining count and the number of counts that will have * elapsed on the first interrupt. */ /* If the first interrupt occurs at the end end of the first - * repition count, then the count will be the same as the RCR + * repetition count, then the count will be the same as the RCR * value. */ @@ -746,12 +1263,12 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1); } - /* Otherwise, just clear the repitition counter */ + /* Otherwise, just clear the repetition counter */ else #endif { - /* Set the repeition counter to zero */ + /* Set the repetition counter to zero */ pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, 0); @@ -770,85 +1287,203 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Handle channel specific setup */ - ocmode1 = 0; - ocmode2 = 0; - switch (priv->channel) + ccenable = 0; + ocmode1 = 0; + ocmode2 = 0; + +#ifdef CONFIG_PWM_MULTICHAN + for (i = 0; i < CONFIG_PWM_NCHANNELS; i++) +#endif { - case 1: /* PWM Mode configuration: Channel 1 */ + ub16_t duty; +#ifdef CONFIG_STM32_STM32F30XX + uint32_t chanmode; + bool ocmbit = false; +#else + uint16_t chanmode; +#endif + uint8_t channel; +#ifdef CONFIG_PWM_MULTICHAN + int j; +#endif + enum stm32_chanmode_e mode; + +#ifdef CONFIG_PWM_MULTICHAN + duty = info->channels[i].duty; + channel = info->channels[i].channel; + + for (j = 0; j < PWM_NCHANNELS; j++) { - /* Select the CCER enable bit for this channel */ - - ccenable = ATIM_CCER_CC1E; - - /* Set the CCMR1 mode values (leave CCMR2 zero) */ - - ocmode1 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC1S_SHIFT) | - (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC1M_SHIFT) | - ATIM_CCMR1_OC1PE; - - /* Set the duty cycle by writing to the CCR register for this channel */ - - pwm_putreg(priv, STM32_GTIM_CCR1_OFFSET, (uint16_t)ccr); + if (priv->channels[j].channel == channel) + { + mode = priv->channels[j].mode; + break; + } } - break; - case 2: /* PWM Mode configuration: Channel 2 */ + if (j >= PWM_NCHANNELS) { - /* Select the CCER enable bit for this channel */ - - ccenable = ATIM_CCER_CC2E; - - /* Set the CCMR1 mode values (leave CCMR2 zero) */ - - ocmode1 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC2S_SHIFT) | - (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR1_OC2M_SHIFT) | - ATIM_CCMR1_OC2PE; - - /* Set the duty cycle by writing to the CCR register for this channel */ - - pwm_putreg(priv, STM32_GTIM_CCR2_OFFSET, (uint16_t)ccr); + pwmdbg("No such channel: %d\n", channel); + return -EINVAL; } - break; +#else + duty = info->duty; + channel = priv->channels[0].channel; + mode = priv->channels[0].mode; +#endif - case 3: /* PWM Mode configuration: Channel3 */ + /* Duty cycle: + * + * duty cycle = ccr / reload (fractional value) + */ + + ccr = b16toi(duty * reload + b16HALF); + + pwmvdbg("ccr: %d\n", ccr); + + switch (mode) { - /* Select the CCER enable bit for this channel */ + case STM32_CHANMODE_PWM1: + chanmode = ATIM_CCMR_MODE_PWM1; + break; - ccenable = ATIM_CCER_CC3E; + case STM32_CHANMODE_PWM2: + chanmode = ATIM_CCMR_MODE_PWM2; + break; - /* Set the CCMR2 mode values (leave CCMR1 zero) */ +#ifdef CONFIG_STM32_STM32F30XX + case STM32_CHANMODE_COMBINED1: + chanmode = ATIM_CCMR_MODE_COMBINED1; + ocmbit = true; + break; - ocmode2 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC3S_SHIFT) | - (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR2_OC3M_SHIFT) | - ATIM_CCMR2_OC3PE; + case STM32_CHANMODE_COMBINED2: + chanmode = ATIM_CCMR_MODE_COMBINED2; + ocmbit = true; + break; - /* Set the duty cycle by writing to the CCR register for this channel */ + case STM32_CHANMODE_ASYMMETRIC1: + chanmode = ATIM_CCMR_MODE_ASYMMETRIC1; + ocmbit = true; + break; - pwm_putreg(priv, STM32_GTIM_CCR3_OFFSET, (uint16_t)ccr); + case STM32_CHANMODE_ASYMMETRIC2: + chanmode = ATIM_CCMR_MODE_ASYMMETRIC2; + ocmbit = true; + break; +#endif + + default: + pwmdbg("No such mode: %d\n", (int)mode); + return -EINVAL; } - break; - case 4: /* PWM1 Mode configuration: Channel4 */ + switch (channel) { - /* Select the CCER enable bit for this channel */ + case 1: /* PWM Mode configuration: Channel 1 */ + { + /* Select the CCER enable bit for this channel */ - ccenable = ATIM_CCER_CC4E; + ccenable |= ATIM_CCER_CC1E; - /* Set the CCMR2 mode values (leave CCMR1 zero) */ + /* Set the CCMR1 mode values (leave CCMR2 zero) */ - ocmode2 = (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC4S_SHIFT) | - (ATIM_CCMR_MODE_PWM1 << ATIM_CCMR2_OC4M_SHIFT) | - ATIM_CCMR2_OC4PE; + ocmode1 |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC1S_SHIFT) | + (chanmode << ATIM_CCMR1_OC1M_SHIFT) | + ATIM_CCMR1_OC1PE; - /* Set the duty cycle by writing to the CCR register for this channel */ +#ifdef CONFIG_STM32_STM32F30XX + if (ocmbit) + { + ocmode1 |= ATIM_CCMR1_OC1M; + } +#endif - pwm_putreg(priv, STM32_GTIM_CCR4_OFFSET, (uint16_t)ccr); + /* Set the duty cycle by writing to the CCR register for this channel */ + + pwm_putreg(priv, STM32_GTIM_CCR1_OFFSET, (uint16_t)ccr); + } + break; + + case 2: /* PWM Mode configuration: Channel 2 */ + { + /* Select the CCER enable bit for this channel */ + + ccenable |= ATIM_CCER_CC2E; + + /* Set the CCMR1 mode values (leave CCMR2 zero) */ + + ocmode1 |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR1_CC2S_SHIFT) | + (chanmode << ATIM_CCMR1_OC2M_SHIFT) | + ATIM_CCMR1_OC2PE; + +#ifdef CONFIG_STM32_STM32F30XX + if (ocmbit) + { + ocmode1 |= ATIM_CCMR1_OC2M; + } +#endif + + /* Set the duty cycle by writing to the CCR register for this channel */ + + pwm_putreg(priv, STM32_GTIM_CCR2_OFFSET, (uint16_t)ccr); + } + break; + + case 3: /* PWM Mode configuration: Channel 3 */ + { + /* Select the CCER enable bit for this channel */ + + ccenable |= ATIM_CCER_CC3E; + + /* Set the CCMR2 mode values (leave CCMR1 zero) */ + + ocmode2 |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC3S_SHIFT) | + (chanmode << ATIM_CCMR2_OC3M_SHIFT) | + ATIM_CCMR2_OC3PE; + +#ifdef CONFIG_STM32_STM32F30XX + if (ocmbit) + { + ocmode2 |= ATIM_CCMR2_OC3M; + } +#endif + + /* Set the duty cycle by writing to the CCR register for this channel */ + + pwm_putreg(priv, STM32_GTIM_CCR3_OFFSET, (uint16_t)ccr); + } + break; + + case 4: /* PWM Mode configuration: Channel 4 */ + { + /* Select the CCER enable bit for this channel */ + + ccenable |= ATIM_CCER_CC4E; + + /* Set the CCMR2 mode values (leave CCMR1 zero) */ + + ocmode2 |= (ATIM_CCMR_CCS_CCOUT << ATIM_CCMR2_CC4S_SHIFT) | + (chanmode << ATIM_CCMR2_OC4M_SHIFT) | + ATIM_CCMR2_OC4PE; + +#ifdef CONFIG_STM32_STM32F30XX + if (ocmbit) + { + ocmode2 |= ATIM_CCMR2_OC4M; + } +#endif + + /* Set the duty cycle by writing to the CCR register for this channel */ + + pwm_putreg(priv, STM32_GTIM_CCR4_OFFSET, (uint16_t)ccr); + } + break; + + default: + pwmdbg("No such channel: %d\n", channel); + return -EINVAL; } - break; - - default: - pwmdbg("No such channel: %d\n", priv->channel); - return -EINVAL; } /* Disable the Channel by resetting the CCxE Bit in the CCER register */ @@ -866,9 +1501,17 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Reset the Output Compare Mode Bits and set the select output compare mode */ ccmr1 &= ~(ATIM_CCMR1_CC1S_MASK | ATIM_CCMR1_OC1M_MASK | ATIM_CCMR1_OC1PE | - ATIM_CCMR1_CC2S_MASK | ATIM_CCMR1_OC2M_MASK | ATIM_CCMR1_OC2PE); + ATIM_CCMR1_CC2S_MASK | ATIM_CCMR1_OC2M_MASK | ATIM_CCMR1_OC2PE +#ifdef CONFIG_STM32_STM32F30XX + | ATIM_CCMR1_OC1M | ATIM_CCMR1_OC2M +#endif + ); ccmr2 &= ~(ATIM_CCMR2_CC3S_MASK | ATIM_CCMR2_OC3M_MASK | ATIM_CCMR2_OC3PE | - ATIM_CCMR2_CC4S_MASK | ATIM_CCMR2_OC4M_MASK | ATIM_CCMR2_OC4PE); + ATIM_CCMR2_CC4S_MASK | ATIM_CCMR2_OC4M_MASK | ATIM_CCMR2_OC4PE +#ifdef CONFIG_STM32_STM32F30XX + | ATIM_CCMR2_OC3M | ATIM_CCMR2_OC4M +#endif + ); ccmr1 |= ocmode1; ccmr2 |= ocmode2; @@ -876,7 +1519,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, ccer &= ~(ATIM_CCER_CC1P | ATIM_CCER_CC2P | ATIM_CCER_CC3P | ATIM_CCER_CC4P); - /* Enable the output state of the selected channel (only) */ + /* Enable the output state of the selected channels */ ccer &= ~(ATIM_CCER_CC1E | ATIM_CCER_CC2E | ATIM_CCER_CC3E | ATIM_CCER_CC4E); ccer |= ccenable; @@ -892,7 +1535,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, * output compare N idle state. */ -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ + defined(CONFIG_STM32_STM32F40XX) ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP | ATIM_CCER_CC2NE | ATIM_CCER_CC2NP | ATIM_CCER_CC3NE | ATIM_CCER_CC3NP | ATIM_CCER_CC4NP); #else @@ -914,11 +1558,13 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, bdtr |= ATIM_BDTR_MOE; pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, bdtr); } -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ + defined(CONFIG_STM32_STM32F40XX) else #endif #endif -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ + defined(CONFIG_STM32_STM32F40XX) { ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP); } @@ -927,8 +1573,13 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Save the modified register values */ pwm_putreg(priv, STM32_GTIM_CR2_OFFSET, cr2); +#ifdef CONFIG_STM32_STM32F30XX + putreg32(ccmr1, priv->base + STM32_GTIM_CCMR1_OFFSET); + putreg32(ccmr2, priv->base + STM32_GTIM_CCMR2_OFFSET); +#else pwm_putreg(priv, STM32_GTIM_CCMR1_OFFSET, ccmr1); pwm_putreg(priv, STM32_GTIM_CCMR2_OFFSET, ccmr2); +#endif pwm_putreg(priv, STM32_GTIM_CCER_OFFSET, ccer); /* Set the ARR Preload Bit */ @@ -939,7 +1590,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Setup update interrupt. If info->count is > 0, then we can be * assured that pwm_start() has already verified: (1) that this is an - * advanced timer, and that (2) the repetitioncount is within range. + * advanced timer, and that (2) the repetition count is within range. */ #ifdef CONFIG_PWM_PULSECOUNT @@ -1222,6 +1873,24 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on) regaddr = STM32_RCC_APB1ENR; en_bit = RCC_APB1ENR_TIM14EN; break; +#endif +#ifdef CONFIG_STM32_TIM15_PWM + case 15: + regaddr = STM32_RCC_APB2ENR; + en_bit = RCC_APB2ENR_TIM15EN; + break; +#endif +#ifdef CONFIG_STM32_TIM16_PWM + case 16: + regaddr = STM32_RCC_APB2ENR; + en_bit = RCC_APB2ENR_TIM16EN; + break; +#endif +#ifdef CONFIG_STM32_TIM17_PWM + case 17: + regaddr = STM32_RCC_APB2ENR; + en_bit = RCC_APB2ENR_TIM17EN; + break; #endif } @@ -1260,18 +1929,32 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on) static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) { FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + uint32_t pincfg; + int i; - pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg); + pwmvdbg("TIM%d\n", priv->timid); pwm_dumpregs(priv, "Initially"); /* Enable APB1/2 clocking for timer. */ pwm_set_apb_clock(priv, true); - /* Configure the PWM output pin, but do not start the timer yet */ + /* Configure the PWM output pins, but do not start the timer yet */ + + for (i = 0; i < PWM_NCHANNELS; i++) + { + pincfg = priv->channels[i].pincfg; + if (pincfg == 0) + { + continue; + } + + pwmvdbg("pincfg: %08x\n", pincfg); + + stm32_configgpio(pincfg); + pwm_dumpgpio(pincfg, "PWM setup"); + } - stm32_configgpio(priv->pincfg); - pwm_dumpgpio(priv->pincfg, "PWM setup"); return OK; } @@ -1295,8 +1978,9 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) { FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; uint32_t pincfg; + int i; - pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg); + pwmvdbg("TIM%d\n", priv->timid); /* Make sure that the output has been stopped */ @@ -1306,20 +1990,34 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) pwm_set_apb_clock(priv, false); - /* Then put the GPIO pin back to the default state */ + /* Then put the GPIO pins back to the default state */ - pincfg = priv->pincfg & (GPIO_PORT_MASK | GPIO_PIN_MASK); + for (i = 0; i < PWM_NCHANNELS; i++) + { + pincfg = priv->channels[i].pincfg; + if (pincfg == 0) + { + continue; + } + + pwmvdbg("pincfg: %08x\n", pincfg); + + pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK); #if defined(CONFIG_STM32_STM32F10XX) - pincfg |= (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT); -#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) || defined(CONFIG_STM32_STM32L15XX) - pincfg |= (GPIO_INPUT | GPIO_FLOAT); + pincfg |= GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT; +#elif defined(CONFIG_STM32_STM32F20XX) || \ + defined(CONFIG_STM32_STM32F30XX) || \ + defined(CONFIG_STM32_STM32F40XX) || \ + defined(CONFIG_STM32_STM32L15XX) + pincfg |= GPIO_INPUT | GPIO_FLOAT; #else # error "Unrecognized STM32 chip" #endif - stm32_configgpio(pincfg); + stm32_configgpio(pincfg); + } + return OK; } @@ -1491,6 +2189,24 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) regaddr = STM32_RCC_APB1RSTR; resetbit = RCC_APB1RSTR_TIM14RST; break; +#endif +#ifdef CONFIG_STM32_TIM15_PWM + case 15: + regaddr = STM32_RCC_APB2RSTR; + resetbit = RCC_APB2RSTR_TIM15RST; + break; +#endif +#ifdef CONFIG_STM32_TIM16_PWM + case 16: + regaddr = STM32_RCC_APB2RSTR; + resetbit = RCC_APB2RSTR_TIM16RST; + break; +#endif +#ifdef CONFIG_STM32_TIM17_PWM + case 17: + regaddr = STM32_RCC_APB2RSTR; + resetbit = RCC_APB2RSTR_TIM17RST; + break; #endif } @@ -1552,7 +2268,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg * Input Parameters: * timer - A number identifying the timer use. The number of valid timer * IDs varies with the STM32 MCU and MCU family but is somewhere in - * the range of {1,..,14}. + * the range of {1,..,17}. * * Returned Value: * On success, a pointer to the STM32 lower half PWM driver is returned. @@ -1654,6 +2370,24 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer) break; #endif +#ifdef CONFIG_STM32_TIM15_PWM + case 15: + lower = &g_pwm15dev; + break; +#endif + +#ifdef CONFIG_STM32_TIM16_PWM + case 16: + lower = &g_pwm16dev; + break; +#endif + +#ifdef CONFIG_STM32_TIM17_PWM + case 17: + lower = &g_pwm17dev; + break; +#endif + default: pwmdbg("No such timer configured\n"); return NULL; @@ -1662,4 +2396,4 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer) return (FAR struct pwm_lowerhalf_s *)lower; } -#endif /* CONFIG_STM32_TIMn_PWM, n = 1,...,14 */ +#endif /* CONFIG_STM32_TIMn_PWM, n = 1,...,17 */ diff --git a/arch/arm/src/stm32/stm32_pwm.h b/arch/arm/src/stm32/stm32_pwm.h index 96764de9bc..e636ead3a3 100644 --- a/arch/arm/src/stm32/stm32_pwm.h +++ b/arch/arm/src/stm32/stm32_pwm.h @@ -2,7 +2,9 @@ * arch/arm/src/stm32/stm32_pwm.h * * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -96,6 +98,15 @@ #ifndef CONFIG_STM32_TIM14 # undef CONFIG_STM32_TIM14_PWM #endif +#ifndef CONFIG_STM32_TIM15 +# undef CONFIG_STM32_TIM15_PWM +#endif +#ifndef CONFIG_STM32_TIM16 +# undef CONFIG_STM32_TIM16_PWM +#endif +#ifndef CONFIG_STM32_TIM17 +# undef CONFIG_STM32_TIM17_PWM +#endif /* The basic timers (timer 6 and 7) are not capable of generating output pulses */ @@ -109,11 +120,597 @@ defined(CONFIG_STM32_TIM5_PWM) || defined(CONFIG_STM32_TIM8_PWM) || \ defined(CONFIG_STM32_TIM9_PWM) || defined(CONFIG_STM32_TIM10_PWM) || \ defined(CONFIG_STM32_TIM11_PWM) || defined(CONFIG_STM32_TIM12_PWM) || \ - defined(CONFIG_STM32_TIM13_PWM) || defined(CONFIG_STM32_TIM14_PWM) + defined(CONFIG_STM32_TIM13_PWM) || defined(CONFIG_STM32_TIM14_PWM) || \ + defined(CONFIG_STM32_TIM15_PWM) || defined(CONFIG_STM32_TIM16_PWM) || \ + defined(CONFIG_STM32_TIM17_PWM) #include #include "chip/stm32_tim.h" +#ifdef CONFIG_PWM_MULTICHAN + +#ifdef CONFIG_STM32_TIM1_CHANNEL1 +# ifdef CONFIG_STM32_TIM1_CH1OUT +# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT +# else +# define PWM_TIM1_CH1CFG 0 +# endif +# define PWM_TIM1_CHANNEL1 1 +#else +# define PWM_TIM1_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM1_CHANNEL2 +# ifdef CONFIG_STM32_TIM1_CH2OUT +# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT +# else +# define PWM_TIM1_CH2CFG 0 +# endif +# define PWM_TIM1_CHANNEL2 1 +#else +# define PWM_TIM1_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM1_CHANNEL3 +# ifdef CONFIG_STM32_TIM1_CH3OUT +# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT +# else +# define PWM_TIM1_CH3CFG 0 +# endif +# define PWM_TIM1_CHANNEL3 1 +#else +# define PWM_TIM1_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM1_CHANNEL4 +# ifdef CONFIG_STM32_TIM1_CH4OUT +# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT +# else +# define PWM_TIM1_CH4CFG 0 +# endif +# define PWM_TIM1_CHANNEL4 1 +#else +# define PWM_TIM1_CHANNEL4 0 +#endif +#define PWM_TIM1_NCHANNELS (PWM_TIM1_CHANNEL1 + PWM_TIM1_CHANNEL2 + \ + PWM_TIM1_CHANNEL3 + PWM_TIM1_CHANNEL4) + +#ifdef CONFIG_STM32_TIM2_CHANNEL1 +# ifdef CONFIG_STM32_TIM2_CH1OUT +# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT +# else +# define PWM_TIM2_CH1CFG 0 +# endif +# define PWM_TIM2_CHANNEL1 1 +#else +# define PWM_TIM2_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM2_CHANNEL2 +# ifdef CONFIG_STM32_TIM2_CH2OUT +# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT +# else +# define PWM_TIM2_CH2CFG 0 +# endif +# define PWM_TIM2_CHANNEL2 1 +#else +# define PWM_TIM2_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM2_CHANNEL3 +# ifdef CONFIG_STM32_TIM2_CH3OUT +# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT +# else +# define PWM_TIM2_CH3CFG 0 +# endif +# define PWM_TIM2_CHANNEL3 1 +#else +# define PWM_TIM2_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM2_CHANNEL4 +# ifdef CONFIG_STM32_TIM2_CH4OUT +# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT +# else +# define PWM_TIM2_CH4CFG 0 +# endif +# define PWM_TIM2_CHANNEL4 1 +#else +# define PWM_TIM2_CHANNEL4 0 +#endif +#define PWM_TIM2_NCHANNELS (PWM_TIM2_CHANNEL1 + PWM_TIM2_CHANNEL2 + \ + PWM_TIM2_CHANNEL3 + PWM_TIM2_CHANNEL4) + +#ifdef CONFIG_STM32_TIM3_CHANNEL1 +# ifdef CONFIG_STM32_TIM3_CH1OUT +# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT +# else +# define PWM_TIM3_CH1CFG 0 +# endif +# define PWM_TIM3_CHANNEL1 1 +#else +# define PWM_TIM3_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM3_CHANNEL2 +# ifdef CONFIG_STM32_TIM3_CH2OUT +# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT +# else +# define PWM_TIM3_CH2CFG 0 +# endif +# define PWM_TIM3_CHANNEL2 1 +#else +# define PWM_TIM3_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM3_CHANNEL3 +# ifdef CONFIG_STM32_TIM3_CH3OUT +# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT +# else +# define PWM_TIM3_CH3CFG 0 +# endif +# define PWM_TIM3_CHANNEL3 1 +#else +# define PWM_TIM3_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM3_CHANNEL4 +# ifdef CONFIG_STM32_TIM3_CH4OUT +# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT +# else +# define PWM_TIM3_CH4CFG 0 +# endif +# define PWM_TIM3_CHANNEL4 1 +#else +# define PWM_TIM3_CHANNEL4 0 +#endif +#define PWM_TIM3_NCHANNELS (PWM_TIM3_CHANNEL1 + PWM_TIM3_CHANNEL2 + \ + PWM_TIM3_CHANNEL3 + PWM_TIM3_CHANNEL4) + +#ifdef CONFIG_STM32_TIM4_CHANNEL1 +# ifdef CONFIG_STM32_TIM4_CH1OUT +# define PWM_TIM4_CH1CFG GPIO_TIM4_CH1OUT +# else +# define PWM_TIM4_CH1CFG 0 +# endif +# define PWM_TIM4_CHANNEL1 1 +#else +# define PWM_TIM4_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM4_CHANNEL2 +# ifdef CONFIG_STM32_TIM4_CH2OUT +# define PWM_TIM4_CH2CFG GPIO_TIM4_CH2OUT +# else +# define PWM_TIM4_CH2CFG 0 +# endif +# define PWM_TIM4_CHANNEL2 1 +#else +# define PWM_TIM4_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM4_CHANNEL3 +# ifdef CONFIG_STM32_TIM4_CH3OUT +# define PWM_TIM4_CH3CFG GPIO_TIM4_CH3OUT +# else +# define PWM_TIM4_CH3CFG 0 +# endif +# define PWM_TIM4_CHANNEL3 1 +#else +# define PWM_TIM4_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM4_CHANNEL4 +# ifdef CONFIG_STM32_TIM4_CH4OUT +# define PWM_TIM4_CH4CFG GPIO_TIM4_CH4OUT +# else +# define PWM_TIM4_CH4CFG 0 +# endif +# define PWM_TIM4_CHANNEL4 1 +#else +# define PWM_TIM4_CHANNEL4 0 +#endif +#define PWM_TIM4_NCHANNELS (PWM_TIM4_CHANNEL1 + PWM_TIM4_CHANNEL2 + \ + PWM_TIM4_CHANNEL3 + PWM_TIM4_CHANNEL4) + +#ifdef CONFIG_STM32_TIM5_CHANNEL1 +# ifdef CONFIG_STM32_TIM5_CH1OUT +# define PWM_TIM5_CH1CFG GPIO_TIM5_CH1OUT +# else +# define PWM_TIM5_CH1CFG 0 +# endif +# define PWM_TIM5_CHANNEL1 1 +#else +# define PWM_TIM5_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM5_CHANNEL2 +# ifdef CONFIG_STM32_TIM5_CH2OUT +# define PWM_TIM5_CH2CFG GPIO_TIM5_CH2OUT +# else +# define PWM_TIM5_CH2CFG 0 +# endif +# define PWM_TIM5_CHANNEL2 1 +#else +# define PWM_TIM5_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM5_CHANNEL3 +# ifdef CONFIG_STM32_TIM5_CH3OUT +# define PWM_TIM5_CH3CFG GPIO_TIM5_CH3OUT +# else +# define PWM_TIM5_CH3CFG 0 +# endif +# define PWM_TIM5_CHANNEL3 1 +#else +# define PWM_TIM5_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM5_CHANNEL4 +# ifdef CONFIG_STM32_TIM5_CH4OUT +# define PWM_TIM5_CH4CFG GPIO_TIM5_CH4OUT +# else +# define PWM_TIM5_CH4CFG 0 +# endif +# define PWM_TIM5_CHANNEL4 1 +#else +# define PWM_TIM5_CHANNEL4 0 +#endif +#define PWM_TIM5_NCHANNELS (PWM_TIM5_CHANNEL1 + PWM_TIM5_CHANNEL2 + \ + PWM_TIM5_CHANNEL3 + PWM_TIM5_CHANNEL4) + +#ifdef CONFIG_STM32_TIM8_CHANNEL1 +# ifdef CONFIG_STM32_TIM8_CH1OUT +# define PWM_TIM8_CH1CFG GPIO_TIM8_CH1OUT +# else +# define PWM_TIM8_CH1CFG 0 +# endif +# define PWM_TIM8_CHANNEL1 1 +#else +# define PWM_TIM8_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM8_CHANNEL2 +# ifdef CONFIG_STM32_TIM8_CH2OUT +# define PWM_TIM8_CH2CFG GPIO_TIM8_CH2OUT +# else +# define PWM_TIM8_CH2CFG 0 +# endif +# define PWM_TIM8_CHANNEL2 1 +#else +# define PWM_TIM8_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM8_CHANNEL3 +# ifdef CONFIG_STM32_TIM8_CH3OUT +# define PWM_TIM8_CH3CFG GPIO_TIM8_CH3OUT +# else +# define PWM_TIM8_CH3CFG 0 +# endif +# define PWM_TIM8_CHANNEL3 1 +#else +# define PWM_TIM8_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM8_CHANNEL4 +# ifdef CONFIG_STM32_TIM8_CH4OUT +# define PWM_TIM8_CH4CFG GPIO_TIM8_CH4OUT +# else +# define PWM_TIM8_CH4CFG 0 +# endif +# define PWM_TIM8_CHANNEL4 1 +#else +# define PWM_TIM8_CHANNEL4 0 +#endif +#define PWM_TIM8_NCHANNELS (PWM_TIM8_CHANNEL1 + PWM_TIM8_CHANNEL2 + \ + PWM_TIM8_CHANNEL3 + PWM_TIM8_CHANNEL4) + +#ifdef CONFIG_STM32_TIM9_CHANNEL1 +# ifdef CONFIG_STM32_TIM9_CH1OUT +# define PWM_TIM9_CH1CFG GPIO_TIM9_CH1OUT +# else +# define PWM_TIM9_CH1CFG 0 +# endif +# define PWM_TIM9_CHANNEL1 1 +#else +# define PWM_TIM9_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM9_CHANNEL2 +# ifdef CONFIG_STM32_TIM9_CH2OUT +# define PWM_TIM9_CH2CFG GPIO_TIM9_CH2OUT +# else +# define PWM_TIM9_CH2CFG 0 +# endif +# define PWM_TIM9_CHANNEL2 1 +#else +# define PWM_TIM9_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM9_CHANNEL3 +# ifdef CONFIG_STM32_TIM9_CH3OUT +# define PWM_TIM9_CH3CFG GPIO_TIM9_CH3OUT +# else +# define PWM_TIM9_CH3CFG 0 +# endif +# define PWM_TIM9_CHANNEL3 1 +#else +# define PWM_TIM9_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM9_CHANNEL4 +# ifdef CONFIG_STM32_TIM9_CH4OUT +# define PWM_TIM9_CH4CFG GPIO_TIM9_CH4OUT +# else +# define PWM_TIM9_CH4CFG 0 +# endif +# define PWM_TIM9_CHANNEL4 1 +#else +# define PWM_TIM9_CHANNEL4 0 +#endif +#define PWM_TIM9_NCHANNELS (PWM_TIM9_CHANNEL1 + PWM_TIM9_CHANNEL2 + \ + PWM_TIM9_CHANNEL3 + PWM_TIM9_CHANNEL4) + +#ifdef CONFIG_STM32_TIM10_CHANNEL1 +# ifdef CONFIG_STM32_TIM10_CH1OUT +# define PWM_TIM10_CH1CFG GPIO_TIM10_CH1OUT +# else +# define PWM_TIM10_CH1CFG 0 +# endif +# define PWM_TIM10_CHANNEL1 1 +#else +# define PWM_TIM10_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM10_CHANNEL2 +# ifdef CONFIG_STM32_TIM10_CH2OUT +# define PWM_TIM10_CH2CFG GPIO_TIM10_CH2OUT +# else +# define PWM_TIM10_CH2CFG 0 +# endif +# define PWM_TIM10_CHANNEL2 1 +#else +# define PWM_TIM10_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM10_CHANNEL3 +# ifdef CONFIG_STM32_TIM10_CH3OUT +# define PWM_TIM10_CH3CFG GPIO_TIM10_CH3OUT +# else +# define PWM_TIM10_CH3CFG 0 +# endif +# define PWM_TIM10_CHANNEL3 1 +#else +# define PWM_TIM10_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM10_CHANNEL4 +# ifdef CONFIG_STM32_TIM10_CH4OUT +# define PWM_TIM10_CH4CFG GPIO_TIM10_CH4OUT +# else +# define PWM_TIM10_CH4CFG 0 +# endif +# define PWM_TIM10_CHANNEL4 1 +#else +# define PWM_TIM10_CHANNEL4 0 +#endif +#define PWM_TIM10_NCHANNELS (PWM_TIM10_CHANNEL1 + PWM_TIM10_CHANNEL2 + \ + PWM_TIM10_CHANNEL3 + PWM_TIM10_CHANNEL4) + +#ifdef CONFIG_STM32_TIM11_CHANNEL1 +# ifdef CONFIG_STM32_TIM11_CH1OUT +# define PWM_TIM11_CH1CFG GPIO_TIM11_CH1OUT +# else +# define PWM_TIM11_CH1CFG 0 +# endif +# define PWM_TIM11_CHANNEL1 1 +#else +# define PWM_TIM11_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM11_CHANNEL2 +# ifdef CONFIG_STM32_TIM11_CH2OUT +# define PWM_TIM11_CH2CFG GPIO_TIM11_CH2OUT +# else +# define PWM_TIM11_CH2CFG 0 +# endif +# define PWM_TIM11_CHANNEL2 1 +#else +# define PWM_TIM11_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM11_CHANNEL3 +# ifdef CONFIG_STM32_TIM11_CH3OUT +# define PWM_TIM11_CH3CFG GPIO_TIM11_CH3OUT +# else +# define PWM_TIM11_CH3CFG 0 +# endif +# define PWM_TIM11_CHANNEL3 1 +#else +# define PWM_TIM11_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM11_CHANNEL4 +# ifdef CONFIG_STM32_TIM11_CH4OUT +# define PWM_TIM11_CH4CFG GPIO_TIM11_CH4OUT +# else +# define PWM_TIM11_CH4CFG 0 +# endif +# define PWM_TIM11_CHANNEL4 1 +#else +# define PWM_TIM11_CHANNEL4 0 +#endif +#define PWM_TIM11_NCHANNELS (PWM_TIM11_CHANNEL1 + PWM_TIM11_CHANNEL2 + \ + PWM_TIM11_CHANNEL3 + PWM_TIM11_CHANNEL4) + +#ifdef CONFIG_STM32_TIM12_CHANNEL1 +# ifdef CONFIG_STM32_TIM12_CH1OUT +# define PWM_TIM12_CH1CFG GPIO_TIM12_CH1OUT +# else +# define PWM_TIM12_CH1CFG 0 +# endif +# define PWM_TIM12_CHANNEL1 1 +#else +# define PWM_TIM12_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM12_CHANNEL2 +# ifdef CONFIG_STM32_TIM12_CH2OUT +# define PWM_TIM12_CH2CFG GPIO_TIM12_CH2OUT +# else +# define PWM_TIM12_CH2CFG 0 +# endif +# define PWM_TIM12_CHANNEL2 1 +#else +# define PWM_TIM12_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM12_CHANNEL3 +# ifdef CONFIG_STM32_TIM12_CH3OUT +# define PWM_TIM12_CH3CFG GPIO_TIM12_CH3OUT +# else +# define PWM_TIM12_CH3CFG 0 +# endif +# define PWM_TIM12_CHANNEL3 1 +#else +# define PWM_TIM12_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM12_CHANNEL4 +# ifdef CONFIG_STM32_TIM12_CH4OUT +# define PWM_TIM12_CH4CFG GPIO_TIM12_CH4OUT +# else +# define PWM_TIM12_CH4CFG 0 +# endif +# define PWM_TIM12_CHANNEL4 1 +#else +# define PWM_TIM12_CHANNEL4 0 +#endif +#define PWM_TIM12_NCHANNELS (PWM_TIM12_CHANNEL1 + PWM_TIM12_CHANNEL2 + \ + PWM_TIM12_CHANNEL3 + PWM_TIM12_CHANNEL4) + +#ifdef CONFIG_STM32_TIM13_CHANNEL1 +# ifdef CONFIG_STM32_TIM13_CH1OUT +# define PWM_TIM13_CH1CFG GPIO_TIM13_CH1OUT +# else +# define PWM_TIM13_CH1CFG 0 +# endif +# define PWM_TIM13_CHANNEL1 1 +#else +# define PWM_TIM13_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM13_CHANNEL2 +# ifdef CONFIG_STM32_TIM13_CH2OUT +# define PWM_TIM13_CH2CFG GPIO_TIM13_CH2OUT +# else +# define PWM_TIM13_CH2CFG 0 +# endif +# define PWM_TIM13_CHANNEL2 1 +#else +# define PWM_TIM13_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM13_CHANNEL3 +# ifdef CONFIG_STM32_TIM13_CH3OUT +# define PWM_TIM13_CH3CFG GPIO_TIM13_CH3OUT +# else +# define PWM_TIM13_CH3CFG 0 +# endif +# define PWM_TIM13_CHANNEL3 1 +#else +# define PWM_TIM13_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM13_CHANNEL4 +# ifdef CONFIG_STM32_TIM13_CH4OUT +# define PWM_TIM13_CH4CFG GPIO_TIM13_CH4OUT +# else +# define PWM_TIM13_CH4CFG 0 +# endif +# define PWM_TIM13_CHANNEL4 1 +#else +# define PWM_TIM13_CHANNEL4 0 +#endif +#define PWM_TIM13_NCHANNELS (PWM_TIM13_CHANNEL1 + PWM_TIM13_CHANNEL2 + \ + PWM_TIM13_CHANNEL3 + PWM_TIM13_CHANNEL4) + +#ifdef CONFIG_STM32_TIM14_CHANNEL1 +# ifdef CONFIG_STM32_TIM14_CH1OUT +# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT +# else +# define PWM_TIM14_CH1CFG 0 +# endif +# define PWM_TIM14_CHANNEL1 1 +#else +# define PWM_TIM14_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM14_CHANNEL2 +# ifdef CONFIG_STM32_TIM14_CH2OUT +# define PWM_TIM14_CH2CFG GPIO_TIM14_CH2OUT +# else +# define PWM_TIM14_CH2CFG 0 +# endif +# define PWM_TIM14_CHANNEL2 1 +#else +# define PWM_TIM14_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32_TIM14_CHANNEL3 +# ifdef CONFIG_STM32_TIM14_CH3OUT +# define PWM_TIM14_CH3CFG GPIO_TIM14_CH3OUT +# else +# define PWM_TIM14_CH3CFG 0 +# endif +# define PWM_TIM14_CHANNEL3 1 +#else +# define PWM_TIM14_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32_TIM14_CHANNEL4 +# ifdef CONFIG_STM32_TIM14_CH4OUT +# define PWM_TIM14_CH4CFG GPIO_TIM14_CH4OUT +# else +# define PWM_TIM14_CH4CFG 0 +# endif +# define PWM_TIM14_CHANNEL4 1 +#else +# define PWM_TIM14_CHANNEL4 0 +#endif +#define PWM_TIM14_NCHANNELS (PWM_TIM14_CHANNEL1 + PWM_TIM14_CHANNEL2 + \ + PWM_TIM14_CHANNEL3 + PWM_TIM14_CHANNEL4) + +#ifdef CONFIG_STM32_TIM15_CHANNEL1 +# ifdef CONFIG_STM32_TIM15_CH1OUT +# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT +# else +# define PWM_TIM15_CH1CFG 0 +# endif +# define PWM_TIM15_CHANNEL1 1 +#else +# define PWM_TIM15_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32_TIM15_CHANNEL2 +# ifdef CONFIG_STM32_TIM15_CH2OUT +# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT +# else +# define PWM_TIM15_CH2CFG 0 +# endif +# define PWM_TIM15_CHANNEL2 1 +#else +# define PWM_TIM15_CHANNEL2 0 +#endif +#define PWM_TIM15_NCHANNELS (PWM_TIM15_CHANNEL1 + PWM_TIM15_CHANNEL2) + +#ifdef CONFIG_STM32_TIM16_CHANNEL1 +# ifdef CONFIG_STM32_TIM16_CH1OUT +# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT +# else +# define PWM_TIM16_CH1CFG 0 +# endif +# define PWM_TIM16_CHANNEL1 1 +#else +# define PWM_TIM16_CHANNEL1 0 +#endif +#define PWM_TIM16_NCHANNELS PWM_TIM16_CHANNEL1 + +#ifdef CONFIG_STM32_TIM17_CHANNEL1 +# ifdef CONFIG_STM32_TIM17_CH1OUT +# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT +# else +# define PWM_TIM17_CH1CFG 0 +# endif +# define PWM_TIM17_CHANNEL1 1 +#else +# define PWM_TIM17_CHANNEL1 0 +#endif +#define PWM_TIM17_NCHANNELS PWM_TIM17_CHANNEL1 + +#define PWM_MAX(a, b) ((a) > (b) ? (a) : (b)) + +#define PWM_NCHANNELS PWM_MAX(PWM_TIM1_NCHANNELS, \ + PWM_MAX(PWM_TIM2_NCHANNELS, \ + PWM_MAX(PWM_TIM3_NCHANNELS, \ + PWM_MAX(PWM_TIM4_NCHANNELS, \ + PWM_MAX(PWM_TIM5_NCHANNELS, \ + PWM_MAX(PWM_TIM8_NCHANNELS, \ + PWM_MAX(PWM_TIM9_NCHANNELS, \ + PWM_MAX(PWM_TIM10_NCHANNELS, \ + PWM_MAX(PWM_TIM11_NCHANNELS, \ + PWM_MAX(PWM_TIM12_NCHANNELS, \ + PWM_MAX(PWM_TIM13_NCHANNELS, \ + PWM_MAX(PWM_TIM14_NCHANNELS, \ + PWM_MAX(PWM_TIM15_NCHANNELS, \ + PWM_MAX(PWM_TIM16_NCHANNELS, \ + PWM_TIM17_NCHANNELS)))))))))))))) + +#else + /* For each timer that is enabled for PWM usage, we need the following additional * configuration settings: * @@ -131,13 +728,21 @@ # if !defined(CONFIG_STM32_TIM1_CHANNEL) # error "CONFIG_STM32_TIM1_CHANNEL must be provided" # elif CONFIG_STM32_TIM1_CHANNEL == 1 -# define PWM_TIM1_PINCFG GPIO_TIM1_CH1OUT +# define CONFIG_STM32_TIM1_CHANNEL1 1 +# define CONFIG_STM32_TIM1_CH1MODE CONFIG_STM32_TIM1_CHMODE +# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT # elif CONFIG_STM32_TIM1_CHANNEL == 2 -# define PWM_TIM1_PINCFG GPIO_TIM1_CH2OUT +# define CONFIG_STM32_TIM1_CHANNEL2 1 +# define CONFIG_STM32_TIM1_CH2MODE CONFIG_STM32_TIM1_CHMODE +# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT # elif CONFIG_STM32_TIM1_CHANNEL == 3 -# define PWM_TIM1_PINCFG GPIO_TIM1_CH3OUT +# define CONFIG_STM32_TIM1_CHANNEL3 1 +# define CONFIG_STM32_TIM1_CH3MODE CONFIG_STM32_TIM1_CHMODE +# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT # elif CONFIG_STM32_TIM1_CHANNEL == 4 -# define PWM_TIM1_PINCFG GPIO_TIM1_CH4OUT +# define CONFIG_STM32_TIM1_CHANNEL4 1 +# define CONFIG_STM32_TIM1_CH4MODE CONFIG_STM32_TIM1_CHMODE +# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM1_CHANNEL" # endif @@ -147,13 +752,21 @@ # if !defined(CONFIG_STM32_TIM2_CHANNEL) # error "CONFIG_STM32_TIM2_CHANNEL must be provided" # elif CONFIG_STM32_TIM2_CHANNEL == 1 -# define PWM_TIM2_PINCFG GPIO_TIM2_CH1OUT +# define CONFIG_STM32_TIM2_CHANNEL1 1 +# define CONFIG_STM32_TIM2_CH1MODE CONFIG_STM32_TIM2_CHMODE +# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT # elif CONFIG_STM32_TIM2_CHANNEL == 2 -# define PWM_TIM2_PINCFG GPIO_TIM2_CH2OUT +# define CONFIG_STM32_TIM2_CHANNEL2 1 +# define CONFIG_STM32_TIM2_CH2MODE CONFIG_STM32_TIM2_CHMODE +# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT # elif CONFIG_STM32_TIM2_CHANNEL == 3 -# define PWM_TIM2_PINCFG GPIO_TIM2_CH3OUT +# define CONFIG_STM32_TIM2_CHANNEL3 1 +# define CONFIG_STM32_TIM2_CH3MODE CONFIG_STM32_TIM2_CHMODE +# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT # elif CONFIG_STM32_TIM2_CHANNEL == 4 -# define PWM_TIM2_PINCFG GPIO_TIM2_CH4OUT +# define CONFIG_STM32_TIM2_CHANNEL4 1 +# define CONFIG_STM32_TIM2_CH4MODE CONFIG_STM32_TIM2_CHMODE +# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM2_CHANNEL" # endif @@ -163,13 +776,21 @@ # if !defined(CONFIG_STM32_TIM3_CHANNEL) # error "CONFIG_STM32_TIM3_CHANNEL must be provided" # elif CONFIG_STM32_TIM3_CHANNEL == 1 -# define PWM_TIM3_PINCFG GPIO_TIM3_CH1OUT +# define CONFIG_STM32_TIM3_CHANNEL1 1 +# define CONFIG_STM32_TIM3_CH1MODE CONFIG_STM32_TIM3_CHMODE +# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT # elif CONFIG_STM32_TIM3_CHANNEL == 2 -# define PWM_TIM3_PINCFG GPIO_TIM3_CH2OUT +# define CONFIG_STM32_TIM3_CHANNEL2 1 +# define CONFIG_STM32_TIM3_CH2MODE CONFIG_STM32_TIM3_CHMODE +# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT # elif CONFIG_STM32_TIM3_CHANNEL == 3 -# define PWM_TIM3_PINCFG GPIO_TIM3_CH3OUT +# define CONFIG_STM32_TIM3_CHANNEL3 1 +# define CONFIG_STM32_TIM3_CH3MODE CONFIG_STM32_TIM3_CHMODE +# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT # elif CONFIG_STM32_TIM3_CHANNEL == 4 -# define PWM_TIM3_PINCFG GPIO_TIM3_CH4OUT +# define CONFIG_STM32_TIM3_CHANNEL4 1 +# define CONFIG_STM32_TIM3_CH4MODE CONFIG_STM32_TIM3_CHMODE +# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM3_CHANNEL" # endif @@ -179,13 +800,21 @@ # if !defined(CONFIG_STM32_TIM4_CHANNEL) # error "CONFIG_STM32_TIM4_CHANNEL must be provided" # elif CONFIG_STM32_TIM4_CHANNEL == 1 -# define PWM_TIM4_PINCFG GPIO_TIM4_CH1OUT +# define CONFIG_STM32_TIM4_CHANNEL1 1 +# define CONFIG_STM32_TIM4_CH1MODE CONFIG_STM32_TIM4_CHMODE +# define PWM_TIM4_CH1CFG GPIO_TIM4_CH1OUT # elif CONFIG_STM32_TIM4_CHANNEL == 2 -# define PWM_TIM4_PINCFG GPIO_TIM4_CH2OUT +# define CONFIG_STM32_TIM4_CHANNEL2 1 +# define CONFIG_STM32_TIM4_CH2MODE CONFIG_STM32_TIM4_CHMODE +# define PWM_TIM4_CH2CFG GPIO_TIM4_CH2OUT # elif CONFIG_STM32_TIM4_CHANNEL == 3 -# define PWM_TIM4_PINCFG GPIO_TIM4_CH3OUT +# define CONFIG_STM32_TIM4_CHANNEL3 1 +# define CONFIG_STM32_TIM4_CH3MODE CONFIG_STM32_TIM4_CHMODE +# define PWM_TIM4_CH3CFG GPIO_TIM4_CH3OUT # elif CONFIG_STM32_TIM4_CHANNEL == 4 -# define PWM_TIM4_PINCFG GPIO_TIM4_CH4OUT +# define CONFIG_STM32_TIM4_CHANNEL4 1 +# define CONFIG_STM32_TIM4_CH4MODE CONFIG_STM32_TIM4_CHMODE +# define PWM_TIM4_CH4CFG GPIO_TIM4_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM4_CHANNEL" # endif @@ -195,13 +824,21 @@ # if !defined(CONFIG_STM32_TIM5_CHANNEL) # error "CONFIG_STM32_TIM5_CHANNEL must be provided" # elif CONFIG_STM32_TIM5_CHANNEL == 1 -# define PWM_TIM5_PINCFG GPIO_TIM5_CH1OUT +# define CONFIG_STM32_TIM5_CHANNEL1 1 +# define CONFIG_STM32_TIM5_CH1MODE CONFIG_STM32_TIM5_CHMODE +# define PWM_TIM5_CH1CFG GPIO_TIM5_CH1OUT # elif CONFIG_STM32_TIM5_CHANNEL == 2 -# define PWM_TIM5_PINCFG GPIO_TIM5_CH2OUT +# define CONFIG_STM32_TIM5_CHANNEL2 1 +# define CONFIG_STM32_TIM5_CH2MODE CONFIG_STM32_TIM5_CHMODE +# define PWM_TIM5_CH2CFG GPIO_TIM5_CH2OUT # elif CONFIG_STM32_TIM5_CHANNEL == 3 -# define PWM_TIM5_PINCFG GPIO_TIM5_CH3OUT +# define CONFIG_STM32_TIM5_CHANNEL3 1 +# define CONFIG_STM32_TIM5_CH3MODE CONFIG_STM32_TIM5_CHMODE +# define PWM_TIM5_CH3CFG GPIO_TIM5_CH3OUT # elif CONFIG_STM32_TIM5_CHANNEL == 4 -# define PWM_TIM5_PINCFG GPIO_TIM5_CH4OUT +# define CONFIG_STM32_TIM5_CHANNEL4 1 +# define CONFIG_STM32_TIM5_CH4MODE CONFIG_STM32_TIM5_CHMODE +# define PWM_TIM5_CH4CFG GPIO_TIM5_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM5_CHANNEL" # endif @@ -211,13 +848,21 @@ # if !defined(CONFIG_STM32_TIM8_CHANNEL) # error "CONFIG_STM32_TIM8_CHANNEL must be provided" # elif CONFIG_STM32_TIM8_CHANNEL == 1 -# define PWM_TIM8_PINCFG GPIO_TIM8_CH1OUT +# define CONFIG_STM32_TIM8_CHANNEL1 1 +# define CONFIG_STM32_TIM8_CH1MODE CONFIG_STM32_TIM8_CHMODE +# define PWM_TIM8_CH1CFG GPIO_TIM8_CH1OUT # elif CONFIG_STM32_TIM8_CHANNEL == 2 -# define PWM_TIM8_PINCFG GPIO_TIM8_CH2OUT +# define CONFIG_STM32_TIM8_CHANNEL2 1 +# define CONFIG_STM32_TIM8_CH2MODE CONFIG_STM32_TIM8_CHMODE +# define PWM_TIM8_CH2CFG GPIO_TIM8_CH2OUT # elif CONFIG_STM32_TIM8_CHANNEL == 3 -# define PWM_TIM8_PINCFG GPIO_TIM8_CH3OUT +# define CONFIG_STM32_TIM8_CHANNEL3 1 +# define CONFIG_STM32_TIM8_CH3MODE CONFIG_STM32_TIM8_CHMODE +# define PWM_TIM8_CH3CFG GPIO_TIM8_CH3OUT # elif CONFIG_STM32_TIM8_CHANNEL == 4 -# define PWM_TIM8_PINCFG GPIO_TIM8_CH4OUT +# define CONFIG_STM32_TIM8_CHANNEL4 1 +# define CONFIG_STM32_TIM8_CH4MODE CONFIG_STM32_TIM8_CHMODE +# define PWM_TIM8_CH4CFG GPIO_TIM8_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM8_CHANNEL" # endif @@ -227,13 +872,21 @@ # if !defined(CONFIG_STM32_TIM9_CHANNEL) # error "CONFIG_STM32_TIM9_CHANNEL must be provided" # elif CONFIG_STM32_TIM9_CHANNEL == 1 -# define PWM_TIM9_PINCFG GPIO_TIM9_CH1OUT +# define CONFIG_STM32_TIM9_CHANNEL1 1 +# define CONFIG_STM32_TIM9_CH1MODE CONFIG_STM32_TIM9_CHMODE +# define PWM_TIM9_CH1CFG GPIO_TIM9_CH1OUT # elif CONFIG_STM32_TIM9_CHANNEL == 2 -# define PWM_TIM9_PINCFG GPIO_TIM9_CH2OUT +# define CONFIG_STM32_TIM9_CHANNEL2 1 +# define CONFIG_STM32_TIM9_CH2MODE CONFIG_STM32_TIM9_CHMODE +# define PWM_TIM9_CH2CFG GPIO_TIM9_CH2OUT # elif CONFIG_STM32_TIM9_CHANNEL == 3 -# define PWM_TIM9_PINCFG GPIO_TIM9_CH3OUT +# define CONFIG_STM32_TIM9_CHANNEL3 1 +# define CONFIG_STM32_TIM9_CH3MODE CONFIG_STM32_TIM9_CHMODE +# define PWM_TIM9_CH3CFG GPIO_TIM9_CH3OUT # elif CONFIG_STM32_TIM9_CHANNEL == 4 -# define PWM_TIM9_PINCFG GPIO_TIM9_CH4OUT +# define CONFIG_STM32_TIM9_CHANNEL4 1 +# define CONFIG_STM32_TIM9_CH4MODE CONFIG_STM32_TIM9_CHMODE +# define PWM_TIM9_CH4CFG GPIO_TIM9_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM9_CHANNEL" # endif @@ -243,13 +896,21 @@ # if !defined(CONFIG_STM32_TIM10_CHANNEL) # error "CONFIG_STM32_TIM10_CHANNEL must be provided" # elif CONFIG_STM32_TIM10_CHANNEL == 1 -# define PWM_TIM10_PINCFG GPIO_TIM10_CH1OUT +# define CONFIG_STM32_TIM10_CHANNEL1 1 +# define CONFIG_STM32_TIM10_CH1MODE CONFIG_STM32_TIM10_CHMODE +# define PWM_TIM10_CH1CFG GPIO_TIM10_CH1OUT # elif CONFIG_STM32_TIM10_CHANNEL == 2 -# define PWM_TIM10_PINCFG GPIO_TIM10_CH2OUT +# define CONFIG_STM32_TIM10_CHANNEL2 1 +# define CONFIG_STM32_TIM10_CH2MODE CONFIG_STM32_TIM10_CHMODE +# define PWM_TIM10_CH2CFG GPIO_TIM10_CH2OUT # elif CONFIG_STM32_TIM10_CHANNEL == 3 -# define PWM_TIM10_PINCFG GPIO_TIM10_CH3OUT +# define CONFIG_STM32_TIM10_CHANNEL3 1 +# define CONFIG_STM32_TIM10_CH3MODE CONFIG_STM32_TIM10_CHMODE +# define PWM_TIM10_CH3CFG GPIO_TIM10_CH3OUT # elif CONFIG_STM32_TIM10_CHANNEL == 4 -# define PWM_TIM10_PINCFG GPIO_TIM10_CH4OUT +# define CONFIG_STM32_TIM10_CHANNEL4 1 +# define CONFIG_STM32_TIM10_CH4MODE CONFIG_STM32_TIM10_CHMODE +# define PWM_TIM10_CH4CFG GPIO_TIM10_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM10_CHANNEL" # endif @@ -259,13 +920,21 @@ # if !defined(CONFIG_STM32_TIM11_CHANNEL) # error "CONFIG_STM32_TIM11_CHANNEL must be provided" # elif CONFIG_STM32_TIM11_CHANNEL == 1 -# define PWM_TIM11_PINCFG GPIO_TIM11_CH1OUT +# define CONFIG_STM32_TIM11_CHANNEL1 1 +# define CONFIG_STM32_TIM11_CH1MODE CONFIG_STM32_TIM11_CHMODE +# define PWM_TIM11_CH1CFG GPIO_TIM11_CH1OUT # elif CONFIG_STM32_TIM11_CHANNEL == 2 -# define PWM_TIM11_PINCFG GPIO_TIM11_CH2OUT +# define CONFIG_STM32_TIM11_CHANNEL2 1 +# define CONFIG_STM32_TIM11_CH2MODE CONFIG_STM32_TIM11_CHMODE +# define PWM_TIM11_CH2CFG GPIO_TIM11_CH2OUT # elif CONFIG_STM32_TIM11_CHANNEL == 3 -# define PWM_TIM11_PINCFG GPIO_TIM11_CH3OUT +# define CONFIG_STM32_TIM11_CHANNEL3 1 +# define CONFIG_STM32_TIM11_CH3MODE CONFIG_STM32_TIM11_CHMODE +# define PWM_TIM11_CH3CFG GPIO_TIM11_CH3OUT # elif CONFIG_STM32_TIM11_CHANNEL == 4 -# define PWM_TIM11_PINCFG GPIO_TIM11_CH4OUT +# define CONFIG_STM32_TIM11_CHANNEL4 1 +# define CONFIG_STM32_TIM11_CH4MODE CONFIG_STM32_TIM11_CHMODE +# define PWM_TIM11_CH4CFG GPIO_TIM11_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM11_CHANNEL" # endif @@ -275,13 +944,21 @@ # if !defined(CONFIG_STM32_TIM12_CHANNEL) # error "CONFIG_STM32_TIM12_CHANNEL must be provided" # elif CONFIG_STM32_TIM12_CHANNEL == 1 -# define PWM_TIM12_PINCFG GPIO_TIM12_CH1OUT +# define CONFIG_STM32_TIM12_CHANNEL1 1 +# define CONFIG_STM32_TIM12_CH1MODE CONFIG_STM32_TIM12_CHMODE +# define PWM_TIM12_CH1CFG GPIO_TIM12_CH1OUT # elif CONFIG_STM32_TIM12_CHANNEL == 2 -# define PWM_TIM12_PINCFG GPIO_TIM12_CH2OUT +# define CONFIG_STM32_TIM12_CHANNEL2 1 +# define CONFIG_STM32_TIM12_CH2MODE CONFIG_STM32_TIM12_CHMODE +# define PWM_TIM12_CH2CFG GPIO_TIM12_CH2OUT # elif CONFIG_STM32_TIM12_CHANNEL == 3 -# define PWM_TIM12_PINCFG GPIO_TIM12_CH3OUT +# define CONFIG_STM32_TIM12_CHANNEL3 1 +# define CONFIG_STM32_TIM12_CH3MODE CONFIG_STM32_TIM12_CHMODE +# define PWM_TIM12_CH3CFG GPIO_TIM12_CH3OUT # elif CONFIG_STM32_TIM12_CHANNEL == 4 -# define PWM_TIM12_PINCFG GPIO_TIM12_CH4OUT +# define CONFIG_STM32_TIM12_CHANNEL4 1 +# define CONFIG_STM32_TIM12_CH4MODE CONFIG_STM32_TIM12_CHMODE +# define PWM_TIM12_CH4CFG GPIO_TIM12_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM12_CHANNEL" # endif @@ -291,13 +968,21 @@ # if !defined(CONFIG_STM32_TIM13_CHANNEL) # error "CONFIG_STM32_TIM13_CHANNEL must be provided" # elif CONFIG_STM32_TIM13_CHANNEL == 1 -# define PWM_TIM13_PINCFG GPIO_TIM13_CH1OUT +# define CONFIG_STM32_TIM13_CHANNEL1 1 +# define CONFIG_STM32_TIM13_CH1MODE CONFIG_STM32_TIM13_CHMODE +# define PWM_TIM13_CH1CFG GPIO_TIM13_CH1OUT # elif CONFIG_STM32_TIM13_CHANNEL == 2 -# define PWM_TIM13_PINCFG GPIO_TIM13_CH2OUT +# define CONFIG_STM32_TIM13_CHANNEL2 1 +# define CONFIG_STM32_TIM13_CH2MODE CONFIG_STM32_TIM13_CHMODE +# define PWM_TIM13_CH2CFG GPIO_TIM13_CH2OUT # elif CONFIG_STM32_TIM13_CHANNEL == 3 -# define PWM_TIM13_PINCFG GPIO_TIM13_CH3OUT +# define CONFIG_STM32_TIM13_CHANNEL3 1 +# define CONFIG_STM32_TIM13_CH3MODE CONFIG_STM32_TIM13_CHMODE +# define PWM_TIM13_CH3CFG GPIO_TIM13_CH3OUT # elif CONFIG_STM32_TIM13_CHANNEL == 4 -# define PWM_TIM13_PINCFG GPIO_TIM13_CH4OUT +# define CONFIG_STM32_TIM13_CHANNEL4 1 +# define CONFIG_STM32_TIM13_CH4MODE CONFIG_STM32_TIM13_CHMODE +# define PWM_TIM13_CH4CFG GPIO_TIM13_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM13_CHANNEL" # endif @@ -307,18 +992,70 @@ # if !defined(CONFIG_STM32_TIM14_CHANNEL) # error "CONFIG_STM32_TIM14_CHANNEL must be provided" # elif CONFIG_STM32_TIM14_CHANNEL == 1 -# define PWM_TIM14_PINCFG GPIO_TIM14_CH1OUT +# define CONFIG_STM32_TIM14_CHANNEL1 1 +# define CONFIG_STM32_TIM14_CH1MODE CONFIG_STM32_TIM14_CHMODE +# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT # elif CONFIG_STM32_TIM14_CHANNEL == 2 -# define PWM_TIM14_PINCFG GPIO_TIM14_CH2OUT +# define CONFIG_STM32_TIM14_CHANNEL2 1 +# define CONFIG_STM32_TIM14_CH2MODE CONFIG_STM32_TIM14_CHMODE +# define PWM_TIM14_CH2CFG GPIO_TIM14_CH2OUT # elif CONFIG_STM32_TIM14_CHANNEL == 3 -# define PWM_TIM14_PINCFG GPIO_TIM14_CH3OUT +# define CONFIG_STM32_TIM14_CHANNEL3 1 +# define CONFIG_STM32_TIM14_CH3MODE CONFIG_STM32_TIM14_CHMODE +# define PWM_TIM14_CH3CFG GPIO_TIM14_CH3OUT # elif CONFIG_STM32_TIM14_CHANNEL == 4 -# define PWM_TIM14_PINCFG GPIO_TIM14_CH4OUT +# define CONFIG_STM32_TIM14_CHANNEL4 1 +# define CONFIG_STM32_TIM14_CH4MODE CONFIG_STM32_TIM14_CHMODE +# define PWM_TIM14_CH4CFG GPIO_TIM14_CH4OUT # else # error "Unsupported value of CONFIG_STM32_TIM14_CHANNEL" # endif #endif +#ifdef CONFIG_STM32_TIM15_PWM +# if !defined(CONFIG_STM32_TIM15_CHANNEL) +# error "CONFIG_STM32_TIM15_CHANNEL must be provided" +# elif CONFIG_STM32_TIM15_CHANNEL == 1 +# define CONFIG_STM32_TIM15_CHANNEL1 1 +# define CONFIG_STM32_TIM15_CH1MODE CONFIG_STM32_TIM15_CHMODE +# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT +# elif CONFIG_STM32_TIM15_CHANNEL == 2 +# define CONFIG_STM32_TIM15_CHANNEL2 1 +# define CONFIG_STM32_TIM15_CH2MODE CONFIG_STM32_TIM15_CHMODE +# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT +# else +# error "Unsupported value of CONFIG_STM32_TIM15_CHANNEL" +# endif +#endif + +#ifdef CONFIG_STM32_TIM16_PWM +# if !defined(CONFIG_STM32_TIM16_CHANNEL) +# error "CONFIG_STM32_TIM16_CHANNEL must be provided" +# elif CONFIG_STM32_TIM16_CHANNEL == 1 +# define CONFIG_STM32_TIM16_CHANNEL1 1 +# define CONFIG_STM32_TIM16_CH1MODE CONFIG_STM32_TIM16_CHMODE +# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT +# else +# error "Unsupported value of CONFIG_STM32_TIM16_CHANNEL" +# endif +#endif + +#ifdef CONFIG_STM32_TIM17_PWM +# if !defined(CONFIG_STM32_TIM17_CHANNEL) +# error "CONFIG_STM32_TIM17_CHANNEL must be provided" +# elif CONFIG_STM32_TIM17_CHANNEL == 1 +# define CONFIG_STM32_TIM17_CHANNEL1 1 +# define CONFIG_STM32_TIM17_CH1MODE CONFIG_STM32_TIM17_CHMODE +# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT +# else +# error "Unsupported value of CONFIG_STM32_TIM17_CHANNEL" +# endif +#endif + +#define PWM_NCHANNELS 1 + +#endif + /************************************************************************************ * Public Types ************************************************************************************/ @@ -351,7 +1088,7 @@ extern "C" * Input Parameters: * timer - A number identifying the timer use. The number of valid timer * IDs varies with the STM32 MCU and MCU family but is somewhere in - * the range of {1,..,14}. + * the range of {1,..,17}. * * Returned Value: * On success, a pointer to the STM32 lower half PWM driver is returned.