RX65N DTC Driver Support Added
This commit is contained in:
Bhindhiya
Alan Carvalho de Assis
parent
6a84d96bca
commit
9707f39ff7
@ -340,6 +340,33 @@ config RX65N_RIIC2_RCV_IN_BYTE_UNITS
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depends on !RX65N_RIIC2_RCV_CONTINUOUS
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endif #RX65N_RIIC2
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config RX65N_DTC
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bool "DTC"
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default n
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if RX65N_DTC
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config RX65N_DTC_SEQUENCE_TRANSFER_MODE
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bool "Sequence transfer mode"
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depends on !RX65N_DTC_SHORT_ADDRESS_MODE
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default n
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config RX65N_DTC_DISPLACEMENT
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int "Displacement value"
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depends on !RX65N_DTC_SHORT_ADDRESS_MODE
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default 0
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config RX65N_DTC_SHORT_ADDRESS_MODE
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bool "Short address mode"
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default n
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config RX65N_DTC_TRANSFER_DATA_READ_SKIP
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bool "Transfer data read skip"
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default y
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endif #RX65N_DTC
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endmenu # RX65N Peripheral Selections
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endif
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@ -625,6 +652,32 @@ config RX65N_TEST_INTEP
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endif #RX65N_USBDEV
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config RX65N_DTC
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bool "DTC"
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default n
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if RX65N_DTC
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config RX65N_DTC_SEQUENCE_TRANSFER_MODE
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bool "Sequence transfer mode"
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depends on !RX65N_DTC_SHORT_ADDRESS_MODE
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default n
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config RX65N_DTC_DISPLACEMENT
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int "Displacement value"
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depends on !RX65N_DTC_SHORT_ADDRESS_MODE
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default 0
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config RX65N_DTC_SHORT_ADDRESS_MODE
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bool "Short address mode"
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default n
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config RX65N_DTC_TRANSFER_DATA_READ_SKIP
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bool "Transfer data read skip"
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default y
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endif #RX65N_DTC
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endmenu # RX65N Peripheral Selections
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endif
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@ -65,4 +65,8 @@ endif
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ifeq ($(CONFIG_I2C),y)
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CHIP_CSRCS += rx65n_riic.c
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endif
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ifeq ($(CONFIG_RX65N_DTC),y)
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CHIP_CSRCS += rx65n_dtc.c
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endif
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@ -1607,6 +1607,34 @@
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/* End of RIIC related definitions */
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/* Start of DTC interface related definitions */
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#if defined(CONFIG_RX65N_DTC)
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#define HAVE_DTC_DRIVER 1
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#endif
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#define RX65N_DTC_BASE (uint32_t)&DTC
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#define DTC_DTCCR_OFFSET (0x0000) /* DTC Control Register */
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#define DTC_DTCVBR_OFFSET (0x0004) /* DTC Vector Base Register */
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#define DTC_DTCADMOD_OFFSET (0x0008) /* DTC Address Mode Register */
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#define DTC_DTCST_OFFSET (0x000C) /* DTC Control Register */
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#define DTC_DTCSTS_OFFSET (0x000E) /* DTC Status Register */
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#define DTC_DTCIBR_OFFSET (0x0010) /* DTC Index Table Base Register */
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#define DTC_DTCOR_OFFSET (0x0014) /* DTC Operation Register */
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#define DTC_DTCSQE_OFFSET (0x0016) /* DTC Sequence Transfer Enable Register */
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#define DTC_DTCDISP_OFFSET (0x0018) /* DTC Address Displacement Register */
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/* Bits of register DTCCR */
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#define DTC_DTCCR_RRS (1 << 4) /* DTC Transfer Information Read Skip Enable*/
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/* Bits of register DTCST */
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#define DTC_DTCST_DTCST (1 << 0) /* DTC Transfer Information Read Skip Enable*/
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/* End of DTC related defeinitions */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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1808
arch/renesas/src/rx65n/rx65n_dtc.c
Normal file
1808
arch/renesas/src/rx65n/rx65n_dtc.c
Normal file
File diff suppressed because it is too large
Load Diff
515
arch/renesas/src/rx65n/rx65n_dtc.h
Normal file
515
arch/renesas/src/rx65n/rx65n_dtc.h
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@ -0,0 +1,515 @@
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/****************************************************************************
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* arch/renesas/src/rx65n/rx65n_dtc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RENESAS_SRC_RX65N_DTC_H
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#define __ARCH_RENESAS_SRC_RX65N_DTC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include "chip.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* DTC_HANDLE provides an opaque are reference that can be used to represent
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* a DTC channel.
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*/
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typedef FAR void *DTC_HANDLE;
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/* Configurable options for DTC Transfer mode */
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typedef enum e_dtc_transfer_mode
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{
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DTC_TRANSFER_MODE_NORMAL = (0), /* = (0 << 6): Normal mode */
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DTC_TRANSFER_MODE_REPEAT = (1 << 6), /* Repeat mode */
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DTC_TRANSFER_MODE_BLOCK = (2 << 6) /* Block mode */
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} dtc_transfer_mode_t;
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/* Configurable options for DTC Data transfer size */
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typedef enum e_dtc_data_size
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{
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DTC_DATA_SIZE_BYTE = (0), /* = (0 << 4): 8-bit (byte) data */
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DTC_DATA_SIZE_WORD = (1 << 4), /* 16-bit (word) data */
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DTC_DATA_SIZE_LWORD = (2 << 4) /* 32-bit (long word) data */
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} dtc_data_size_t;
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/* Configurable options for Source address addressing mode */
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typedef enum e_dtc_src_addr_mode
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{
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DTC_SRC_ADDR_FIXED = (0), /* = (0 << 2): Source address is fixed. */
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DTC_SRC_ADDR_INCR = (2 << 2), /* Source address is incremented after each transfer. */
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DTC_SRC_ADDR_DECR = (3 << 2) /* Source address is decremented after each transfer. */
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} dtc_src_addr_mode_t;
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/* Configurable options for Chain transfer */
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typedef enum e_dtc_chain_transfer
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{
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DTC_CHAIN_TRANSFER_DISABLE = (0), /* Disable Chain transfer. */
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DTC_CHAIN_TRANSFER_ENABLE = (1 << 7) /* Enable Chain transfer. */
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} dtc_chain_transfer_t;
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/* Configurable options for how chain transfer is performed. */
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typedef enum e_dtc_chain_transfer_mode
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{
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DTC_CHAIN_TRANSFER_CONTINUOUSLY = (0), /* = (0 << 6): Chain transfer is performed continuously. */
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DTC_CHAIN_TRANSFER_NORMAL = (1 << 6) /* Chain transfer is performed only when the counter is changed to 0 or CRAH. */
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} dtc_chain_transfer_mode_t;
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/* Configurable options for Interrupt */
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typedef enum e_dtc_interrupt
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{
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DTC_INTERRUPT_AFTER_ALL_COMPLETE = (0), /* Interrupt is generated when specified data transfer is completed. */
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DTC_INTERRUPT_PER_SINGLE_TRANSFER = (1 << 5) /* Interrupt is generated when each transfer time is completed. */
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} dtc_interrupt_t;
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/* Configurable options for Side to be repeat or block */
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typedef enum e_dtc_repeat_block_side
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{
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DTC_REPEAT_BLOCK_DESTINATION = (0), /* = (0 << 4): Destination is repeat or block area. */
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DTC_REPEAT_BLOCK_SOURCE = (1 << 4) /* Source is repeat or block area. */
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} dtc_repeat_block_side_t;
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/* Configurable options for Destination address addressing mode */
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typedef enum e_dtc_dest_addr_mode
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{
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DTC_DES_ADDR_FIXED = (1 << 2), /* Destination address is fixed. */
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DTC_DES_ADDR_INCR = (2 << 2), /* Destination address is incremented after each transfer. */
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DTC_DES_ADDR_DECR = (3 << 2) /* Destination address is decremented after each transfer. */
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} dtc_dest_addr_mode_t;
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/* Configurable options for Write-back Disable */
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typedef enum e_dtc_write_back
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{
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DTC_WRITEBACK_ENABLE = (0),
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DTC_WRITEBACK_DISABLE = (1)
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} dtc_write_back_t;
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/* Configurable options for Sequence Transfer End */
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typedef enum e_dtc_sequence_end
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{
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DTC_SEQUENCE_TRANSFER_CONTINUE = (0),
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DTC_SEQUENCE_TRANSFER_END = (1)
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} dtc_sequence_end_t;
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/* Configurable options for Index Table Reference */
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typedef enum e_dtc_refer_index_table
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{
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DTC_REFER_INDEX_TABLE_DISABLE = (0),
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DTC_REFER_INDEX_TABLE_ENABLE = (1 << 1)
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} dtc_refer_index_table_t;
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/* Configurable options for Displacement Addition */
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typedef enum e_dtc_disp_add
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{
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DTC_SRC_ADDR_DISP_ADD_DISABLE = (0),
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DTC_SRC_ADDR_DISP_ADD_ENABLE = (1)
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} dtc_disp_add_t;
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/* Enumerate list that can be selected as DTC activation source
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* enum enum_dtce: is included from iodefine.h
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*/
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typedef enum enum_dtce dtc_activation_source_t;
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typedef enum e_dtc_command
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{
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DTC_CMD_DTC_START, /* DTC will can accept activation requests. */
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DTC_CMD_DTC_STOP, /* DTC will not accept new activation request. */
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DTC_CMD_ACT_SRC_ENABLE, /* Enable an activation source specified by vector number. */
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DTC_CMD_ACT_SRC_DISABLE, /* Disable an activation source specified by vector number. */
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DTC_CMD_DATA_READ_SKIP_ENABLE, /* Enable Transfer Data Read Skip. */
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DTC_CMD_DATA_READ_SKIP_DISABLE, /* Disable Transfer Data Read Skip. */
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DTC_CMD_STATUS_GET, /* Get the current status of DTC. */
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DTC_CMD_CHAIN_TRANSFER_ABORT, /* Abort the current Chain transfer process. */
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DTC_CMD_SEQUENCE_TRANSFER_ENABLE, /* Sequence transfer is enabled. */
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DTC_CMD_SEQUENCE_TRANSFER_DISABLE, /* Sequence transfer is disabled. */
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DTC_CMD_SEQUENCE_TRANSFER_ABORT, /* Abort the sequence transfer. */
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DTC_CMD_CHANGING_DATA_FORCIBLY_SET /* Changing data forcibly set by R_DTC_Create(). */
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} dtc_command_t;
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typedef enum e_dtc_err /* DTC API error codes */
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{
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DTC_SUCCESS_DMAC_BUSY = 0, /* One or some DMAC resources are locked by another process. */
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DTC_SUCCESS,
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DTC_ERR_OPENED, /* DTC was initialized already. */
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DTC_ERR_NOT_OPEN, /* DTC module is not initialized yet. */
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DTC_ERR_INVALID_ARG, /* Arguments are invalid. */
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DTC_ERR_INVALID_COMMAND, /* Command parameters are invalid. Or, forced data change failed. */
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DTC_ERR_NULL_PTR, /* Argument pointers are NULL. */
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DTC_ERR_BUSY, /* The DTC resources are locked by another process. */
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DTC_ERR_ACT /* Data transfer is in progress. */
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} dtc_err_t;
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/* Transfer data configuration */
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typedef struct st_dtc_static_transfer_data_cfg
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{
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dtc_transfer_mode_t transfer_mode; /* DTC transfer mode */
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dtc_data_size_t data_size; /* Size of data unit */
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dtc_src_addr_mode_t src_addr_mode; /* Address mode of source */
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dtc_chain_transfer_t chain_transfer_enable; /* Chain transfer is enabled or not */
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dtc_chain_transfer_mode_t chain_transfer_mode; /* How chain transfer is performed */
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dtc_interrupt_t response_interrupt; /* How response interrupt is raised */
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dtc_repeat_block_side_t repeat_block_side; /* The side being repeat or block in */
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dtc_dest_addr_mode_t dest_addr_mode; /* Address mode of destination */
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uint32_t source_addr; /* Start address of source */
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uint32_t dest_addr; /* Start address of destination */
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uint32_t transfer_count; /* Transfer count */
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uint16_t block_size; /* Size of a block in block transfer mode */
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uint16_t rsv; /* Reserved */
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dtc_write_back_t writeback_disable; /* Write-back disable or enable */
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dtc_sequence_end_t sequence_end; /* Sequence transfer end or continue */
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dtc_refer_index_table_t refer_index_table_enable; /* Index table refer or not refer */
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dtc_disp_add_t disp_add_enable; /* The displacement value is added or not added */
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} dtc_static_transfer_data_cfg_t;
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/* Transfer data configuration */
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typedef struct st_dtc_dynamic_transfer_data_cfg
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{
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dtc_data_size_t data_size; /* Size of data unit */
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uint32_t source_addr; /* Start address of source */
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uint32_t dest_addr; /* Start address of destination */
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uint32_t transfer_count; /* Transfer count */
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uint16_t block_size; /* Size of a block in block transfer mode */
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uint16_t rsv; /* Reserved */
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} dtc_dynamic_transfer_data_cfg_t;
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/* DTC status structure */
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typedef struct st_dtc_stat
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{
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uint8_t vect_nr; /* The current vector number */
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bool in_progress; /* Active flag of DTC module */
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} dtc_stat_t;
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/* Transfer data type */
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#if defined(CONFIG_RX65N_DTC_SHORT_ADDRESS_MODE) /* Short-address mode */
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typedef struct st_transfer_data
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{
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/* 3 long-words */
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uint32_t lw1;
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uint32_t lw2;
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uint32_t lw3;
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} dtc_transfer_data_t;
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#else /* Full-address mode */
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typedef struct st_transfer_data
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{
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/* 4 long-words */
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uint32_t lw1;
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uint32_t lw2;
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uint32_t lw3;
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uint32_t lw4;
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} dtc_transfer_data_t;
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: rx65n_dtc_gethandle
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*
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* Description:
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* Get DTC handle.
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*
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* Input Parameters:
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* chan - Identifies the channel resource. For the RX65N, this
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* is simply the channel number is 0
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*
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* Returned Value:
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* dtchandle-Provided that 'chan' is valid, this function ALWAYS
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* returns a non-NULL
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* void* DTC channel handle. (If 'chndx' is invalid, the function will
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* assert if debug is enabled or do something ignorant otherwise).
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*
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****************************************************************************/
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DTC_HANDLE rx65n_dtc_gethandle(unsigned int chan);
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/****************************************************************************
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* Name: rx65n_dtc_initialize
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*
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* Description:
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* Initialize the DTC
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void rx65n_dtc_initialize(void);
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#if defined(CONFIG_RX65N_DTC_SEQUENCE_TRANSFER_MODE)
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/****************************************************************************
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* Name: rx65n_dtc_setup_dynamic_transferdata
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*
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* Description:
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* Setup dynamic transfer info like src and destination address and
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* number of data to transfer
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*
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* Input Parameters:
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* handle - DTC_HANDLE
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* src -Activation source
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* dcfg -Dynamic config parameter
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* nseq_transfer - Number of sequence transfer
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*
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* Returned Value:
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* dtc_err_t -DTC API error codes
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*
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****************************************************************************/
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dtc_err_t rx65n_dtc_setup_seq_dynamic_transferdata(DTC_HANDLE handle,
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uint8_t src, uint32_t dcfg,
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uint32_t nseq_transfer, uint8_t nseq);
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/****************************************************************************
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* Name: rx65n_dtc_setup_static_transferdata
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*
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*
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* Description:
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* Configure and Creates the transfer data for a activation source.
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*
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* Input Parameters:
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* handle - DTC_HANDLE
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* src -Activation source
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* scfg -Static config parameter
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* pdt -pointer to data transfer
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* nseq_transfer - Number of sequence transfer
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* nseq -Sequence number
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*
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* Returned Value:
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* dtc_err_t -DTC API error codes
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*
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****************************************************************************/
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dtc_err_t rx65n_dtc_setup_seq_static_transferdata(DTC_HANDLE handle,
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uint8_t src, uint32_t scfg, uint32_t pdt,
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uint32_t nseq_transfer, uint8_t nseq);
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/****************************************************************************
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* Name: rx65n_dtc_seq_enable
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*
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* Description:
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* DTC Module sequence transfer enable and set respective vector number for
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* sequence transfer
|
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*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
* src -Activation source nothing but vector number
|
||||
*
|
||||
* Assumptions:
|
||||
* - DTC handle allocated by rx65n_dtc_gethandle()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_seq_enable(DTC_HANDLE handle, uint8_t src);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_seq_disable
|
||||
*
|
||||
* Description:
|
||||
* DTC Module sequence transfer enable and clear vector number for
|
||||
* sequence transfer in DTCSQE
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
* src -Activation source nothing but vector number
|
||||
*
|
||||
* Assumptions:
|
||||
* - DTC handle allocated by rx65n_dtc_gethandle()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_seq_disable(DTC_HANDLE handle);
|
||||
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_setup_static_transferdata
|
||||
*
|
||||
* Description:
|
||||
* Configure and Creates the transfer data for a activation source.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle -DTC_HANDLE
|
||||
* src -Activation source
|
||||
* cfg -Pointer to contains the settings for Transfer data
|
||||
* nchain -Number of chain transfer
|
||||
*
|
||||
* Returned Value:
|
||||
* dtc_err_t -DTC API error codes
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
dtc_err_t rx65n_dtc_setup_static_transferdata(DTC_HANDLE handle, uint8_t src,
|
||||
uint32_t scfg, uint32_t pdt, uint32_t nchain);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_setup_dynamic_transferdata
|
||||
*
|
||||
* Description:
|
||||
* Setup dynamic transfer info like src and destination address and number
|
||||
* of data to transfer
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
* src -Activation source
|
||||
* dcfg -Dynamic config parameter
|
||||
* nchain - Number of chain transfer
|
||||
*
|
||||
* Returned Value:
|
||||
* dtc_err_t -DTC API error codes
|
||||
****************************************************************************/
|
||||
|
||||
dtc_err_t rx65n_dtc_setup_dynamic_transferdata(DTC_HANDLE handle,
|
||||
uint8_t src,
|
||||
uint32_t dcfg, uint32_t nchain);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_srcdeactivation
|
||||
*
|
||||
* Description:
|
||||
* Src activation disabling
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
* src -Activation source
|
||||
*
|
||||
* Assumptions:
|
||||
* -DTC vector table allocated by rx65n_dtc_setup_static_transferdata
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_srcdeactivation(DTC_HANDLE handle, uint8_t src);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_srcactivation
|
||||
*
|
||||
* Description:
|
||||
* Src activation enabling
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
* src -Activation source
|
||||
*
|
||||
* Assumptions:
|
||||
* -DTC vector table allocated by rx65n_dtc_setup_static_transferdata
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_srcactivation(DTC_HANDLE handle, uint8_t src);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_status
|
||||
*
|
||||
* Description:
|
||||
* Output the status of DTC
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
*
|
||||
* Output Parameters:
|
||||
* p_stat - DTC status structure
|
||||
*
|
||||
* Assumptions:
|
||||
* - DTC handle allocated by rx65n_get_dtchandle()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_status(DTC_HANDLE handle, dtc_stat_t *p_stat);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_start
|
||||
*
|
||||
* Description:
|
||||
* DTC Module Start
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
*
|
||||
* Assumptions:
|
||||
* - DTC handle allocated by rx65n_dtc_gethandle()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_start(DTC_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rx65n_dtc_stop
|
||||
*
|
||||
* Description:
|
||||
* DTC Module Stop
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DTC_HANDLE
|
||||
*
|
||||
* Assumptions:
|
||||
* - DTC handle allocated by rx65n_dtc_gethandle()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rx65n_dtc_stop(DTC_HANDLE handle);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_RENESAS_SRC_RX65N_DTC_H */
|
||||
@ -47,6 +47,10 @@
|
||||
# include <nuttx/usb/cdcacm.h>
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_DTC_DRIVER
|
||||
# include "rx65n_dtc.h"
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_RIIC_DRIVER
|
||||
# include <nuttx/i2c/i2c_master.h>
|
||||
# include "rx65n_riic.h"
|
||||
@ -141,6 +145,11 @@ int rx65n_bringup(void)
|
||||
(void)rx65n_sbram_int();
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_DTC_DRIVER
|
||||
/* Initialize DTC */
|
||||
|
||||
(void)rx65n_dtc_initialize();
|
||||
#endif
|
||||
#if defined(CONFIG_CDCACM) && !defined(CONFIG_CDCACM_CONSOLE)
|
||||
/* Initialize CDCACM */
|
||||
|
||||
|
||||
@ -47,6 +47,9 @@
|
||||
# include <nuttx/usb/cdcacm.h>
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_DTC_DRIVER
|
||||
# include "rx65n_dtc.h"
|
||||
#endif
|
||||
#ifdef HAVE_RIIC_DRIVER
|
||||
# include <nuttx/i2c/i2c_master.h>
|
||||
# include "rx65n_riic.h"
|
||||
@ -141,6 +144,11 @@ int rx65n_bringup(void)
|
||||
(void)rx65n_sbram_int();
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_DTC_DRIVER
|
||||
/* Initialize DTC */
|
||||
|
||||
(void)rx65n_dtc_initialize();
|
||||
#endif
|
||||
#if defined(CONFIG_CDCACM) && !defined(CONFIG_CDCACM_CONSOLE)
|
||||
/* Initialize CDCACM */
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user