From 972ae84d95cb14c8cb8dcd70df31595ac581c7dc Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Fri, 11 Sep 2015 14:54:30 -0600
Subject: [PATCH] SAMA5D2: Add logic to enable Flexcom clocking and to
 configure Flexcom pins

---
 arch/arm/src/sama5/chip/sama5d2x_pinmap.h |  2 +-
 arch/arm/src/sama5/sam_lowputc.c          | 79 +++++++++++++++++++++++
 2 files changed, 80 insertions(+), 1 deletion(-)

diff --git a/arch/arm/src/sama5/chip/sama5d2x_pinmap.h b/arch/arm/src/sama5/chip/sama5d2x_pinmap.h
index 3fcfb33e92..c8c8a79f58 100644
--- a/arch/arm/src/sama5/chip/sama5d2x_pinmap.h
+++ b/arch/arm/src/sama5/chip/sama5d2x_pinmap.h
@@ -231,7 +231,7 @@
 
 #define PIO_FLEXCOM3_IO0_1   (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN15)
 #define PIO_FLEXCOM3_IO0_2   (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOB | PIO_PIN23)
-#define PIO_FLEXCOM3_IO0     (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOC | PIO_PIN20)
+#define PIO_FLEXCOM3_IO0_3   (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOC | PIO_PIN20)
 #define PIO_FLEXCOM3_IO1_1   (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOA | PIO_PIN13)
 #define PIO_FLEXCOM3_IO1_2   (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOB | PIO_PIN22)
 #define PIO_FLEXCOM3_IO1_3   (PIO_PERIPHE | PIO_CFG_DEFAULT | PIO_PORT_PIOC | PIO_PIN19)
diff --git a/arch/arm/src/sama5/sam_lowputc.c b/arch/arm/src/sama5/sam_lowputc.c
index 5259d56bb4..8d6e3644d8 100644
--- a/arch/arm/src/sama5/sam_lowputc.c
+++ b/arch/arm/src/sama5/sam_lowputc.c
@@ -390,6 +390,21 @@ void sam_lowsetup(void)
 #ifdef CONFIG_SAMA5_USART3
   sam_usart3_enableclk();
 #endif
+#ifdef CONFIG_SAMA5_FLEXCOM0
+  sam_flexcom0_enableclk();
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM1
+  sam_flexcom1_enableclk();
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM2
+  sam_flexcom2_enableclk();
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM3
+  sam_flexcom3_enableclk();
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM4
+  sam_flexcom4_enableclk();
+#endif
 
   /* Configure UART pins for all selected UART/USARTs.  USARTs pins are
    * only configured if the USART is also configured as as a UART.
@@ -473,6 +488,70 @@ void sam_lowsetup(void)
 #ifdef CONFIG_USART4_IFLOWCONTROL
   (void)sam_configpio(PIO_USART4_RTS);
 #endif
+#endif
+
+  /* For Flexcom USARTs:
+   *
+   *   FLEXCOM_IO0 = TXD
+   *   FLEXCOM_IO1 = RXD
+   *   FLEXCOM_IO2 = SCK
+   *   FLEXCOM_IO3 = CTS
+   *   FLEXCOM_IO4 = RTS
+   */
+
+#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_USART0)
+  (void)sam_configpio(PIO_FLEXCOM0_IO0);
+  (void)sam_configpio(PIO_FLEXCOM0_IO1);
+#ifdef CONFIG_USART0_OFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM0_IO3);
+#endif
+#ifdef CONFIG_USART0_IFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM0_IO4);
+#endif
+#endif
+
+#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_USART1)
+  (void)sam_configpio(PIO_FLEXCOM1_IO0);
+  (void)sam_configpio(PIO_FLEXCOM1_IO1);
+#ifdef CONFIG_USART1_OFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM1_IO3);
+#endif
+#ifdef CONFIG_USART1_IFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM1_IO4);
+#endif
+#endif
+
+#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_USART2)
+  (void)sam_configpio(PIO_FLEXCOM2_IO0);
+  (void)sam_configpio(PIO_FLEXCOM2_IO1);
+#ifdef CONFIG_USART2_OFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM2_IO3);
+#endif
+#ifdef CONFIG_USART2_IFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM2_IO4);
+#endif
+#endif
+
+#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_USART3)
+  (void)sam_configpio(PIO_FLEXCOM3_IO0);
+  (void)sam_configpio(PIO_FLEXCOM3_IO1);
+#ifdef CONFIG_USART3_OFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM3_IO3);
+#endif
+#ifdef CONFIG_USART3_IFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM3_IO4);
+#endif
+#endif
+
+#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_USART4)
+  (void)sam_configpio(PIO_FLEXCOM4_IO0);
+  (void)sam_configpio(PIO_FLEXCOM4_IO0);
+#ifdef CONFIG_USART4_OFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM4_IO3);
+#endif
+#ifdef CONFIG_USART4_IFLOWCONTROL
+  (void)sam_configpio(PIO_FLEXCOM4_IO4);
+#endif
 #endif
 
   /* Configure the console (only) */