SAMV7 QSPI: Add framework for a QSPI driver. Initial commit is just the SPI driver with some name changes
This commit is contained in:
Gregory Nutt
parent
f6c6723d88
commit
972f67ce42
@ -132,6 +132,10 @@ ifeq ($(CONFIG_SAMV7_SPI_SLAVE),y)
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CHIP_CSRCS += sam_spi_slave.c
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endif
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ifeq ($(CONFIG_SAMV7_QSPI),y)
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CHIP_CSRCS += sam_qspi.c
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endif
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ifeq ($(CONFIG_SAMV7_TWIHS0),y)
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CHIP_CSRCS += sam_twihs.c
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else ifeq ($(CONFIG_SAMV7_TWIHS1),y)
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@ -51,7 +51,12 @@
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/****************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************/
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/* QSPI register offsets *****************************************************************/
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/* General Characteristics **************************************************************/
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#define SAM_QSPI_MINBITS 8 /* Minimum word width */
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#define SAM_QSPI_MAXBITS 16 /* Maximum word width */
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/* QSPI register offsets ****************************************************************/
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#define SAM_QSPI_CR_OFFSET 0x0000 /* Control Register */
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#define SAM_QSPI_MR_OFFSET 0x0004 /* Mode Register */
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@ -73,7 +78,7 @@
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#define SAM_QSPI_WPSR_OFFSET 0x00e8 /* Write Protection Status Register */
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/* 0xec-0xfc: Reserved */
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/* QSPI register addresses ***************************************************************/
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/* QSPI register addresses **************************************************************/
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#define SAM_QSPI0_CR (SAM_QSPI0_BASE+SAM_QSPI_CR_OFFSET) /* Control Register */
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#define SAM_QSPI0_MR (SAM_QSPI0_BASE+SAM_QSPI_MR_OFFSET) /* Mode Register */
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@ -111,7 +116,7 @@
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# define SAM_QSPI1_WPSR (SAM_QSPI1_BASE+SAM_QSPI_WPSR_OFFSET) /* Write Protection Status Register */
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#endif
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/* QSPI register bit definitions *********************************************************/
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/* QSPI register bit definitions ********************************************************/
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/* QSPI Control Register */
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@ -132,7 +137,7 @@
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# define QSPI_MR_CSMODE_SYSTEM (2 << QSPI_MR_PCS_SHIFT) /* CS deasserted after each transfer */
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#define QSPI_MR_NBBITS_SHIFT (8) /* Bits 8-11: Number Of Bits Per Transfer */
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#define QSPI_MR_NBBITS_MASK (15 << QSPI_MR_NBBITS_SHIFT)
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# define QSPI_MR_NBBITS(n) ((uint32_t)((n)-8) << QSPI_MR_NBBITS_SHIFT)
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# define QSPI_MR_NBBITS(n) ((uint32_t)((n)-SAM_QSPI_MINBITS) << QSPI_MR_NBBITS_SHIFT)
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# define QSPI_MR_NBBITS_8BIT (0 << QSPI_MR_NBBITS_SHIFT) /* 8 bits for transfer */
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# define QSPI_MR_NBBITS_9BIT (1 << QSPI_MR_NBBITS_SHIFT) /* 9 bits for transfer */
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# define QSPI_MR_NBBITS_10BIT (2 << QSPI_MR_NBBITS_SHIFT) /* 10 bits for transfer */
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@ -176,8 +181,6 @@
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/* Serial Clock Register */
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#define QSPI_SCR_
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#define QSPI_SCR_CPOL (1 << 0) /* Bit 0: Clock Polarity */
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#define QSPI_SCR_NCPHA (1 << 1) /* Bit 1: Clock Phase */
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#define QSPI_SCR_SCBR_SHIFT (8) /* Bits 8-15: Serial Clock Baud Rate */
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1750
arch/arm/src/samv7/sam_qspi.c
Normal file
1750
arch/arm/src/samv7/sam_qspi.c
Normal file
File diff suppressed because it is too large
Load Diff
107
arch/arm/src/samv7/sam_qspi.h
Normal file
107
arch/arm/src/samv7/sam_qspi.h
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@ -0,0 +1,107 @@
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/****************************************************************************
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* arch/arm/src/samv7/sam_qspi.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_SAM_QSPI_H
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#define __ARCH_ARM_SRC_SAMV7_SAM_QSPI_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "chip.h"
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#include "sam_config.h"
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#ifdef CONFIG_SAMV7_QSPI
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: sam_qspi_initialize
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*
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* Description:
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* Initialize the selected QSPI port in master mode
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*
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* Input Parameter:
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* intf - Interface number(must be zero)
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*
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* Returned Value:
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* Valid SPI device structure reference on success; a NULL on failure
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*
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****************************************************************************/
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FAR struct spi_dev_s *sam_qspi_initialize(int intf);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_SAMV7_QSPI */
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#endif /* __ARCH_ARM_SRC_SAMV7_SAM_QSPI_H */
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