SAMA5D4: Let's consistently use the name XDMAC for the SAMA5D4 DMA module
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@ -103,11 +103,11 @@
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#define SAM_PERIPHA_PSECTION 0xf0000000 /* 0xf0000000-0xffffffff: Internal Peripherals */
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# define SAM_LCDC_OFFSET 0x00000000 /* 0x00000000-0x00003fff: LCDC */
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# define SAM_DMAC1_OFFSET 0x00004000 /* 0x00004000-0x00007fff: DMAC1 */
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# define SAM_XDMAC1_OFFSET 0x00004000 /* 0x00004000-0x00007fff: XDMAC1 */
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# define SAM_ISI_OFFSET 0x00008000 /* 0x00008000-0x0000bfff: ISI */
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# define SAM_PKCC_OFFSET 0x0000c000 /* 0x0000c000-0x0000ffff: PKCC */
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# define SAM_MPDDRC_OFFSET 0x00010000 /* 0x00010000-0x00013fff: MPDDRC */
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# define SAM_DMAC0_OFFSET 0x00014000 /* 0x00014000-0x00017fff: DMAC0 */
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# define SAM_XDMAC0_OFFSET 0x00014000 /* 0x00014000-0x00017fff: XDMAC0 */
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# define SAM_PMC_OFFSET 0x00018000 /* 0x00018000-0x0001bfff: PMC */
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# define SAM_MATRIX64_OFFSET 0x0001c000 /* 0x0001c000-0x0001ffff: MATRIX64 */
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# define SAM_AESB_OFFSET 0x00020000 /* 0x00020000-0x00023fff: AESB */
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@ -373,11 +373,11 @@
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/* Peripheral virtual base addresses */
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#define SAM_LCDC_VBASE (SAM_PERIPHA_VSECTION+SAM_LCDC_OFFSET)
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#define SAM_DMAC1_VBASE (SAM_PERIPHA_VSECTION+SAM_DMAC1_OFFSET)
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#define SAM_XDMAC1_VBASE (SAM_PERIPHA_VSECTION+SAM_XDMAC1_OFFSET)
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#define SAM_ISI_VBASE (SAM_PERIPHA_VSECTION+SAM_ISI_OFFSET)
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#define SAM_PKCC_VBASE (SAM_PERIPHA_VSECTION+SAM_PKCC_OFFSET)
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#define SAM_MPDDRC_VBASE (SAM_PERIPHA_VSECTION+SAM_MPDDRC_OFFSET)
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#define SAM_DMAC0_VBASE (SAM_PERIPHA_VSECTION+SAM_DMAC0_OFFSET)
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#define SAM_XDMAC0_VBASE (SAM_PERIPHA_VSECTION+SAM_XDMAC0_OFFSET)
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#define SAM_PMC_VBASE (SAM_PERIPHA_VSECTION+SAM_PMC_OFFSET)
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#define SAM_MATRIX64_VBASE (SAM_PERIPHA_VSECTION+SAM_MATRIX64_OFFSET)
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#define SAM_AESB_VBASE (SAM_PERIPHA_VSECTION+SAM_AESB_OFFSET)
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