style fixes
This commit is contained in:
Matias Nitsche
Abdelatif Guettouche
parent
3f1e89e30f
commit
9786e3a1a8
@ -1,7 +1,8 @@
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/****************************************************************************
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* arch/arm/src/stm32l4/stm32l4_serial.c
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*
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* Copyright (C) 2009-2014, 2016-2017,2019 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009-2014, 2016-2017,2019 Gregory Nutt.
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* All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david.sidrane@nscdg.com>
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*
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@ -73,6 +74,7 @@
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****************************************************************************/
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/* Some sanity checks *******************************************************/
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/* DMA configuration */
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/* If DMA is enabled on any USART, then very that other pre-requisites
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@ -102,8 +104,8 @@
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# endif
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# endif
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/* Currently RS-485 support cannot be enabled when RXDMA is in use due to lack
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* of testing - RS-485 support was developed on STM32F1x
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/* Currently RS-485 support cannot be enabled when RXDMA is in use due to
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* lack of testing - RS-485 support was developed on STM32F1x
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*/
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# if (defined(CONFIG_USART1_RXDMA) && defined(CONFIG_USART1_RS485)) || \
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@ -299,7 +301,7 @@ struct stm32l4_serial_s
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#endif
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#ifdef HAVE_RS485
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const uint32_t rs485_dir_gpio; /* U[S]ART RS-485 DIR GPIO pin configuration */
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const uint32_t rs485_dir_gpio; /* U[S]ART RS-485 DIR GPIO pin configuration */
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const bool rs485_dir_polarity; /* U[S]ART RS-485 DIR pin state for TX enabled */
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#endif
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};
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@ -752,7 +754,8 @@ static struct stm32l4_serial_s g_uart5priv =
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/* This table lets us iterate over the configured USARTs */
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FAR static struct stm32l4_serial_s * const g_uart_devs[STM32L4_NUSART + STM32L4_NUART] =
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FAR static struct stm32l4_serial_s *
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const g_uart_devs[STM32L4_NUSART + STM32L4_NUART] =
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{
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#ifdef CONFIG_STM32L4_USART1_SERIALDRIVER
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[0] = &g_usart1priv,
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@ -792,8 +795,8 @@ static struct
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* Name: stm32l4serial_getreg
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****************************************************************************/
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static inline uint32_t stm32l4serial_getreg(FAR struct stm32l4_serial_s *priv,
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int offset)
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static inline
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uint32_t stm32l4serial_getreg(FAR struct stm32l4_serial_s *priv, int offset)
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{
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return getreg32(priv->usartbase + offset);
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}
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@ -812,8 +815,9 @@ static inline void stm32l4serial_putreg(FAR struct stm32l4_serial_s *priv,
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* Name: stm32l4serial_setusartint
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****************************************************************************/
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static inline void stm32l4serial_setusartint(FAR struct stm32l4_serial_s *priv,
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uint16_t ie)
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static inline
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void stm32l4serial_setusartint(FAR struct stm32l4_serial_s *priv,
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uint16_t ie)
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{
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uint32_t cr;
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@ -821,7 +825,9 @@ static inline void stm32l4serial_setusartint(FAR struct stm32l4_serial_s *priv,
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priv->ie = ie;
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/* And restore the interrupt state (see the interrupt enable/usage table above) */
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/* And restore the interrupt state (see the interrupt
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* enable/usage table above)
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*/
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cr = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
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cr &= ~(USART_CR1_USED_INTS);
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@ -868,28 +874,36 @@ static void stm32l4serial_disableusartint(FAR struct stm32l4_serial_s *priv,
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/* USART interrupts:
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*
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------------------ ----------
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* USART_CR1_IDLEIE USART_ISR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE USART_ISR_RXNE Received Data Ready to be Read
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* " " USART_ISR_ORE Overrun Error Detected
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* USART_CR1_TCIE USART_ISR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE USART_ISR_TXE Transmit Data Register Empty
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------ ----------
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* USART_CR1_IDLEIE USART_ISR_IDLE Idle Line
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* Detected (not used)
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* USART_CR1_RXNEIE USART_ISR_RXNE Received Data
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* Ready to be Read
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* " " USART_ISR_ORE Overrun Error
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* Detected
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* USART_CR1_TCIE USART_ISR_TC Transmission
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* Complete (used only
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* for RS-485)
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* USART_CR1_TXEIE USART_ISR_TXE Transmit Data
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* Register Empty
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* USART_CR1_PEIE USART_ISR_PE Parity Error
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*
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* USART_CR2_LBDIE USART_ISR_LBD Break Flag (not used)
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* USART_CR2_LBDIE USART_ISR_LBD Break Flag (not used)
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* USART_CR3_EIE USART_ISR_FE Framing Error
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* " " USART_ISR_NF Noise Flag
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* " " USART_ISR_ORE Overrun Error Detected
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* USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used)
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* " " USART_ISR_ORE Overrun Error
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* Detected
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* USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used)
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*/
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cr1 = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
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cr3 = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
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/* Return the current interrupt mask value for the used interrupts. Notice
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* that this depends on the fact that none of the used interrupt enable bits
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* overlap. This logic would fail if we needed the break interrupt!
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/* Return the current interrupt mask value for the used interrupts.
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* Notice that this depends on the fact that none of the used interrupt
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* enable bits overlap. This logic would fail if we needed the break
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* interrupt!
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*/
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*ie = (cr1 & (USART_CR1_USED_INTS)) | (cr3 & USART_CR3_EIE);
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@ -933,7 +947,8 @@ static int stm32l4serial_dmanextrx(FAR struct stm32l4_serial_s *priv)
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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static void stm32l4serial_setformat(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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uint32_t regval;
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/* This first implementation is for U[S]ARTs that support oversampling
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@ -950,7 +965,7 @@ static void stm32l4serial_setformat(FAR struct uart_dev_s *dev)
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* usartdiv8 = 2 * fCK / baud
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*/
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usartdiv8 = ((priv->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
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usartdiv8 = ((priv->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
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/* Baud rate for standard USART (SPI mode included):
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*
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@ -989,8 +1004,8 @@ static void stm32l4serial_setformat(FAR struct uart_dev_s *dev)
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cr1 |= USART_CR1_OVER8;
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}
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stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1);
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stm32l4serial_putreg(priv, STM32L4_USART_BRR_OFFSET, brr);
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stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1);
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stm32l4serial_putreg(priv, STM32L4_USART_BRR_OFFSET, brr);
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/* Configure parity mode */
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@ -1027,6 +1042,7 @@ static void stm32l4serial_setformat(FAR struct uart_dev_s *dev)
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regval |= USART_CR1_M1;
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}
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/* Else Select: 1 start, 7 data + parity, n stop, OR
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* 1 start, 8 data (no parity), n stop.
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*/
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@ -1109,7 +1125,8 @@ static void stm32l4serial_setsuspend(struct uart_dev_s *dev, bool suspend)
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/* Wait last Tx to complete. */
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while ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_TC) == 0);
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while ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) &
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USART_ISR_TC) == 0);
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#ifdef SERIAL_HAVE_RXDMA
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if (priv->dev.ops == &g_uart_dma_ops && !priv->rxdmasusp)
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@ -1118,7 +1135,8 @@ static void stm32l4serial_setsuspend(struct uart_dev_s *dev, bool suspend)
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if (priv->iflow && priv->rxdmanext == RXDMA_BUFFER_SIZE)
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{
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/* Rx DMA in non-circular iflow mode and already stopped
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* at end of DMA buffer. No need to suspend. */
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* at end of DMA buffer. No need to suspend.
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*/
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}
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else
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#endif
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@ -1146,11 +1164,13 @@ static void stm32l4serial_setsuspend(struct uart_dev_s *dev, bool suspend)
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{
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/* This USART does not have HW flow-control. Unconditionally
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* re-enable DMA (might loss unprocessed bytes received
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* to DMA buffer before suspending). */
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* to DMA buffer before suspending).
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*/
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stm32l4serial_dmareenable(priv);
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priv->rxdmasusp = false;
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}
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dmarestored = true;
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}
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#endif
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@ -1239,7 +1259,8 @@ static void stm32l4serial_pm_setsuspend(bool suspend)
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static void stm32l4serial_setapbclock(FAR struct uart_dev_s *dev, bool on)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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uint32_t rcc_en;
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uint32_t regaddr;
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@ -1304,7 +1325,8 @@ static void stm32l4serial_setapbclock(FAR struct uart_dev_s *dev, bool on)
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static int stm32l4serial_setup(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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uint32_t regval;
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@ -1352,6 +1374,7 @@ static int stm32l4serial_setup(FAR struct uart_dev_s *dev)
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#endif
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/* Configure CR2 */
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/* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
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regval = stm32l4serial_getreg(priv, STM32L4_USART_CR2_OFFSET);
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@ -1368,6 +1391,7 @@ static int stm32l4serial_setup(FAR struct uart_dev_s *dev)
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stm32l4serial_putreg(priv, STM32L4_USART_CR2_OFFSET, regval);
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/* Configure CR1 */
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/* Clear TE, REm and all interrupt enable bits */
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regval = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
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@ -1376,6 +1400,7 @@ static int stm32l4serial_setup(FAR struct uart_dev_s *dev)
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stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, regval);
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/* Configure CR3 */
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/* Clear CTSE, RTSE, and all interrupt enable bits */
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regval = stm32l4serial_getreg(priv, STM32L4_USART_CR3_OFFSET);
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@ -1419,7 +1444,8 @@ static int stm32l4serial_setup(FAR struct uart_dev_s *dev)
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#ifdef SERIAL_HAVE_RXDMA
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static int stm32l4serial_dmasetup(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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int result;
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uint32_t regval;
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@ -1511,7 +1537,8 @@ static int stm32l4serial_dmasetup(FAR struct uart_dev_s *dev)
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static void stm32l4serial_shutdown(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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uint32_t regval;
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/* Mark device as uninitialized. */
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@ -1577,7 +1604,8 @@ static void stm32l4serial_shutdown(FAR struct uart_dev_s *dev)
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#ifdef SERIAL_HAVE_RXDMA
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static void stm32l4serial_dmashutdown(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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/* Perform the normal UART shutdown */
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@ -1598,20 +1626,22 @@ static void stm32l4serial_dmashutdown(FAR struct uart_dev_s *dev)
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* Name: stm32l4serial_attach
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*
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* Description:
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* Configure the USART to operation in interrupt driven mode. This method is
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* called when the serial port is opened. Normally, this is just after the
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* the setup() method is called, however, the serial console may operate in
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* a non-interrupt driven mode during the boot phase.
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* Configure the USART to operation in interrupt driven mode. This method
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* is called when the serial port is opened. Normally, this is just after
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* the the setup() method is called, however, the serial console may
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* operate in a non-interrupt driven mode during the boot phase.
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*
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* RX and TX interrupts are not enabled when by the attach method (unless the
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* hardware supports multiple levels of interrupt enabling). The RX and TX
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* interrupts are not enabled until the txint() and rxint() methods are called.
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* RX and TX interrupts are not enabled when by the attach method (unless
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* the hardware supports multiple levels of interrupt enabling). The RX
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* and TX interrupts are not enabled until the txint() and rxint()
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* methods are called.
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*
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****************************************************************************/
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static int stm32l4serial_attach(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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int ret;
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/* Attach and enable the IRQ */
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@ -1625,6 +1655,7 @@ static int stm32l4serial_attach(FAR struct uart_dev_s *dev)
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up_enable_irq(priv->irq);
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}
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return ret;
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}
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@ -1633,14 +1664,15 @@ static int stm32l4serial_attach(FAR struct uart_dev_s *dev)
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*
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* Description:
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* Detach USART interrupts. This method is called when the serial port is
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* closed normally just before the shutdown method is called. The exception
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* is the serial console which is never shutdown.
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* closed normally just before the shutdown method is called.
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* The exception is the serial console which is never shutdown.
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*
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****************************************************************************/
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static void stm32l4serial_detach(FAR struct uart_dev_s *dev)
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{
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FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
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FAR struct stm32l4_serial_s *priv =
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(FAR struct stm32l4_serial_s *)dev->priv;
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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}
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@ -1686,34 +1718,42 @@ static int up_interrupt(int irq, FAR void *context, FAR void *arg)
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/* USART interrupts:
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*
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------------------- ----------
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* USART_CR1_IDLEIE USART_ISR_IDLE Idle Line Detected (not used)
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* USART_CR1_RXNEIE USART_ISR_RXNE Received Data Ready to be Read
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* " " USART_ISR_ORE Overrun Error Detected
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* USART_CR1_TCIE USART_ISR_TC Transmission Complete (used only for RS-485)
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* USART_CR1_TXEIE USART_ISR_TXE Transmit Data Register Empty
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* Enable Status Meaning Usage
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* ------------------ --------------- ------------------- ----------
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* USART_CR1_IDLEIE USART_ISR_IDLE Idle Line
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* Detected (not used)
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* USART_CR1_RXNEIE USART_ISR_RXNE Received Data
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* Ready to be Read
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* " " USART_ISR_ORE Overrun Error
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* Detected
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* USART_CR1_TCIE USART_ISR_TC Transmission
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* Complete (used only
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* for RS-485)
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* USART_CR1_TXEIE USART_ISR_TXE Transmit Data
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* Register Empty
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* USART_CR1_PEIE USART_ISR_PE Parity Error
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*
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* USART_CR2_LBDIE USART_ISR_LBD Break Flag (not used)
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* USART_CR2_LBDIE USART_ISR_LBD Break Flag (not used)
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* USART_CR3_EIE USART_ISR_FE Framing Error
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* " " USART_ISR_NE Noise Error
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* " " USART_ISR_ORE Overrun Error Detected
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* USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used)
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* " " USART_ISR_ORE Overrun Error
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* Detected
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* USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used)
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*
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* NOTE: Some of these status bits must be cleared by explicitly writing one
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* to the ICR register: USART_ICR_CTSCF, USART_ICR_LBDCF. Note of those are currently
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* being used.
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* NOTE: Some of these status bits must be cleared by explicitly
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* writing one to the ICR register: USART_ICR_CTSCF, USART_ICR_LBDCF.
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* Note of those are currently being used.
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*/
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#ifdef HAVE_RS485
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/* Transmission of whole buffer is over - TC is set, TXEIE is cleared.
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* Note - this should be first, to have the most recent TC bit value from
|
||||
* SR register - sending data affects TC, but without refresh we will not
|
||||
* know that...
|
||||
* Note - this should be first, to have the most recent TC bit value
|
||||
* from SR register - sending data affects TC, but without refresh we
|
||||
* will not know that...
|
||||
*/
|
||||
|
||||
if ((priv->sr & USART_ISR_TC) != 0 && (priv->ie & USART_CR1_TCIE) != 0 &&
|
||||
if ((priv->sr & USART_ISR_TC) != 0 &&
|
||||
(priv->ie & USART_CR1_TCIE) != 0 &&
|
||||
(priv->ie & USART_CR1_TXEIE) == 0)
|
||||
{
|
||||
stm32l4_gpiowrite(priv->rs485_dir_gpio, !priv->rs485_dir_polarity);
|
||||
@ -1723,10 +1763,12 @@ static int up_interrupt(int irq, FAR void *context, FAR void *arg)
|
||||
|
||||
/* Handle incoming, receive bytes. */
|
||||
|
||||
if ((priv->sr & USART_ISR_RXNE) != 0 && (priv->ie & USART_CR1_RXNEIE) != 0)
|
||||
if ((priv->sr & USART_ISR_RXNE) != 0 &&
|
||||
(priv->ie & USART_CR1_RXNEIE) != 0)
|
||||
{
|
||||
/* Received data ready... process incoming bytes. NOTE the check for
|
||||
* RXNEIE: We cannot call uart_recvchards of RX interrupts are disabled.
|
||||
/* Received data ready... process incoming bytes. NOTE the check
|
||||
* for RXNEIE: We cannot call uart_recvchards of RX interrupts
|
||||
* are disabled.
|
||||
*/
|
||||
|
||||
uart_recvchars(&priv->dev);
|
||||
@ -1737,19 +1779,22 @@ static int up_interrupt(int irq, FAR void *context, FAR void *arg)
|
||||
* error conditions.
|
||||
*/
|
||||
|
||||
else if ((priv->sr & (USART_ISR_ORE | USART_ISR_NF | USART_ISR_FE)) != 0)
|
||||
else if ((priv->sr &
|
||||
(USART_ISR_ORE | USART_ISR_NF | USART_ISR_FE)) != 0)
|
||||
{
|
||||
/* These errors are cleared by writing the corresponding bit to the
|
||||
* interrupt clear register (ICR).
|
||||
*/
|
||||
|
||||
stm32l4serial_putreg(priv, STM32L4_USART_ICR_OFFSET,
|
||||
(USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
|
||||
(USART_ICR_NCF | USART_ICR_ORECF |
|
||||
USART_ICR_FECF));
|
||||
}
|
||||
|
||||
/* Handle outgoing, transmit bytes */
|
||||
|
||||
if ((priv->sr & USART_ISR_TXE) != 0 && (priv->ie & USART_CR1_TXEIE) != 0)
|
||||
if ((priv->sr & USART_ISR_TXE) != 0 &&
|
||||
(priv->ie & USART_CR1_TXEIE) != 0)
|
||||
{
|
||||
/* Transmit data register empty ... process outgoing bytes */
|
||||
|
||||
@ -1777,7 +1822,8 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
FAR struct uart_dev_s *dev = inode->i_private;
|
||||
#endif
|
||||
#if defined(CONFIG_SERIAL_TERMIOS)
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
#endif
|
||||
int ret = OK;
|
||||
|
||||
@ -1786,7 +1832,8 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
|
||||
case TIOCSERGSTRUCT:
|
||||
{
|
||||
FAR struct stm32l4_serial_s *user = (FAR struct stm32l4_serial_s *)arg;
|
||||
FAR struct stm32l4_serial_s *user =
|
||||
(FAR struct stm32l4_serial_s *)arg;
|
||||
if (!user)
|
||||
{
|
||||
ret = -EINVAL;
|
||||
@ -1802,7 +1849,6 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
#ifdef CONFIG_STM32L4_USART_SINGLEWIRE
|
||||
case TIOCSSINGLEWIRE:
|
||||
{
|
||||
|
||||
uint32_t cr1;
|
||||
uint32_t cr1_ue;
|
||||
irqstate_t flags;
|
||||
@ -1828,14 +1874,26 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
if ((arg & SER_SINGLEWIRE_ENABLED) != 0)
|
||||
{
|
||||
uint32_t gpio_val = GPIO_OPENDRAIN;
|
||||
gpio_val |= (arg & SER_SINGLEWIRE_PULL_MASK) == SER_SINGLEWIRE_PULLUP ? GPIO_PULLUP : GPIO_FLOAT;
|
||||
gpio_val |= (arg & SER_SINGLEWIRE_PULL_MASK) == SER_SINGLEWIRE_PULLDOWN ? GPIO_PULLDOWN : GPIO_FLOAT;
|
||||
stm32l4_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK | GPIO_OPENDRAIN)) | gpio_val);
|
||||
gpio_val |=
|
||||
(arg & SER_SINGLEWIRE_PULL_MASK) == SER_SINGLEWIRE_PULLUP ?
|
||||
GPIO_PULLUP : GPIO_FLOAT;
|
||||
|
||||
gpio_val |=
|
||||
(arg & SER_SINGLEWIRE_PULL_MASK) == SER_SINGLEWIRE_PULLDOWN ?
|
||||
GPIO_PULLDOWN : GPIO_FLOAT;
|
||||
|
||||
stm32l4_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK |
|
||||
GPIO_OPENDRAIN)) |
|
||||
gpio_val);
|
||||
|
||||
cr |= USART_CR3_HDSEL;
|
||||
}
|
||||
else
|
||||
{
|
||||
stm32l4_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK | GPIO_OPENDRAIN)) | GPIO_PUSHPULL);
|
||||
stm32l4_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK |
|
||||
GPIO_OPENDRAIN)) |
|
||||
GPIO_PUSHPULL);
|
||||
|
||||
cr &= ~USART_CR3_HDSEL;
|
||||
}
|
||||
|
||||
@ -2052,9 +2110,10 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
|
||||
stm32l4serial_txint(dev, false);
|
||||
|
||||
/* Configure TX as a GPIO output pin and Send a break signal*/
|
||||
/* Configure TX as a GPIO output pin and Send a break signal */
|
||||
|
||||
tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
|
||||
tx_break = GPIO_OUTPUT |
|
||||
(~(GPIO_MODE_MASK | GPIO_OUTPUT_SET) & priv->tx_gpio);
|
||||
stm32l4_configgpio(tx_break);
|
||||
|
||||
leave_critical_section(flags);
|
||||
@ -2088,7 +2147,8 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
|
||||
flags = enter_critical_section();
|
||||
cr1 = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
|
||||
stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
|
||||
stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET,
|
||||
cr1 | USART_CR1_SBK);
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
break;
|
||||
@ -2100,7 +2160,8 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
|
||||
flags = enter_critical_section();
|
||||
cr1 = stm32l4serial_getreg(priv, STM32L4_USART_CR1_OFFSET);
|
||||
stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
|
||||
stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET,
|
||||
cr1 & ~USART_CR1_SBK);
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
break;
|
||||
@ -2129,7 +2190,8 @@ static int stm32l4serial_ioctl(FAR struct file *filep, int cmd,
|
||||
static int stm32l4serial_receive(FAR struct uart_dev_s *dev,
|
||||
FAR unsigned int *status)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
uint32_t rdr;
|
||||
|
||||
/* Get the Rx byte */
|
||||
@ -2158,31 +2220,36 @@ static int stm32l4serial_receive(FAR struct uart_dev_s *dev,
|
||||
#ifndef SERIAL_HAVE_ONLY_DMA
|
||||
static void stm32l4serial_rxint(FAR struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
irqstate_t flags;
|
||||
uint16_t ie;
|
||||
|
||||
/* USART receive interrupts:
|
||||
*
|
||||
* Enable Status Meaning Usage
|
||||
* ------------------ --------------- ------------------------------- ----------
|
||||
* USART_CR1_IDLEIE USART_ISR_IDLE Idle Line Detected (not used)
|
||||
* USART_CR1_RXNEIE USART_ISR_RXNE Received Data Ready to be Read
|
||||
* " " USART_ISR_ORE Overrun Error Detected
|
||||
* Enable Status Meaning Usage
|
||||
* ------------------ --------------- ------------------ ----------
|
||||
* USART_CR1_IDLEIE USART_ISR_IDLE Idle Line
|
||||
* Detected (not used)
|
||||
* USART_CR1_RXNEIE USART_ISR_RXNE Received Data
|
||||
* Ready to be Read
|
||||
* " " USART_ISR_ORE Overrun Error
|
||||
* Detected
|
||||
* USART_CR1_PEIE USART_ISR_PE Parity Error
|
||||
*
|
||||
* USART_CR2_LBDIE USART_ISR_LBD Break Flag (not used)
|
||||
* USART_CR2_LBDIE USART_ISR_LBD Break Flag (not used)
|
||||
* USART_CR3_EIE USART_ISR_FE Framing Error
|
||||
* " " USART_ISR_NF Noise Flag
|
||||
* " " USART_ISR_ORE Overrun Error Detected
|
||||
* " " USART_ISR_ORE Overrun Error
|
||||
* Detected
|
||||
*/
|
||||
|
||||
flags = enter_critical_section();
|
||||
ie = priv->ie;
|
||||
if (enable)
|
||||
{
|
||||
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
|
||||
* timeout occurs).
|
||||
/* Receive an interrupt when their is anything in the Rx data register
|
||||
* (or an Rx timeout occurs).
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
@ -2216,8 +2283,11 @@ static void stm32l4serial_rxint(FAR struct uart_dev_s *dev, bool enable)
|
||||
#ifndef SERIAL_HAVE_ONLY_DMA
|
||||
static bool stm32l4serial_rxavailable(FAR struct uart_dev_s *dev)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
return ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_RXNE) != 0);
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
|
||||
return ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) &
|
||||
USART_ISR_RXNE) != 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -2248,7 +2318,8 @@ static bool stm32l4serial_rxavailable(FAR struct uart_dev_s *dev)
|
||||
static bool stm32l4serial_rxflowcontrol(FAR struct uart_dev_s *dev,
|
||||
unsigned int nbuffered, bool upper)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
|
||||
#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && \
|
||||
defined(CONFIG_STM32L4_FLOWCONTROL_BROKEN)
|
||||
@ -2331,7 +2402,8 @@ static bool stm32l4serial_rxflowcontrol(FAR struct uart_dev_s *dev,
|
||||
static int stm32l4serial_dmareceive(FAR struct uart_dev_s *dev,
|
||||
FAR unsigned int *status)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
int c = 0;
|
||||
|
||||
if (stm32l4serial_dmanextrx(priv) != priv->rxdmanext)
|
||||
@ -2408,7 +2480,8 @@ static void stm32l4serial_dmareenable(FAR struct stm32l4_serial_s *priv)
|
||||
* in and DMA transfer is stopped.
|
||||
*/
|
||||
|
||||
stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback, (void *)priv, false);
|
||||
stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback,
|
||||
(void *)priv, false);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
@ -2418,7 +2491,8 @@ static void stm32l4serial_dmareenable(FAR struct stm32l4_serial_s *priv)
|
||||
* worth of time to claim bytes before they are overwritten.
|
||||
*/
|
||||
|
||||
stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback, (void *)priv, true);
|
||||
stm32l4_dmastart(priv->rxdma, stm32l4serial_dmarxcallback,
|
||||
(void *)priv, true);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
@ -2469,12 +2543,13 @@ static bool stm32l4serial_dmaiflowrestart(struct stm32l4_serial_s *priv)
|
||||
}
|
||||
|
||||
/* DMA is stopped or suspended and DMA buffer does not have pending data,
|
||||
* re-enabling without data loss is now safe. */
|
||||
* re-enabling without data loss is now safe.
|
||||
*/
|
||||
|
||||
stm32l4serial_dmareenable(priv);
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
@ -2488,7 +2563,8 @@ static bool stm32l4serial_dmaiflowrestart(struct stm32l4_serial_s *priv)
|
||||
#ifdef SERIAL_HAVE_RXDMA
|
||||
static void stm32l4serial_dmarxint(FAR struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
|
||||
/* En/disable DMA reception.
|
||||
*
|
||||
@ -2522,7 +2598,8 @@ static void stm32l4serial_dmarxint(FAR struct uart_dev_s *dev, bool enable)
|
||||
#ifdef SERIAL_HAVE_RXDMA
|
||||
static bool stm32l4serial_dmarxavailable(FAR struct uart_dev_s *dev)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
|
||||
/* Compare our receive pointer to the current DMA pointer, if they
|
||||
* do not match, then there are bytes to be received.
|
||||
@ -2542,7 +2619,8 @@ static bool stm32l4serial_dmarxavailable(FAR struct uart_dev_s *dev)
|
||||
|
||||
static void stm32l4serial_send(FAR struct uart_dev_s *dev, int ch)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
|
||||
#ifdef HAVE_RS485
|
||||
if (priv->rs485_dir_gpio != 0)
|
||||
@ -2564,16 +2642,21 @@ static void stm32l4serial_send(FAR struct uart_dev_s *dev, int ch)
|
||||
|
||||
static void stm32l4serial_txint(FAR struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
|
||||
irqstate_t flags;
|
||||
|
||||
/* USART transmit interrupts:
|
||||
*
|
||||
* Enable Status Meaning Usage
|
||||
* ------------------ --------------- ---------------------------- ----------
|
||||
* USART_CR1_TCIE USART_ISR_TC Transmission Complete (used only for RS-485)
|
||||
* USART_CR1_TXEIE USART_ISR_TXE Transmit Data Register Empty
|
||||
* USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used)
|
||||
* Enable Status Meaning Usage
|
||||
* ------------------ --------------- ---------------- ----------
|
||||
* USART_CR1_TCIE USART_ISR_TC Transmission
|
||||
* Complete (used only
|
||||
* for RS-485)
|
||||
* USART_CR1_TXEIE USART_ISR_TXE Transmit Data
|
||||
* Register Empty
|
||||
* USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used)
|
||||
*/
|
||||
|
||||
flags = enter_critical_section();
|
||||
@ -2631,8 +2714,10 @@ static void stm32l4serial_txint(FAR struct uart_dev_s *dev, bool enable)
|
||||
|
||||
static bool stm32l4serial_txready(FAR struct uart_dev_s *dev)
|
||||
{
|
||||
FAR struct stm32l4_serial_s *priv = (FAR struct stm32l4_serial_s *)dev->priv;
|
||||
return ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) & USART_ISR_TXE) != 0);
|
||||
FAR struct stm32l4_serial_s *priv =
|
||||
(FAR struct stm32l4_serial_s *)dev->priv;
|
||||
return ((stm32l4serial_getreg(priv, STM32L4_USART_ISR_OFFSET) &
|
||||
USART_ISR_TXE) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -2666,9 +2751,9 @@ static void stm32l4serial_dmarxcallback(DMA_HANDLE handle, uint8_t status,
|
||||
|
||||
/* Get the masked USART status word to check and clear error flags.
|
||||
*
|
||||
* When wake-up from low power mode was not fast enough, UART is resumed too
|
||||
* late and sometimes exactly when character was coming over UART, resulting
|
||||
* to frame error.
|
||||
* When wake-up from low power mode was not fast enough, UART is resumed
|
||||
* too late and sometimes exactly when character was coming over UART,
|
||||
* resulting to frame error.
|
||||
|
||||
* If error flag is not cleared, Rx DMA will be stuck. Clearing errors
|
||||
* will release Rx DMA.
|
||||
@ -2679,7 +2764,8 @@ static void stm32l4serial_dmarxcallback(DMA_HANDLE handle, uint8_t status,
|
||||
if ((priv->sr & (USART_ISR_ORE | USART_ISR_NF | USART_ISR_FE)) != 0)
|
||||
{
|
||||
stm32l4serial_putreg(priv, STM32L4_USART_ICR_OFFSET,
|
||||
(USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF));
|
||||
(USART_ICR_NCF | USART_ICR_ORECF |
|
||||
USART_ICR_FECF));
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -2743,6 +2829,7 @@ static void stm32l4serial_pmnotify(FAR struct pm_callback_s *cb, int domain,
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
/* Should not get here */
|
||||
|
||||
break;
|
||||
@ -2836,6 +2923,7 @@ static int stm32l4serial_pmprepare(FAR struct pm_callback_s *cb, int domain,
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
if (priv->dev.recv.head != priv->dev.recv.tail)
|
||||
{
|
||||
return ERROR;
|
||||
@ -2844,7 +2932,9 @@ static int stm32l4serial_pmprepare(FAR struct pm_callback_s *cb, int domain,
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
/* Should not get here */
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user