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riscv/nuttsbi: add MTVAL argument

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The MTVAL and the other two provides a complete exception story.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This commit is contained in:
Yanfeng Liu 2024-06-23 15:43:23 +08:00 committed by Xiang Xiao
parent 3b1f4562a0
commit 9790248f9a
2 changed files with 5 additions and 3 deletions
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7
arch/risc-v/src/nuttsbi/sbi_mexception.c
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@ -30,8 +30,9 @@
* Public Functions
****************************************************************************/
void sbi_mexception(uintptr_t mcause, uintptr_t *mepc)
void sbi_mexception(uintreg_t mcause, uintreg_t *mepc, uintreg_t tval)
{
(void) mcause;
(void) mepc;
UNUSED(mcause);
UNUSED(mepc);
UNUSED(tval);
}

1
arch/risc-v/src/nuttsbi/sbi_mtrap.S
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@ -127,6 +127,7 @@ machine_trap:
csrr a0, CSR_MCAUSE /* Interrupt cause [arg0] */
csrr a1, CSR_MEPC /* Interrupt PC (instruction) [arg1] */
csrr a2, CSR_MTVAL /* The MTVAL value [arg2] */
jal x1, sbi_mexception
j __start