imxrt:Fix Case ENET_MMFR_OP_RdNOTMII->ENET_MMFR_OP_RDNOTMII
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@ -207,7 +207,7 @@
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# define ENET_MMFR_OP_WRNOTMII (0 << ENET_MMFR_OP_SHIFT) /* Write frame, not MII compliant */
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# define ENET_MMFR_OP_WRNOTMII (0 << ENET_MMFR_OP_SHIFT) /* Write frame, not MII compliant */
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# define ENET_MMFR_OP_WRMII (1 << ENET_MMFR_OP_SHIFT) /* Write frame, MII management frame */
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# define ENET_MMFR_OP_WRMII (1 << ENET_MMFR_OP_SHIFT) /* Write frame, MII management frame */
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# define ENET_MMFR_OP_RDMII (2 << ENET_MMFR_OP_SHIFT) /* Read frame, MII management frame */
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# define ENET_MMFR_OP_RDMII (2 << ENET_MMFR_OP_SHIFT) /* Read frame, MII management frame */
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# define ENET_MMFR_OP_RdNOTMII (3 << ENET_MMFR_OP_SHIFT) /* Read frame, not MII compliant */
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# define ENET_MMFR_OP_RDNOTMII (3 << ENET_MMFR_OP_SHIFT) /* Read frame, not MII compliant */
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#define ENET_MMFR_ST_SHIFT (30) /* Bits 30-31: Start of frame delimiter */
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#define ENET_MMFR_ST_SHIFT (30) /* Bits 30-31: Start of frame delimiter */
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#define ENET_MMFR_ST_MASK (3 << ENET_MMFR_ST_SHIFT)
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#define ENET_MMFR_ST_MASK (3 << ENET_MMFR_ST_SHIFT)
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@ -2259,7 +2259,7 @@ static int imxrt_readmmd(struct imxrt_driver_s *priv, uint8_t phyaddr,
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imxrt_enet_putreg32(priv,
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imxrt_enet_putreg32(priv,
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0 << ENET_MMFR_ST_SHIFT |
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0 << ENET_MMFR_ST_SHIFT |
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ENET_MMFR_OP_RdNOTMII |
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ENET_MMFR_OP_RDNOTMII |
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(uint32_t)mmd << ENET_MMFR_RA_SHIFT |
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(uint32_t)mmd << ENET_MMFR_RA_SHIFT |
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(uint32_t)phyaddr << ENET_MMFR_PA_SHIFT |
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(uint32_t)phyaddr << ENET_MMFR_PA_SHIFT |
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2 << ENET_MMFR_TA_SHIFT,
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2 << ENET_MMFR_TA_SHIFT,
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