Photon: Cosmetic changes to style detected by tools/nxstyle

This commit is contained in:
Gregory Nutt 2017-05-03 18:20:57 -06:00
parent 11c14470c3
commit 97f149a40b
19 changed files with 1910 additions and 1794 deletions

View File

@ -100,7 +100,8 @@ static int bcmf_cdc_control_request_unsafe(FAR struct bcmf_dev_s *priv,
****************************************************************************/
struct bcmf_frame_s *bcmf_cdc_allocate_frame(FAR struct bcmf_dev_s *priv,
char *name, uint8_t *data, uint32_t len)
char *name, uint8_t *data,
uint32_t len)
{
uint32_t data_len;
uint16_t name_len;
@ -315,6 +316,7 @@ int bcmf_cdc_process_control_frame(FAR struct bcmf_dev_s *priv,
priv->control_rxdata_len, cdc_header->len);
priv->control_rxdata_len = cdc_header->len;
}
memcpy(priv->control_rxdata, (uint8_t *)&cdc_header[1],
priv->control_rxdata_len);
}

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@ -44,7 +44,8 @@ extern const unsigned int bcm43362_nvram_image_len;
extern const uint8_t bcm43362_firmware_image[];
extern const unsigned int bcm43362_firmware_image_len;
const struct bcmf_sdio_chip bcmf_43362_config_sdio = {
const struct bcmf_sdio_chip bcmf_43362_config_sdio =
{
/* General chip stats */
@ -52,7 +53,8 @@ const struct bcmf_sdio_chip bcmf_43362_config_sdio = {
/* Backplane architecture */
.core_base = {
.core_base =
{
[CHIPCOMMON_CORE_ID] = 0x18000000, /* Chipcommon core register base */
[DOT11MAC_CORE_ID] = 0x18001000, /* dot11mac core register base */
[SDIOD_CORE_ID] = 0x18002000, /* SDIOD Device core register base */

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@ -195,7 +195,7 @@ int bcmf_upload_nvram(FAR struct bcmf_sdio_dev_s *sbus)
return ret;
}
/* generate length token */
/* Generate length token */
token = nvram_sz / 4;
token = (~token << 16) | (token & 0x0000FFFF);

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@ -90,6 +90,7 @@ static void bcmf_free_device(FAR struct bcmf_dev_s *priv);
static int bcmf_driver_initialize(FAR struct bcmf_dev_s *priv);
// FIXME only for debug purpose
static void bcmf_wl_default_event_handler(FAR struct bcmf_dev_s *priv,
struct bcmf_event_s *event, unsigned int len);
@ -911,3 +912,4 @@ int bcmf_wl_set_ssid(FAR struct bcmf_dev_s *priv, struct iwreq *iwr)
}
return OK;
}

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@ -1,4 +1,4 @@
/*
/****************************************************************************
* Copyright (c) 2015 Broadcom
* All rights reserved.
*
@ -31,7 +31,8 @@
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
*
****************************************************************************/
/*
* Custom OID/ioctl definitions for
* Broadcom 802.11abg Networking Device Driver
@ -69,7 +70,8 @@ typedef struct cnt_rx
#define MCSSET_LEN 16
typedef struct wl_bss_info {
typedef struct wl_bss_info
{
uint32_t version; /* version field */
uint32_t length; /* byte length of data in this record, */
/* starting at version and including IEs */
@ -78,7 +80,8 @@ typedef struct wl_bss_info {
uint16_t capability; /* Capability information */
uint8_t SSID_len;
uint8_t SSID[32];
struct {
struct
{
uint32_t count; /* # rates in this set */
uint8_t rates[16]; /* rates in 500kbps units w/hi bit set if basic */
} rateset; /* supported rates */
@ -206,7 +209,8 @@ typedef struct wl_uint32_list
uint32_t element[1];
} wl_uint32_list_t;
typedef struct wl_join_scan_params {
typedef struct wl_join_scan_params
{
uint8_t scan_type; /* 0 use default, active or passive scan */
int32_t nprobes; /* -1 use default, number of probes per channel */
int32_t active_time; /* -1 use default, dwell time per channel for
@ -1621,7 +1625,8 @@ typedef struct
uint32_t rxmpdu_stbc; /* count for stbc received */
} wl_cnt_ver_six_t;
typedef struct {
typedef struct
{
uint16_t version; /* see definition of WL_CNT_T_VERSION */
uint16_t length; /* length of entire structure */
@ -1853,8 +1858,8 @@ typedef struct {
uint32_t dma_hang; /* count for stbc received */
} wl_cnt_ver_seven_t;
typedef struct {
typedef struct
{
uint16_t version; /* see definition of WL_CNT_T_VERSION */
uint16_t length; /* length of entire structure */
@ -2189,7 +2194,8 @@ typedef struct
wl_traffic_stats_t tx_expired[AC_COUNT];
} wl_wme_cnt_t;
typedef struct wl_mkeep_alive_pkt {
typedef struct wl_mkeep_alive_pkt
{
uint16_t version; /* Version for mkeep_alive */
uint16_t length; /* length of fixed parameters */
uint32_t period_msec; /* repeat interval msecs */
@ -2681,7 +2687,8 @@ typedef struct sta_prbreq_wps_ie_list
#define EDCF_TXOP_MAX 65535 /* TXOP maximum value */
#define EDCF_TXOP2USEC(txop) ((txop) << 5)
struct edcf_acparam {
struct edcf_acparam
{
uint8_t ACI;
uint8_t ECW;
uint16_t TXOP; /* stored in network order (ls octet first) */

View File

@ -755,9 +755,10 @@ static int bcmf_ifdown(FAR struct net_driver_s *dev)
static void bcmf_txavail_work(FAR void *arg)
{
// wlinfo("Entry\n");
FAR struct bcmf_dev_s *priv = (FAR struct bcmf_dev_s *)arg;
// wlinfo("Entry\n");
/* Lock the network and serialize driver operations if necessary.
* NOTE: Serialization is only required in the case where the driver work
* is performed on an LP worker thread and where more than one LP worker

View File

@ -114,7 +114,8 @@ static int bcmf_sdio_find_block_size(unsigned int size);
FAR struct bcmf_dev_s *g_sdio_priv;
/* Buffer pool for SDIO bus interface
This pool is shared between all driver devices */
* This pool is shared between all driver devices
*/
static struct bcmf_sdio_frame g_pktframes[BCMF_PKT_POOL_SIZE];
@ -131,6 +132,7 @@ int bcmf_oob_irq(int irq, FAR void *context, FAR void *arg)
if (sbus->ready)
{
/* Signal bmcf thread */
sbus->irq_pending = true;
sem_post(&sbus->thread_signal);
@ -455,7 +457,8 @@ int bcmf_sdio_find_block_size(unsigned int size)
{
int ret = 0;
int size_copy = size;
while (size_copy) {
while (size_copy)
{
size_copy >>= 1;
ret++;
}
@ -464,6 +467,7 @@ int bcmf_sdio_find_block_size(unsigned int size)
{
return 1 << ret;
}
return 1 << (ret - 1);
}
@ -581,6 +585,7 @@ int bcmf_bus_sdio_initialize(FAR struct bcmf_dev_s *priv,
{
goto exit_free_bus;
}
sq_init(&sbus->tx_queue);
sq_init(&sbus->rx_queue);
sq_init(&sbus->free_queue);
@ -599,6 +604,7 @@ int bcmf_bus_sdio_initialize(FAR struct bcmf_dev_s *priv,
{
goto exit_free_bus;
}
if ((ret = sem_setprotocol(&sbus->thread_signal, SEM_PRIO_NONE)) != OK)
{
goto exit_free_bus;
@ -788,7 +794,8 @@ int bcmf_sdio_thread(int argc, char **argv)
do
{
ret = bcmf_sdpcm_readframe(priv);
} while (ret == OK);
}
while (ret == OK);
if (ret == -ENODATA)
{
@ -803,7 +810,8 @@ int bcmf_sdio_thread(int argc, char **argv)
do
{
ret = bcmf_sdpcm_sendframe(priv);
} while (ret == OK);
}
while (ret == OK);
/* Check if RX frames are available */

View File

@ -106,7 +106,8 @@ struct bcmf_sdio_dev_s
/* Structure used to manage SDIO frames */
struct bcmf_sdio_frame {
struct bcmf_sdio_frame
{
struct bcmf_frame_s header;
bool tx;
dq_entry_t list_entry;

View File

@ -1,4 +1,4 @@
/*
/****************************************************************************
* Copyright (c) 2011 Broadcom Corporation
*
* Permission to use, copy, modify, and/or distribute this software for any
@ -12,7 +12,8 @@
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
*
****************************************************************************/
#ifndef __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_CORE_H
#define __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_CORE_H
@ -26,6 +27,7 @@
#endif
/* SDIO device ID */
#define SDIO_DEVICE_ID_BROADCOM_43143 43143
#define SDIO_DEVICE_ID_BROADCOM_43241 0x4324
#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
@ -34,10 +36,10 @@
#define SDIO_DEVICE_ID_BROADCOM_4335_4339 0x4335
#define SDIO_DEVICE_ID_BROADCOM_43362 43362
/*
* Core reg address translation.
/* Core reg address translation.
* Both macro's returns a 32 bits byte address on the backplane bus.
*/
#define CORE_CC_REG(base, field) \
(base + offsetof(struct chipcregs, field))
#define CORE_BUS_REG(base, field) \
@ -68,7 +70,8 @@
#define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
#define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
enum {
enum
{
CHIPCOMMON_CORE_ID = 0,
DOT11MAC_CORE_ID,
SDIOD_CORE_ID,
@ -77,7 +80,8 @@ enum {
MAX_CORE_ID
};
struct chip_core_info {
struct chip_core_info
{
uint16_t id;
uint16_t rev;
uint32_t base;
@ -86,7 +90,8 @@ struct chip_core_info {
uint32_t cib;
};
struct sbconfig {
struct sbconfig
{
uint8_t PAD[0xf00];
uint32_t PAD[2];
uint32_t sbipsflag; /* initiator port ocp slave flag */
@ -128,7 +133,9 @@ struct sbconfig {
};
/* sdio core registers */
struct sdpcmd_regs {
struct sdpcmd_regs
{
uint32_t corecontrol; /* 0x00, rev8 */
uint32_t corestatus; /* rev8 */
uint32_t PAD[1];

View File

@ -1,4 +1,4 @@
/*
/****************************************************************************
* Copyright (c) 2010 Broadcom Corporation
*
* Permission to use, copy, modify, and/or distribute this software for any
@ -12,7 +12,8 @@
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
*
****************************************************************************/
#ifndef __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_REGS_H
#define __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_REGS_H
@ -24,28 +25,35 @@
#define SDIOD_FBR_SIZE 0x100
/* io_en */
#define SDIO_FUNC_ENABLE_1 0x02
#define SDIO_FUNC_ENABLE_2 0x04
/* io_rdys */
#define SDIO_FUNC_READY_1 0x02
#define SDIO_FUNC_READY_2 0x04
/* intr_status */
#define INTR_STATUS_FUNC1 0x2
#define INTR_STATUS_FUNC2 0x4
/* Maximum number of I/O funcs */
#define SDIOD_MAX_IOFUNCS 7
/* mask of register map */
#define REG_F0_REG_MASK 0x7FF
#define REG_F1_MISC_MASK 0x1FFFF
/* as of sdiod rev 0, supports 3 functions */
#define SBSDIO_NUM_FUNCTION 3
/* function 0 vendor specific CCCR registers */
#define SDIO_CCCR_BRCM_CARDCAP 0xf0
#define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
#define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
@ -61,74 +69,140 @@
/* function 1 miscellaneous registers */
/* sprom command and status */
#define SBSDIO_SPROM_CS 0x10000
/* sprom info register */
#define SBSDIO_SPROM_INFO 0x10001
/* sprom indirect access data byte 0 */
#define SBSDIO_SPROM_DATA_LOW 0x10002
/* sprom indirect access data byte 1 */
#define SBSDIO_SPROM_DATA_HIGH 0x10003
/* sprom indirect access addr byte 0 */
#define SBSDIO_SPROM_ADDR_LOW 0x10004
/* sprom indirect access addr byte 0 */
#define SBSDIO_SPROM_ADDR_HIGH 0x10005
/* xtal_pu (gpio) output */
#define SBSDIO_CHIP_CTRL_DATA 0x10006
/* xtal_pu (gpio) enable */
#define SBSDIO_CHIP_CTRL_EN 0x10007
/* rev < 7, watermark for sdio device */
#define SBSDIO_WATERMARK 0x10008
/* control busy signal generation */
#define SBSDIO_DEVICE_CTL 0x10009
/* SB Address Window Low (b15) */
#define SBSDIO_FUNC1_SBADDRLOW 0x1000A
/* SB Address Window Mid (b23:b16) */
#define SBSDIO_FUNC1_SBADDRMID 0x1000B
/* SB Address Window High (b31:b24) */
#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
/* Frame Control (frame term/abort) */
#define SBSDIO_FUNC1_FRAMECTRL 0x1000D
/* Read Frame Terminate */
#define SFC_RF_TERM (1 << 0)
/* Write Frame Terminate */
#define SFC_WF_TERM (1 << 1)
/* CRC error for write out of sync */
#define SFC_CRC4WOOS (1 << 2)
/* Abort all in-progress frames */
#define SFC_ABORTALL (1 << 3)
/* ChipClockCSR (ALP/HT ctl/status) */
#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
/* Force ALP request to backplane */
#define SBSDIO_FORCE_ALP 0x01
/* Force HT request to backplane */
#define SBSDIO_FORCE_HT 0x02
/* Force ILP request to backplane */
#define SBSDIO_FORCE_ILP 0x04
/* Make ALP ready (power up xtal) */
#define SBSDIO_ALP_AVAIL_REQ 0x08
/* Make HT ready (power up PLL) */
#define SBSDIO_HT_AVAIL_REQ 0x10
/* Squelch clock requests from HW */
#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
/* Status: ALP is ready */
#define SBSDIO_ALP_AVAIL 0x40
/* Status: HT is ready */
#define SBSDIO_HT_AVAIL 0x80
/* SdioPullUp (on cmd, d0-d2) */
#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
/* Write Frame Byte Count Low */
#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
/* Write Frame Byte Count High */
#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
/* Read Frame Byte Count Low */
#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
/* Read Frame Byte Count High */
#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
/* MesBusyCtl (rev 11) */
#define SBSDIO_FUNC1_MESBUSYCTRL 0x1001D
/* Sdio Core Rev 12 */
#define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E
#define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK 0x1
#define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT 0
@ -155,9 +229,12 @@
/* function 1 OCP space */
/* sb offset addr is <= 15 bits, 32k */
#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
/* with b15, maps to 32-bit SB access */
#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */

View File

@ -56,7 +56,8 @@ int bcmf_sdpcm_queue_frame(FAR struct bcmf_dev_s *priv,
void bcmf_sdpcm_free_frame(FAR struct bcmf_dev_s *priv, struct bcmf_frame_s *frame);
struct bcmf_frame_s *bcmf_sdpcm_alloc_frame(FAR struct bcmf_dev_s *priv,
unsigned int len, bool block, bool control);
unsigned int len, bool block,
bool control);
struct bcmf_frame_s *bcmf_sdpcm_get_rx_frame(FAR struct bcmf_dev_s *priv);

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@ -7,7 +7,8 @@
#define SDIO_CMD53_TIMEOUT_MS 100
#define SDIO_IDLE_DELAY_MS 50
struct __attribute__((packed)) sdio_cmd52 {
struct __attribute__((packed)) sdio_cmd52
{
uint32_t write_data : 8;
uint32_t reserved_8 : 1;
uint32_t register_address : 17;
@ -17,7 +18,8 @@ struct __attribute__((packed)) sdio_cmd52 {
uint32_t rw_flag : 1;
};
struct __attribute__((packed)) sdio_cmd53 {
struct __attribute__((packed)) sdio_cmd53
{
uint32_t byte_block_count : 9;
uint32_t register_address : 17;
uint32_t op_code : 1;
@ -26,9 +28,11 @@ struct __attribute__((packed)) sdio_cmd53 {
uint32_t rw_flag : 1;
};
struct __attribute__((packed)) sdio_resp_R5 {
struct __attribute__((packed)) sdio_resp_R5
{
uint32_t data : 8;
struct {
struct
{
uint32_t out_of_range : 1;
uint32_t function_number : 1;
uint32_t rfu : 1;
@ -40,7 +44,8 @@ struct __attribute__((packed)) sdio_resp_R5 {
uint32_t reserved_16 : 16;
};
union sdio_cmd5x {
union sdio_cmd5x
{
uint32_t value;
struct sdio_cmd52 cmd52;
struct sdio_cmd53 cmd53;
@ -110,6 +115,7 @@ int sdio_io_rw_direct(FAR struct sdio_dev_s *dev, bool write,
{
return -EIO;
}
if (resp.flags.function_number || resp.flags.out_of_range)
{
return -EINVAL;
@ -198,11 +204,13 @@ int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write,
wlerr("timeout\n");
return -ETIMEDOUT;
}
if (resp.flags.error || (wkupevent & SDIOWAIT_ERROR))
{
wlerr("error 1\n");
return -EIO;
}
if (resp.flags.function_number || resp.flags.out_of_range)
{
wlerr("error 2\n");