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Rework of kernel build signal dispatch to user-space handlers

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5778 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-03-23 14:46:02 +00:00
parent 569bd582f6
commit 983a9dca49
6 changed files with 33 additions and 16 deletions
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2
configs/open1788/kernel/up_userspace.c
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@ -111,7 +111,7 @@ const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
/* Signal handler trampoline */ /* Signal handler trampoline */
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
.signal_handler = signal_handler, .signal_handler = up_signal_handler,
#endif #endif
/* Memory manager entry points (declared in include/nuttx/mm.h) */ /* Memory manager entry points (declared in include/nuttx/mm.h) */

12
configs/open1788/scripts/memory.ld
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@ -51,10 +51,14 @@
* *
* This alignment requirement means that the largest user space FLASH region * This alignment requirement means that the largest user space FLASH region
* you can have will be 256KB at it would have to be positioned at * you can have will be 256KB at it would have to be positioned at
* 0x00400000. If you change this address, don't forget to chagne the * 0x00400000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c. * the check in kernel/userspace.c.
* *
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range.
*
* A detailed memory map for the 64KB CPU SRAM region is as follows: * A detailed memory map for the 64KB CPU SRAM region is as follows:
* *
* 0x10000 0000: Kernel .data region. Typical size: 0.1KB * 0x10000 0000: Kernel .data region. Typical size: 0.1KB
@ -76,12 +80,14 @@ MEMORY
/* 256Kb FLASH */ /* 256Kb FLASH */
kflash (rx) : ORIGIN = 0x00000000, LENGTH = 64K kflash (rx) : ORIGIN = 0x00000000, LENGTH = 64K
uflash (rx) : ORIGIN = 0x00010000, LENGTH = 448K uflash (rx) : ORIGIN = 0x00010000, LENGTH = 64K
xflash (rx) : ORIGIN = 0x00010000, LENGTH = 384K
/* 64Kb of SRAM in the CPU block */ /* 64Kb of SRAM in the CPU block */
ksram (rwx) : ORIGIN = 0x10000000, LENGTH = 4K ksram (rwx) : ORIGIN = 0x10000000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x10001000, LENGTH = 60K usram (rwx) : ORIGIN = 0x10001000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x10001000, LENGTH = 56K
/* Other peripheral memory (free, nothing is linked here) */ /* Other peripheral memory (free, nothing is linked here) */

2
configs/sam3u-ek/kernel/up_userspace.c
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@ -111,7 +111,7 @@ const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
/* Signal handler trampoline */ /* Signal handler trampoline */
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
.signal_handler = signal_handler, .signal_handler = up_signal_handler,
#endif #endif
/* Memory manager entry points (declared in include/nuttx/mm.h) */ /* Memory manager entry points (declared in include/nuttx/mm.h) */

14
configs/sam3u-ek/scripts/memory.ld
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@ -51,11 +51,15 @@
* requirement also increases. * requirement also increases.
* *
* This alignment requirement means that the largest user space FLASH region * This alignment requirement means that the largest user space FLASH region
* you can have will be 2128KB at it would have to be positioned at * you can have will be 128KB at it would have to be positioned at
* 0x000a0000. If you change this address, don't forget to chagne the * 0x000a0000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c. * the check in kernel/userspace.c.
* *
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range.
*
* A detailed memory map for the 16Kb SRAM region is as follows: * A detailed memory map for the 16Kb SRAM region is as follows:
* *
* 0x20000 0000: Kernel .data region. Typical size: 0.1KB * 0x20000 0000: Kernel .data region. Typical size: 0.1KB
@ -77,12 +81,14 @@ MEMORY
/* 256Kb FLASH */ /* 256Kb FLASH */
kflash (rx) : ORIGIN = 0x00080000, LENGTH = 64K kflash (rx) : ORIGIN = 0x00080000, LENGTH = 64K
uflash (rx) : ORIGIN = 0x00090000, LENGTH = 192K uflash (rx) : ORIGIN = 0x00090000, LENGTH = 64K
xflash (rx) : ORIGIN = 0x000a0000, LENGTH = 128K
/* 32Kb SRAM */ /* 32Kb SRAM */
ksram1 (rwx) : ORIGIN = 0x20000000, LENGTH = 4K ksram1 (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
usram1 (rwx) : ORIGIN = 0x20001000, LENGTH = 28K usram1 (rwx) : ORIGIN = 0x20001000, LENGTH = 4K
xsram1 (rwx) : ORIGIN = 0x20001000, LENGTH = 24K
/* 16Kb SRAM */ /* 16Kb SRAM */

2
configs/stm32f4discovery/kernel/up_userspace.c
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@ -111,7 +111,7 @@ const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
/* Signal handler trampoline */ /* Signal handler trampoline */
#ifndef CONFIG_DISABLE_SIGNALS #ifndef CONFIG_DISABLE_SIGNALS
.signal_handler = signal_handler, .signal_handler = up_signal_handler,
#endif #endif
/* Memory manager entry points (declared in include/nuttx/mm.h) */ /* Memory manager entry points (declared in include/nuttx/mm.h) */

17
configs/stm32f4discovery/scripts/memory.ld
View File

@ -42,8 +42,7 @@
* *
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in * where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address * the 0x0800:0000 address range.
* range.
* *
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
@ -60,10 +59,14 @@
* *
* This alignment requirement means that the largest user space FLASH region * This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at * you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to chagne the * 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c. * the check in kernel/userspace.c.
* *
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range.
*
* A detailed memory map for the 112KB SRAM region is as follows: * A detailed memory map for the 112KB SRAM region is as follows:
* *
* 0x20000 0000: Kernel .data region. Typical size: 0.1KB * 0x20000 0000: Kernel .data region. Typical size: 0.1KB
@ -74,7 +77,7 @@
* ------- ---- Padded to 4KB * ------- ---- Padded to 4KB
* 0x20000 1000: User .data region. Size is variable. * 0x20000 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable. * ------- ---- User .bss region Size is variable.
* ------- ---- Beginning of kernel heap. Size determined by * 0x20000 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE. * CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings. * ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20001 c000: End+1 of CPU RAM * 0x20001 c000: End+1 of CPU RAM
@ -85,10 +88,12 @@ MEMORY
/* 1024Kb FLASH */ /* 1024Kb FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 896K uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 112Kb of contiguous SRAM */ /* 112Kb of contiguous SRAM */
ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20001000, LENGTH = 108K usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20001000, LENGTH = 104K
} }