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Tiva SSI: Use portable macros to enable peripheral clocking

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This commit is contained in:
Gregory Nutt 2014-12-21 11:16:21 -06:00
parent 8ed83ac3a5
commit 9857b59e79
2 changed files with 10 additions and 10 deletions
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5
arch/arm/src/tiva/tiva_enableclks.h
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@ -251,6 +251,11 @@
# define tiva_ssi2_disableclk() tiva_ssi_disableclk(2)
# define tiva_ssi3_disableclk() tiva_ssi_disableclk(3)
#else
# define tiva_ssi0_enableclk() tiva_enableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_SSI0)
# define tiva_ssi1_enableclk() tiva_enableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_SSI1)
# define tiva_ssi0_disableclk() tiva_disableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_SSI0)
# define tiva_ssi1_disableclk() tiva_disableclk(TIVA_SYSCON_RCGC1,SYSCON_RCGC1_SSI1)
#endif
/* I2C Run Mode Clock Gating Control */

15
arch/arm/src/tiva/tiva_ssi.c
View File

@ -57,6 +57,7 @@
#include "chip.h"
#include "tiva_gpio.h"
#include "tiva_enableclks.h"
#include "tiva_ssi.h"
#include "chip/tiva_pinmap.h"
@ -1473,12 +1474,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
priv = &g_ssidev[SSI0_NDX];
/* Enable the SSI0 peripheral */
/* Enable clocking to the SSI0 peripheral */
regval = getreg32(TIVA_SYSCON_RCGC1);
regval |= SYSCON_RCGC1_SSI0;
putreg32(regval, TIVA_SYSCON_RCGC1);
ssivdbg("RCGC1: %08x\n", regval);
tiva_ssi0_enableclk();
/* Configure SSI0 GPIOs (NOTE that SS is not initialized here, the
* logic in this file makes no assumptions about chip select)
@ -1497,12 +1495,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
priv = &g_ssidev[SSI1_NDX];
/* Enable the SSI1 peripheral */
/* Enable clocking to the SSI1 peripheral */
regval = getreg32(TIVA_SYSCON_RCGC1);
regval |= SYSCON_RCGC1_SSI1;
putreg32(regval, TIVA_SYSCON_RCGC1);
ssivdbg("RCGC1: %08x\n", regval);
tiva_ssi1_enableclk();
/* Configure SSI1 GPIOs */