XMC4xxx: Finishes system timer logic.

arch/arm/src/xmc4/xmc4_serial.c

@@ -1019,7 +1019,7 @@ static bool xmc4_txempty(struct uart_dev_s *dev)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: xmc4_earlyserialinit
+ * Name: up_earlyserialinit
  *
  * Description:
  *   Performs the low level UART initialization early in debug so that the
@@ -1031,7 +1031,7 @@ static bool xmc4_txempty(struct uart_dev_s *dev)
  ****************************************************************************/
 
 #if defined(USE_EARLYSERIALINIT)
-void xmc4_earlyserialinit(void)
+void up_earlyserialinit(void)
 {
   /* Disable interrupts from all UARTS.  The console is enabled in
    * pic32mx_consoleinit()

arch/arm/src/xmc4/xmc4_start.c

@@ -51,8 +51,9 @@
 #include "up_internal.h"
 #include "chip/xmc4_flash.h"
 
-#include "xmc4_userspace.h"
+#include "xmc4_clockconfig.h"
 #include "xmc4_lowputc.h"
+#include "xmc4_userspace.h"
 #include "xmc4_start.h"
 
 #ifdef CONFIG_ARCH_FPU
@@ -319,8 +320,7 @@ void __start(void)
 #endif
 
   /* Disable the watchdog timer */
-
-  xmc4_wddisable();
+  /* TODO - add logic to disable the watchdog timer */
 
   /* Enable unaligned memory access */
 

arch/arm/src/xmc4/xmc4_timerisr.c

@@ -57,23 +57,41 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+/* The SysTick counter runs on the clock selected by SYST_CSR.CLKSOURCE.
+ * That selection may be either:
+ *
+ *    CLKSOURCE=0: fSTDBY / 2
+ *    CLKSOURCE=1: fCPU
+ *
+ * In the first case, the SysTick counter would run at 16.384Khz.  The most
+ * common system clock of 10 msec/tick cannot be exactly represented with
+ * that value.
+ *
+ * In the second case, the SysTick counter may run to rapidly to support
+ * longer timer tick intervals.  For example, if the CPU clock is 144Mhz,
+ * then that 10 msec interval would correspond to a reload value of 1,440,000
+ * or 0x0015f900.
+ */
+
 /* The desired timer interrupt frequency is provided by the definition
  * CLK_TCK (see include/time.h).  CLK_TCK defines the desired number of
  * system clock ticks per second.  That value is a user configurable setting
  * that defaults to 100 (100 ticks per second = 10 MS interval).
  *
- * The Clock Source: The System Tick Timer's clock source is always the core
- * clock
+ * Lets try fCPU first:
  */
 
-#define SYSTICK_RELOAD ((BOARD_CORECLK_FREQ / CLK_TCK) - 1)
+#define SYSTICK_RELOAD ((BOARD_CPU_FREQUENCY / CLK_TCK) - 1)
+#undef  USE_STDBY_CLOCK
 
-/* The size of the reload field is 24 bits.  Verify that the reload value
- * will fit in the reload register.
- */
+/* Verify that the reload value will fit in the reload register. */
 
 #if SYSTICK_RELOAD > 0x00ffffff
-#  error SYSTICK_RELOAD exceeds the range of the RELOAD register
+  /* No, then revert to fSTDBY */
+
+#  undef SYSTICK_RELOAD
+#  define SYSTICK_RELOAD ((BOARD_STDBY_FREQUENCY / CLK_TCK) - 1)
+#  define USE_STDBY_CLOCK 1
 #endif
 
 /****************************************************************************
@@ -121,12 +139,17 @@ void arm_timer_initialize(void)
   regval |= (NVIC_SYSH_PRIORITY_DEFAULT << NVIC_SYSH_PRIORITY_PR15_SHIFT);
   putreg32(regval, NVIC_SYSH12_15_PRIORITY);
 
+#ifndef USE_STDBY_CLOCK
   /* Note that is should not be neccesary to set the SYSTICK clock source:
    * "The CLKSOURCE bit in SysTick Control and Status register is always set
    *  to select the core clock."
+   *
+   * For the XMC4xx, fhat selection may be either:
+   *
+   *   CLKSOURCE=0: fSTDBY / 2
+   *   CLKSOURCE=1: fCPU
    */
 
-#if 0
   regval = getreg32(NVIC_SYSTICK_CTRL);
   regval |= NVIC_SYSTICK_CTRL_CLKSOURCE;
   putreg32(regval, NVIC_SYSTICK_CTRL);

configs/xmc4500-relax/include/board.h

@@ -107,12 +107,13 @@
 
 /* Standby clock source selection
  *
- * BOARD_STDBY_CLOCKSRC_OSI    - Internal slow oscillator (32768Hz)
+ * BOARD_STDBY_CLOCKSRC_OSI    - Internal 32.768KHz slow oscillator
  * BOARD_STDBY_CLOCKSRC_OSCULP - External 32.768KHz crystal
  */
 
 #define BOARD_STDBY_CLOCKSRC_OSI   1
 #undef BOARD_STDBY_CLOCKSRC_OSCULP
+#define BOARD_STDBY_FREQUENCY     32768
 
 /* USB PLL settings.
  *

configs/xmc4500-relax/src/xmc4_appinit.c

@@ -39,6 +39,10 @@
 
 #include <nuttx/config.h>
 
+#include <stdint.h>
+
+#include <arch/board/board.h>
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/

configs/xmc4500-relax/src/xmc4_bringup.c

@@ -39,6 +39,8 @@
 
 #include <nuttx/config.h>
 
+#include <sys/types.h>
+
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/