Update Olimex-LPC1766STK scripts to use OpenOCD-0.7.0
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@ -38,6 +38,18 @@ if { [info exists CPUTAPID ] } {
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set _CPUTAPID 0x4ba00477
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set _CPUTAPID 0x4ba00477
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}
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}
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if { [info exists CPURAMSIZE] } {
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set _CPURAMSIZE $CPURAMSIZE
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} else {
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set _CPURAMSIZE 0x8000
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}
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if { [info exists CPUROMSIZE] } {
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set _CPUROMSIZE $CPUROMSIZE
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} else {
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set _CPUROMSIZE 0x40000
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}
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#delays on reset lines
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#delays on reset lines
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adapter_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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@ -49,23 +61,29 @@ reset_config trst_and_srst srst_pulls_trst
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jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
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# openocd-0.4:
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# target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
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# openocd-0.7:
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target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
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# LPC1766 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
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# LPC1766 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
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# and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
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# and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
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$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000
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$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE
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# LPC1766 has 256kB of flash memory, managed by ROM code (including a
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# LPC1766 has 256kB of flash memory, managed by ROM code (including a
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# boot loader which verifies the flash exception table's checksum).
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# boot loader which verifies the flash exception table's checksum).
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME \
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flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \
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lpc1700 $_CCLK calc_checksum
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lpc1700 $_CCLK calc_checksum
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# Run with *real slow* clock by default since the
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# Run with *real slow* clock by default since the
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# boot rom could have been playing with the PLL, so
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# boot rom could have been playing with the PLL, so
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# we have no idea what clock the target is running at.
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# we have no idea what clock the target is running at.
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jtag_khz 100
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# openocd-0.4:
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# jtag_khz 100
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# openocd-0.7
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adapter_khz 100
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$_TARGETNAME configure -event reset-init {
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$_TARGETNAME configure -event reset-init {
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# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
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# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
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@ -84,3 +102,8 @@ $_TARGETNAME configure -event reset-init {
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mww 0x400FC040 0x01
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mww 0x400FC040 0x01
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}
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}
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# if srst is not fitted use VECTRESET to
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# perform a soft reset - SYSRESETREQ is not supported
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# openocd-0.7:
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cortex_m reset_config vectreset
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@ -11,14 +11,14 @@ if [ -z "${TOPDIR}" ]; then
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exit 1
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exit 1
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fi
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fi
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# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment
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# Assume that OpenOCD was installed and at /usr/local/bin or maybe c:\OpenOCD
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# the following to run directly from the build directory
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#OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src"
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#OPENOCD_PATH="/home/OpenOCD/openocd/src"
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#TARGET_PATH="c:\OpenOCD\openocd-0.4.0\tcl"
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#TARGET_PATH="/home/OpenOCD/openocd/tcl"
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OPENOCD_PATH="/usr/local/bin"
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OPENOCD_PATH="/usr/local/bin"
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TARGET_PATH="/usr/local/share/openocd/scripts"
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TARGET_PATH="/usr/local/share/openocd/scripts"
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OPENOCD_EXE=openocd.exe
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OPENOCD_EXE=openocd.exe
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#OPENOCD_CFG=`cygpath -w "${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"`
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OPENOCD_CFG="${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"
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OPENOCD_CFG="${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"
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OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}"
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OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}"
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