The PIC32 USB device driver is code complete (but untested)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4240 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
1c9f257fa4
commit
992a0cbb7e
@ -109,32 +109,16 @@
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* endpoint register sets there are.
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*/
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#define NEP_REGISTERS (16) /* 16 endpoint control registers */
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#define PIC32MX_NENDPOINTS (16)
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#define EP0 (0)
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#define EP1 (1)
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#define EP2 (2)
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#define EP3 (3)
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#define EP4 (4)
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#define EP5 (5)
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#define EP6 (6)
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#define EP7 (7)
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#define EP8 (8)
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#define EP9 (9)
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#define EP10 (10)
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#define EP11 (11)
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#define EP12 (12)
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#define EP13 (13)
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#define EP14 (14)
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#define EP15 (15)
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#define PIC32MX_ENDP_BIT(ep) (1 << (ep))
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#define PIC32MX_ENDP_ALLSET 0xff
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#define PIC32MX_ENDP_ALLSET 0xffff
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/* Endpoint Definitions */
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#ifndef CONFIG_USB_PINGPONG
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# define USB_NEXT_PINGPONG 0
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# define USB_NEXT_PINGPONG (0)
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# define EP0_OUT_EVEN (0)
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# define EP0_OUT_ODD (0)
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# define EP0_IN_EVEN (1)
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@ -144,9 +128,8 @@
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# define EP_IN_EVEN(ep) (((ep) << 1) + 1)
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# define EP_IN_ODD(ep) (((ep) << 1) + 1)
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# define EP(ep,dir,pp) (((ep) << 1) + (dir))
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# define BD(ep,dir,pp) (((ep) << 3) + ((dir) << 2))
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#else
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# define USB_NEXT_PINGPONG USB_BDT_DTS
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# define USB_NEXT_PINGPONG (USB_BDT_DTS)
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# define EP0_OUT_EVEN (0)
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# define EP0_OUT_ODD (1)
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# define EP0_IN_EVEN (2)
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@ -156,23 +139,24 @@
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# define EP_IN_EVEN(ep) (((ep) << 2) + 2)
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# define EP_IN_ODD(ep) (((ep) << 2) + 3)
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# define EP(ep,dir,pp) (((ep) << 2) + ((dir) << 1) + (pp))
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# define BD(ep,dir,pp) (((ep) << 5) + ((dir) << 4) + ((pp) << 3))
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#endif
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/* Packet sizes. We us a fixed 64 max packet size for all endpoint types */
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#define PIC32MX_MAXPACKET_SHIFT (6)
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#define PIC32MX_MAXPACKET_SIZE (1 << (PIC32MX_MAXPACKET_SHIFT))
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#define PIC32MX_MAXPACKET_MASK (PIC32MX_MAXPACKET_SIZE-1)
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#define PIC32MX_EP0MAXPACKET PIC32MX_MAXPACKET_SIZE
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#define PIC32MX_EP0MAXPACKET PIC32MX_MAXPACKET_SIZE
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/* UEPn Initialization Parameters */
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/* Endpoint register initialization parameters */
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#define EP_CTRL (USB_EP_EPTXEN|USB_EP_EPRXEN)
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#define EP_OUT (USB_EP_EPRXEN|USB_EP_EPCONDIS)
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#define EP_IN (USB_EP_EPTXEN|USB_EP_EPCONDIS)
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#define EP_OUT_IN (USB_EP_EPTXEN|USB_EP_EPRXEN|USB_EP_EPCONDIS)
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#define PIC32MX_EP_CONTROL (USB_EP_EPHSHK|USB_EP_EPTXEN|USB_EP_EPRXEN)
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#define PIC32MX_EP_BULKIN (USB_EP_EPTXEN|USB_EP_EPCONDIS|USB_EP_EPHSHK)
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#define PIC32MX_EP_BULKOUT (USB_EP_EPRXEN|USB_EP_EPCONDIS|USB_EP_EPHSHK)
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#define PIC32MX_EP_INTIN (USB_EP_EPTXEN|USB_EP_EPCONDIS|USB_EP_EPHSHK)
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#define PIC32MX_EP_INTOUT (USB_EP_EPRXEN|USB_EP_EPCONDIS|USB_EP_EPHSHK)
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#define PIC32MX_EP_ISOCIN (USB_EP_EPTXEN|USB_EP_EPCONDIS)
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#define PIC32MX_EP_ISOCOUT (USB_EP_EPRXEN|USB_EP_EPCONDIS)
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/* USB-related masks */
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@ -180,8 +164,8 @@
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/* Request queue operations *************************************************/
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#define pic32mx_rqempty(ep) ((ep)->head == NULL)
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#define pic32mx_rqpeek(ep) ((ep)->head)
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#define pic32mx_rqempty(ep) ((ep)->head == NULL)
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#define pic32mx_rqpeek(ep) ((ep)->head)
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/* USB trace ****************************************************************/
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/* Trace error codes */
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@ -202,16 +186,16 @@
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#define PIC32MX_TRACEERR_DISPATCHSTALL 0x000e
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#define PIC32MX_TRACEERR_DRIVER 0x000f
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#define PIC32MX_TRACEERR_DRIVERREGISTERED 0x0010
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#define PIC32MX_TRACEERR_EP0SETUPSTALLED 0x0012
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#define PIC32MX_TRACEERR_EPDISABLED 0x0014
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#define PIC32MX_TRACEERR_EPOUTNULLPACKET 0x0015
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#define PIC32MX_TRACEERR_EPRESERVE 0x0016
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#define PIC32MX_TRACEERR_INVALIDCTRLREQ 0x0017
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#define PIC32MX_TRACEERR_INVALIDPARMS 0x0018
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#define PIC32MX_TRACEERR_IRQREGISTRATION 0x0019
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#define PIC32MX_TRACEERR_NOTCONFIGURED 0x001a
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#define PIC32MX_TRACEERR_REQABORTED 0x001b
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#define PIC32MX_TRACEERR_INVALIDSTATE 0x001c
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#define PIC32MX_TRACEERR_EP0SETUPSTALLED 0x0011
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#define PIC32MX_TRACEERR_EPDISABLED 0x0012
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#define PIC32MX_TRACEERR_EPOUTNULLPACKET 0x0013
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#define PIC32MX_TRACEERR_EPRESERVE 0x0014
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#define PIC32MX_TRACEERR_INVALIDCTRLREQ 0x0015
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#define PIC32MX_TRACEERR_INVALIDPARMS 0x0016
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#define PIC32MX_TRACEERR_IRQREGISTRATION 0x0017
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#define PIC32MX_TRACEERR_NOTCONFIGURED 0x0018
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#define PIC32MX_TRACEERR_REQABORTED 0x0019
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#define PIC32MX_TRACEERR_INVALIDSTATE 0x001a
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/* Trace interrupt codes */
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@ -234,20 +218,20 @@
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#define PIC32MX_TRACEINTID_GETSETDESC 0x0011
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#define PIC32MX_TRACEINTID_GETSETIF 0x0012
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#define PIC32MX_TRACEINTID_GETSTATUS 0x0013
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#define PIC32MX_TRACEINTID_IFGETSTATUS 0x0015
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#define PIC32MX_TRACEINTID_TRNC 0x0016
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#define PIC32MX_TRACEINTID_INTERRUPT 0x0017
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#define PIC32MX_TRACEINTID_NOSTDREQ 0x0018
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#define PIC32MX_TRACEINTID_RESET 0x0019
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#define PIC32MX_TRACEINTID_SETCONFIG 0x001a
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#define PIC32MX_TRACEINTID_SETFEATURE 0x001b
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#define PIC32MX_TRACEINTID_IDLE 0x001c
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#define PIC32MX_TRACEINTID_SYNCHFRAME 0x001d
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#define PIC32MX_TRACEINTID_WKUP 0x001e
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#define PIC32MX_TRACEINTID_T1MSEC 0x001f
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#define PIC32MX_TRACEINTID_OTGID 0x0020
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#define PIC32MX_TRACEINTID_STALL 0x0021
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#define PIC32MX_TRACEINTID_UERR 0x0022
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#define PIC32MX_TRACEINTID_IFGETSTATUS 0x0014
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#define PIC32MX_TRACEINTID_TRNC 0x0015
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#define PIC32MX_TRACEINTID_INTERRUPT 0x0016
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#define PIC32MX_TRACEINTID_NOSTDREQ 0x0017
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#define PIC32MX_TRACEINTID_RESET 0x0018
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#define PIC32MX_TRACEINTID_SETCONFIG 0x0019
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#define PIC32MX_TRACEINTID_SETFEATURE 0x001a
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#define PIC32MX_TRACEINTID_IDLE 0x001b
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#define PIC32MX_TRACEINTID_SYNCHFRAME 0x001c
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#define PIC32MX_TRACEINTID_WKUP 0x001d
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#define PIC32MX_TRACEINTID_T1MSEC 0x001e
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#define PIC32MX_TRACEINTID_OTGID 0x001f
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#define PIC32MX_TRACEINTID_STALL 0x0020
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#define PIC32MX_TRACEINTID_UERR 0x0021
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/* Misc Helper Macros *******************************************************/
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@ -333,24 +317,6 @@ struct pic32mx_req_s
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/* This is the internal representation of an endpoint */
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/* This structure is used to keep track of data that is sent out via an IN EP */
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struct usb_inpipe_s
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{
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uint8_t *src;
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bool inuse;
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uint16_t wcount;
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};
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/* This structure is used to keep track of data that is coming in via an OUT EP */
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struct usb_outpipe_s
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{
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uint8_t *dest;
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bool inuse;
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uint16_t wcount;
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};
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struct pic32mx_ep_s
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{
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/* Common endpoint fields. This must be the first thing defined in the
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@ -394,12 +360,9 @@ struct pic32mx_usbdev_s
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struct usb_ctrlreq_s ctrl; /* Last EP0 request */
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uint8_t devstate; /* Driver state (see enum pic32mx_devstate_e) */
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uint8_t ctrlstate; /* Control EP state (see enum pic32mx_ctrlstate_e) */
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uint8_t nesofs; /* ESOF counter (for resume support) */
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uint8_t selfpowered:1; /* 1: Device is self powered */
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uint8_t rwakeup:1; /* 1: Device supports remote wakeup */
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uint8_t epavail; /* Bitset of available endpoints */
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uint16_t imask; /* Current interrupt mask */
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uint16_t epavail; /* Bitset of available endpoints */
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/* The endpoint list */
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@ -450,7 +413,8 @@ static void pic32mx_cancelrequests(struct pic32mx_ep_s *privep);
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static void pic32mx_dispatchrequest(struct pic32mx_usbdev_s *priv);
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static void pic32mx_ep0stall(struct pic32mx_usbdev_s *priv);
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static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno);
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static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno,
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uint16_t status);
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static void pic32mx_ep0nextsetup(struct pic32mx_usbdev_s *priv);
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static void pic32mx_ep0done(struct pic32mx_usbdev_s *priv,
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uint8_t *response, int nbytes);
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@ -871,19 +835,19 @@ static int pic32mx_wrrequest(struct pic32mx_usbdev_s *priv, struct pic32mx_ep_s
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/* Send the packet (might be a null packet nbytes == 0) */
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buf = privreq->req.buf + privreq->req.xfrd;
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/* Setup the writes to the endpoints */
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pic32mx_epwrite(privep, buf, nbytes);
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/* Special case endpoint 0 state information. The write request is in
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* progress.
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*/
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if (epno == 0)
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{
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/* Handle writes to the EP0 IN endpoint */
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pic32mx_ep0write(priv, buf, nbytes);
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priv->ctrlstate = CTRLSTATE_WRREQUEST;
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}
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else
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{
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/* Handle writes to other endpoints */
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pic32mx_epwrite(privep, buf, nbytes);
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}
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/* Update for the next data IN interrupt */
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@ -1193,7 +1157,8 @@ static void pic32mx_ep0stall(struct pic32mx_usbdev_s *priv)
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* Name: pic32mx_eptransfer
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****************************************************************************/
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static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno)
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static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno,
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uint16_t status)
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{
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struct pic32mx_ep_s *privep;
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@ -1201,10 +1166,12 @@ static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno)
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privep = &priv->eplist[epno];
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/* OUT: host-to-device */
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#warning "Missing logic"
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/* Check if the last transaction was an EP0 OUT transaction */
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if ((status & USB_STAT_DIR) == USB_STAT_DIR_OUT)
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{
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/* OUT: host-to-device */
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usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EPOUTDONE), epr);
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/* Handle read requests. First check if a read request is available to
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@ -1226,13 +1193,9 @@ static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno)
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#warning "Missing logic"
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}
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}
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/* IN: device-to-host */
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#warning "Missing logic"
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else
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{
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/* Clear interrupt status */
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#warning "Missing logic"
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/* IN: device-to-host */
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usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_EPINDONE), epr);
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@ -1302,7 +1265,7 @@ static void pic32mx_ep0done(struct pic32mx_usbdev_s *priv,
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/* Send the EP0 SETUP response */
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pic32mx_ep0write(priv, response, nbytes);
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pic32mx_epwrite(&priv->eplist[EP0], response, nbytes);
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/* Prepare OUT EP to respond to early termination NOTE: If
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* something went wrong during the control transfer, the last
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@ -1938,7 +1901,7 @@ static void pic32mx_ep0in(struct pic32mx_usbdev_s *priv)
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{
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/* Is there another IN transfer in-flight? */
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if (priv->ctrlstate = CTRLSTATE_WAITSETUP)
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if (priv->ctrlstate == CTRLSTATE_WAITSETUP)
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{
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/* No... Prepare for the next SETUP transfer */
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@ -2170,8 +2133,10 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t status)
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if (priv->ctrlstate == CTRLSTATE_STALLED)
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{
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/* Stall EP0 */
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usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_EP0SETUPSTALLED), priv->ctrlstate);
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#warning "Missing logic"
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(void)pic32mx_epstall(&priv->eplist[EP0].ep, false);
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}
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}
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@ -2410,7 +2375,7 @@ static int pic32mx_interrupt(int irq, void *context)
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}
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else
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{
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pic32mx_eptransfer(priv, epno);
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pic32mx_eptransfer(priv, epno, regval);
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}
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}
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else
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@ -2466,8 +2431,11 @@ static void pic32mx_suspend(struct pic32mx_usbdev_s *priv)
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static void pic32mx_resume(struct pic32mx_usbdev_s *priv)
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{
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irqstate_t flags;
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uint16_t regval;
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flags = irqsave();
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/* Start RESUME signaling */
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regval = pic32mx_getreg(PIC32MX_USB_CON);
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@ -2506,6 +2474,7 @@ static void pic32mx_resume(struct pic32mx_usbdev_s *priv)
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*/
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pic32mx_putreg(USB_INT_IDLE, PIC32MX_USBOTG_IR);
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irqrestore(flags);
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}
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/****************************************************************************
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@ -2585,9 +2554,14 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
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bool last)
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{
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struct pic32mx_ep_s *privep = (struct pic32mx_ep_s *)ep;
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uint16_t setting;
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volatile struct usbotg_bdtentry_s *bdt;
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uint16_t maxpacket;
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uint16_t regval;
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uint16_t status;
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uint8_t epno;
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bool epin;
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bool bidi;
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int index;
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#ifdef CONFIG_DEBUG
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if (!ep || !desc)
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@ -2601,6 +2575,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
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/* Get the unadorned endpoint address */
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epno = USB_EPNO(desc->addr);
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epin = USB_ISEPIN(desc->addr);
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usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
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DEBUGASSERT(epno == USB_EPNO(ep->eplog));
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@ -2609,19 +2585,20 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
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switch (desc->attr & USB_EP_ATTR_XFERTYPE_MASK)
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{
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case USB_EP_ATTR_XFER_INT: /* Interrupt endpoint */
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#warning "Missing logic"
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regval = epin ? PIC32MX_EP_INTIN : PIC32MX_EP_INTOUT;
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break;
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case USB_EP_ATTR_XFER_BULK: /* Bulk endpoint */
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#warning "Missing logic"
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regval = epin ? PIC32MX_EP_BULKIN : PIC32MX_EP_BULKOUT;
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break;
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case USB_EP_ATTR_XFER_ISOC: /* Isochronous endpoint */
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#warning "Missing logic"
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regval = epin ? PIC32MX_EP_ISOCIN : PIC32MX_EP_ISOCOUT;
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break;
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case USB_EP_ATTR_XFER_CONTROL: /* Control endpoint */
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#warning "Missing logic"
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regval = PIC32MX_EP_CONTROL;
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bidi = true;
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break;
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default:
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@ -2629,10 +2606,82 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
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return -EINVAL;
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}
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pic32mx_seteptype(epno, setting);
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/* Enable the endpoint */
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/* Get the address of the buffer allocated for this endpoint */
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#warning "Missing logic"
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pic32mx_putreg(regval, PIC32MX_USB_EP(epno));
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regdbg("PIC32MX_USB_EP%d: %04x\n", epno, getreg16(PIC32MX_USB_EP(epno)));
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/* Setup up buffer descriptor table (BDT) entry/ies for this endpoint */
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if (epin || bidi)
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{
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/* Get the pointer to BDT entry */
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index = EP(epno, 1, 0);
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bdt = &g_bdt[index];
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privep->bdtin = bdt;
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/* Mark that we own the entry */
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status = bdt->status & ~USB_BDT_UOWN;
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/* Set DATA1 to one because the first thing we will do when transmitting is
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* toggle the bit
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*/
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status |= USB_BDT_DATA01;
|
||||
bdt->status = status;
|
||||
|
||||
regdbg("EP%d BDT IN {%08x, %08x}\n", epno, status, bdt->addr);
|
||||
|
||||
/* Now do the same for the other buffer (if ping pong mode is supported).
|
||||
* The only difference is the we clear DATA1 (making it DATA0)
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_USB_PINGPONG
|
||||
bdt = &g_bdt[index+1];
|
||||
status = bdt->status & ~USB_BDT_UOWN;
|
||||
|
||||
status &= ~USB_BDT_DATA01;
|
||||
bdt->status = status;
|
||||
|
||||
regdbg("EP%d BDT IN {%08x, %08x}\n", epno, status, bdt->addr);
|
||||
#endif
|
||||
}
|
||||
|
||||
if (!epin || bidi)
|
||||
{
|
||||
index = EP(epno, 0, 0);
|
||||
bdt = &g_bdt[index];
|
||||
privep->bdtout = bdt;
|
||||
|
||||
/* Mark that we own the entry */
|
||||
|
||||
status = bdt->status & ~USB_BDT_UOWN;
|
||||
|
||||
/* Set DATA1 to one because the first thing we will do when transmitting is
|
||||
* toggle the bit
|
||||
*/
|
||||
|
||||
status |= USB_BDT_DATA01;
|
||||
bdt->status = status;
|
||||
|
||||
regdbg("EP%d BDT OUT {%08x, %08x}\n", epno, status, bdt->addr);
|
||||
|
||||
/* Now do the same for the other buffer (if ping pong mode is supported).
|
||||
* The only difference is the we clear DATA1 (making it DATA0)
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_USB_PINGPONG
|
||||
bdt = &g_bdt[index+1];
|
||||
status = bdt->status & ~USB_BDT_UOWN;
|
||||
|
||||
status &= ~USB_BDT_DATA01;
|
||||
bdt->status = status;
|
||||
|
||||
regdbg("EP%d BDT OUT {%08x, %08x}\n", epno, status, bdt->addr);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Get the maxpacket size of the endpoint. */
|
||||
|
||||
@ -2640,29 +2689,18 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
|
||||
DEBUGASSERT(maxpacket <= PIC32MX_MAXPACKET_SIZE);
|
||||
ep->maxpacket = maxpacket;
|
||||
|
||||
/* Get the subset matching the requested direction */
|
||||
/* Set the full, logic EP number (that includes direction encoded in bit 7) */
|
||||
|
||||
if (USB_ISEPIN(desc->addr))
|
||||
if (epin)
|
||||
{
|
||||
/* The full, logical EP number includes direction */
|
||||
|
||||
ep->eplog = USB_EPIN(epno);
|
||||
|
||||
/* Set up TX; disable RX */
|
||||
#warning "Missing logic"
|
||||
}
|
||||
else
|
||||
{
|
||||
/* The full, logical EP number includes direction */
|
||||
|
||||
ep->eplog = USB_EPOUT(epno);
|
||||
|
||||
/* Set up RX; disable TX */
|
||||
#warning "Missing logic"
|
||||
}
|
||||
|
||||
regdbg("PIC32MX_USB_EP%d: %04x\n", epno, getreg16(PIC32MX_USB_EP(epno)));
|
||||
return OK;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -2671,9 +2709,12 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
|
||||
|
||||
static int pic32mx_epdisable(struct usbdev_ep_s *ep)
|
||||
{
|
||||
struct pic32mx_ep_s *privep = (struct pic32mx_ep_s *)ep;
|
||||
struct pic32mx_usbdev_s *priv;
|
||||
struct pic32mx_ep_s *privep;
|
||||
volatile uint32_t *ptr;
|
||||
int epno;
|
||||
int i;
|
||||
irqstate_t flags;
|
||||
uint8_t epno;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!ep)
|
||||
@ -2684,7 +2725,9 @@ static int pic32mx_epdisable(struct usbdev_ep_s *ep)
|
||||
}
|
||||
#endif
|
||||
|
||||
epno = USB_EPNO(ep->eplog);
|
||||
privep = (struct pic32mx_ep_s *)ep;
|
||||
priv = privep->dev;
|
||||
epno = USB_EPNO(ep->eplog);
|
||||
usbtrace(TRACE_EPDISABLE, epno);
|
||||
|
||||
/* Cancel any ongoing activity */
|
||||
@ -2692,8 +2735,21 @@ static int pic32mx_epdisable(struct usbdev_ep_s *ep)
|
||||
flags = irqsave();
|
||||
pic32mx_cancelrequests(privep);
|
||||
|
||||
/* Disable TX; disable RX */
|
||||
#warning "Missing logic"
|
||||
/* Disable the endpoint */
|
||||
|
||||
pic32mx_putreg(0, PIC32MX_USB_EP(epno));
|
||||
|
||||
/* Reset the BDTs */
|
||||
|
||||
ptr = (uint32_t*)&g_bdt[EP(epno, 0, 0)];
|
||||
#ifdef CONFIG_USB_PINGPONG
|
||||
for (i = 0; i < (4 * sizeof(struct usbotg_bdtentry_s) / sizeof(uint32_t)); i++)
|
||||
#else
|
||||
for (i = 0; i < (2 * sizeof(struct usbotg_bdtentry_s) / sizeof(uint32_t)); i++)
|
||||
#endif
|
||||
{
|
||||
*ptr++ = 0;
|
||||
}
|
||||
|
||||
irqrestore(flags);
|
||||
return OK;
|
||||
@ -3041,11 +3097,11 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume)
|
||||
****************************************************************************/
|
||||
|
||||
static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, uint8_t epno,
|
||||
bool in, uint8_t eptype)
|
||||
bool epin, uint8_t eptype)
|
||||
{
|
||||
struct pic32mx_usbdev_s *priv = (struct pic32mx_usbdev_s *)dev;
|
||||
struct pic32mx_ep_s *privep = NULL;
|
||||
uint8_t epset = PIC32MX_ENDP_ALLSET;
|
||||
uint16_t epset = PIC32MX_ENDP_ALLSET;
|
||||
|
||||
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
|
||||
#ifdef CONFIG_DEBUG
|
||||
@ -3091,19 +3147,10 @@ static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, uint8_t epno,
|
||||
if (!privep)
|
||||
{
|
||||
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_EPRESERVE), (uint16_t)epset);
|
||||
goto errout;
|
||||
return NULL;
|
||||
}
|
||||
epno = USB_EPNO(privep->ep.eplog);
|
||||
|
||||
/* Allocate a resources buffer for this endpoint */
|
||||
#warning "Missing logic"
|
||||
|
||||
return &privep->ep;
|
||||
|
||||
errout_with_ep:
|
||||
pic32mx_epunreserve(priv, privep);
|
||||
errout:
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -3122,19 +3169,19 @@ static void pic32mx_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
priv = (struct pic32mx_usbdev_s *)dev;
|
||||
privep = (struct pic32mx_ep_s *)ep;
|
||||
usbtrace(TRACE_DEVFREEEP, (uint16_t)USB_EPNO(ep->eplog));
|
||||
DEBUGASSERT(priv && privep);
|
||||
|
||||
if (priv && privep)
|
||||
{
|
||||
/* Free the resources assigned to this endpoint */
|
||||
#warning "Missing logic"
|
||||
/* Disable the endpoint */
|
||||
|
||||
/* Mark the endpoint as available */
|
||||
(void)pic32mx_epdisable(ep);
|
||||
|
||||
pic32mx_epunreserve(priv, privep);
|
||||
}
|
||||
/* Mark the endpoint as available */
|
||||
|
||||
pic32mx_epunreserve(priv, privep);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -3143,7 +3190,9 @@ static void pic32mx_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
|
||||
|
||||
static int pic32mx_getframe(struct usbdev_s *dev)
|
||||
{
|
||||
uint16_t fnr;
|
||||
uint16_t frml;
|
||||
uint16_t frmh;
|
||||
uint16_t tmp;
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
if (!dev)
|
||||
@ -3153,11 +3202,28 @@ static int pic32mx_getframe(struct usbdev_s *dev)
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Return the last frame number detected by the hardware */
|
||||
#warning "Missing logic"
|
||||
fnr = 0;
|
||||
usbtrace(TRACE_DEVGETFRAME, fnr);
|
||||
return fnr;
|
||||
/* Return the last frame number detected by the hardware. Thr FRMH/L
|
||||
* registers are updated with the current frame number whenever a SOF
|
||||
* TOKEN is received.
|
||||
*/
|
||||
|
||||
do
|
||||
{
|
||||
/* Loop until we can be sure that there was no wrap from the FRML
|
||||
* to the FRMH register.
|
||||
*/
|
||||
|
||||
frmh = pic32mx_getreg(PIC32MX_USB_FRMH) & USB_FRMH_MASK;
|
||||
frml = pic32mx_getreg(PIC32MX_USB_FRML) & USB_FRML_MASK;
|
||||
tmp = pic32mx_getreg(PIC32MX_USB_FRMH) & USB_FRMH_MASK;
|
||||
}
|
||||
while (frmh != tmp);
|
||||
|
||||
/* Combine to for the full 11-bit value */
|
||||
|
||||
tmp = (frmh) << 8 | frml;
|
||||
usbtrace(TRACE_DEVGETFRAME, tmp);
|
||||
return tmp;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -3167,7 +3233,6 @@ static int pic32mx_getframe(struct usbdev_s *dev)
|
||||
static int pic32mx_wakeup(struct usbdev_s *dev)
|
||||
{
|
||||
struct pic32mx_usbdev_s *priv = (struct pic32mx_usbdev_s *)dev;
|
||||
irqstate_t flags;
|
||||
|
||||
usbtrace(TRACE_DEVWAKEUP, 0);
|
||||
#ifdef CONFIG_DEBUG
|
||||
@ -3178,20 +3243,9 @@ static int pic32mx_wakeup(struct usbdev_s *dev)
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Start the resume sequence. The actual resume steps will be driven
|
||||
* by the ESOF interrupt.
|
||||
*/
|
||||
/* Resume normal operation. */
|
||||
|
||||
flags = irqsave();
|
||||
pic32mx_resume(priv);
|
||||
|
||||
/* Disable the SUSP interrupt (until we are fully resumed), disable
|
||||
* the WKUP interrupt (we are already waking up), and enable the
|
||||
* ESOF interrupt that will drive the resume operations. Clear any
|
||||
* pending ESOF interrupt.
|
||||
*/
|
||||
#warning "Missing logic"
|
||||
irqrestore(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -3228,15 +3282,15 @@ static void pic32mx_reset(struct pic32mx_usbdev_s *priv)
|
||||
{
|
||||
int epno;
|
||||
|
||||
/* Put the USB controller in reset, disable all interrupts */
|
||||
#warning "Missing logic"
|
||||
|
||||
/* Tell the class driver that we are disconnected. The class driver
|
||||
* should then accept any new configurations.
|
||||
*/
|
||||
|
||||
CLASS_DISCONNECT(priv->driver, &priv->usbdev);
|
||||
|
||||
if (priv->driver)
|
||||
{
|
||||
CLASS_DISCONNECT(priv->driver, &priv->usbdev);
|
||||
}
|
||||
|
||||
/* Reset the device state structure */
|
||||
|
||||
priv->ctrlstate = CTRLSTATE_WAITSETUP;
|
||||
@ -3393,12 +3447,12 @@ static void pic32mx_hwreset(struct pic32mx_usbdev_s *priv)
|
||||
pic32mx_putreg(USB_EINT_ALL, PIC32MX_USB_EIR);
|
||||
pic32mx_putreg(USB_INT_ALL, PIC32MX_USB_IR);
|
||||
|
||||
/* Reset configuration and interrrupt enabled */
|
||||
/* Reset configuration and enable interrrupts */
|
||||
|
||||
pic32mx_putreg(0, PIC32MX_USB_CNFG1);
|
||||
pic32mx_putreg(ERROR_INTERRUPTS, PIC32MX_USB_EIE);
|
||||
pic32mx_putreg(NORMAL_INTERRUPTS, PIC32MX_USB_EIE);
|
||||
|
||||
|
||||
/* Power up the USB module */
|
||||
|
||||
regval = pic32mx_getreg(PIC32MX_USB_PWRC);
|
||||
@ -3422,7 +3476,7 @@ static void pic32mx_hwreset(struct pic32mx_usbdev_s *priv)
|
||||
|
||||
/* Clear all of the endpoint control registers */
|
||||
|
||||
for (i = 0; i < NEP_REGISTERS; i++)
|
||||
for (i = 0; i < PIC32MX_NENDPOINTS; i++)
|
||||
{
|
||||
pic32mx_putreg(0, PIC32MX_USB_EP(i));
|
||||
}
|
||||
@ -3438,7 +3492,7 @@ static void pic32mx_hwreset(struct pic32mx_usbdev_s *priv)
|
||||
|
||||
/* Initialize EP0 as a Ctrl EP */
|
||||
|
||||
pic32mx_putreg(EP_CTRL | USB_EP_EPHSHK, PIC32MX_USB_EP0);
|
||||
pic32mx_putreg(PIC32MX_EP_CONTROL, PIC32MX_USB_EP0);
|
||||
|
||||
/* Flush any pending transactions */
|
||||
|
||||
@ -3525,20 +3579,32 @@ static void pic32mx_hwsetup(struct pic32mx_usbdev_s *priv)
|
||||
|
||||
static void pic32mx_hwshutdown(struct pic32mx_usbdev_s *priv)
|
||||
{
|
||||
uint16_t regval;
|
||||
|
||||
/* Put the hardware in its normal, unconnected state */
|
||||
|
||||
pic32mx_reset(priv);
|
||||
priv->usbdev.speed = USB_SPEED_UNKNOWN;
|
||||
|
||||
/* Disable all interrupts and force the USB controller into reset */
|
||||
#warning "Missing logic"
|
||||
|
||||
pic32mx_putreg(0, PIC32MX_USB_EIE);
|
||||
pic32mx_putreg(0, PIC32MX_USB_EIE);
|
||||
|
||||
/* Clear any pending interrupts */
|
||||
#warning "Missing logic"
|
||||
|
||||
pic32mx_putreg(USB_EINT_ALL, PIC32MX_USB_EIR);
|
||||
pic32mx_putreg(USB_INT_ALL, PIC32MX_USB_IR);
|
||||
|
||||
/* Disconnect the device / disable the pull-up */
|
||||
|
||||
pic32mx_usbpullup(&priv->usbdev, false);
|
||||
|
||||
/* Power down the USB controller */
|
||||
#warning "Missing logic"
|
||||
|
||||
regval = pic32mx_getreg(PIC32MX_USB_PWRC);
|
||||
regval &= ~USB_PWRC_USBPWR;
|
||||
pic32mx_putreg(regval, PIC32MX_USB_PWRC);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
Loading…
Reference in New Issue
Block a user