From 996ac31d584a47171c4ca3d791b12a683e08ec03 Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 17 Jun 2009 21:15:31 +0000 Subject: [PATCH] Straighten out conditional compilation git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1896 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/include/arch.h | 37 ++++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/arch.h b/arch/arm/include/arch.h index d97353ba12..88c0706db8 100644 --- a/arch/arm/include/arch.h +++ b/arch/arm/include/arch.h @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/include/arch.h * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,6 +48,41 @@ * Definitions ****************************************************************************/ +/* This identifies the register the is used by the processor as the PIC base + * register. It is usually r9 or r10 + */ + +#define PIC_REG r10 +#define PIC_REG_STRING "r10" + +/* Macros to get and set the PIC base register. picbase is assumed to be + * of type (void*) and that it will fit into a uint32. These must be + * inline so that they will be compatible with the ABIs rules for + * preserving the PIC register + */ + +#define up_getpicbase(ppicbase) \ +do { \ + uint32 picbase; \ + __asm__ \ + ( \ + "\tmov %0, " PIC_REG_STRING "\n\t" \ + : "=r"(picbase) \ + ); \ + *ppicbase = (FAR void*)picbase; \ +} while (0) + +#define up_setpicbase(picbase) \ +do { \ + uint32 _picbase = (uint32)picbase; \ + __asm__ \ + ( \ + "\tmov " PIC_REG_STRING ", %0\n\t" \ + : : "r"(_picbase) : PIC_REG_STRING \ + ); \ +} while (0) + + /**************************************************************************** * Inline functions ****************************************************************************/