From 9998f8511046ffe3255fbce520ac946b43e2af9b Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 16 Dec 2009 20:05:51 +0000 Subject: [PATCH] Changing NuttX fixed size type names to C99 standard names -- things will be broken for awhile git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2359 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/include/arch.h | 9 +- arch/arm/include/arm/irq.h | 10 +- arch/arm/include/cortexm3/irq.h | 35 +- arch/arm/include/lm3s/irq.h | 1 - arch/arm/include/lpc214x/irq.h | 6 +- arch/arm/include/serial.h | 4 +- arch/arm/include/stm32/irq.h | 1 - arch/arm/include/str71x/irq.h | 1 - arch/arm/src/arm/arm.h | 6 +- arch/arm/src/arm/up_assert.c | 38 +- arch/arm/src/arm/up_blocktask.c | 6 +- arch/arm/src/arm/up_copystate.c | 6 +- arch/arm/src/arm/up_dataabort.c | 9 +- arch/arm/src/arm/up_doirq.c | 8 +- arch/arm/src/arm/up_initialstate.c | 11 +- arch/arm/src/arm/up_prefetchabort.c | 8 +- arch/arm/src/arm/up_releasepending.c | 5 +- arch/arm/src/arm/up_reprioritizertr.c | 17 +- arch/arm/src/arm/up_schedulesigaction.c | 8 +- arch/arm/src/arm/up_sigdeliver.c | 6 +- arch/arm/src/arm/up_syscall.c | 8 +- arch/arm/src/arm/up_unblocktask.c | 5 +- arch/arm/src/arm/up_undefinedinsn.c | 6 +- arch/arm/src/c5471/c5471_ethernet.c | 162 +++--- arch/arm/src/c5471/c5471_irq.c | 16 +- arch/arm/src/c5471/c5471_serial.c | 106 ++-- arch/arm/src/c5471/c5471_timerisr.c | 14 +- arch/arm/src/c5471/c5471_watchdog.c | 33 +- arch/arm/src/common/up_arch.h | 28 +- arch/arm/src/common/up_createstack.c | 9 +- arch/arm/src/common/up_exit.c | 4 +- arch/arm/src/common/up_idle.c | 6 +- arch/arm/src/common/up_initialize.c | 3 +- arch/arm/src/common/up_internal.h | 58 ++- arch/arm/src/common/up_interruptcontext.c | 10 +- arch/arm/src/common/up_lowputs.c | 5 +- arch/arm/src/common/up_modifyreg16.c | 8 +- arch/arm/src/common/up_modifyreg32.c | 8 +- arch/arm/src/common/up_modifyreg8.c | 8 +- arch/arm/src/common/up_puts.c | 5 +- arch/arm/src/common/up_releasestack.c | 5 +- arch/arm/src/common/up_usestack.c | 10 +- arch/arm/src/cortexm3/nvic.h | 3 +- arch/arm/src/cortexm3/psr.h | 6 +- arch/arm/src/cortexm3/up_assert.c | 36 +- arch/arm/src/cortexm3/up_blocktask.c | 6 +- arch/arm/src/cortexm3/up_copystate.c | 6 +- arch/arm/src/cortexm3/up_doirq.c | 8 +- arch/arm/src/cortexm3/up_fullcontextrestore.S | 2 +- arch/arm/src/cortexm3/up_hardfault.c | 10 +- arch/arm/src/cortexm3/up_initialstate.c | 12 +- arch/arm/src/cortexm3/up_releasepending.c | 5 +- arch/arm/src/cortexm3/up_reprioritizertr.c | 17 +- arch/arm/src/cortexm3/up_saveusercontext.S | 4 +- arch/arm/src/cortexm3/up_schedulesigaction.c | 8 +- arch/arm/src/cortexm3/up_sigdeliver.c | 8 +- arch/arm/src/cortexm3/up_svcall.c | 18 +- arch/arm/src/cortexm3/up_switchcontext.S | 4 +- arch/arm/src/cortexm3/up_unblocktask.c | 5 +- arch/arm/src/dm320/dm320_ahb.h | 8 +- arch/arm/src/dm320/dm320_boot.c | 48 +- arch/arm/src/dm320/dm320_busc.h | 8 +- arch/arm/src/dm320/dm320_clkc.h | 8 +- arch/arm/src/dm320/dm320_decodeirq.c | 9 +- arch/arm/src/dm320/dm320_emif.h | 10 +- arch/arm/src/dm320/dm320_framebuffer.c | 60 +-- arch/arm/src/dm320/dm320_gio.h | 14 +- arch/arm/src/dm320/dm320_intc.h | 8 +- arch/arm/src/dm320/dm320_irq.c | 53 +- arch/arm/src/dm320/dm320_memorymap.h | 10 +- arch/arm/src/dm320/dm320_osd.h | 8 +- arch/arm/src/dm320/dm320_serial.c | 100 ++-- arch/arm/src/dm320/dm320_timer.h | 10 +- arch/arm/src/dm320/dm320_timerisr.c | 8 +- arch/arm/src/dm320/dm320_uart.h | 32 +- arch/arm/src/dm320/dm320_usb.h | 8 +- arch/arm/src/dm320/dm320_usbdev.c | 204 ++++---- arch/arm/src/imx/imx_allocateheap.c | 8 +- arch/arm/src/imx/imx_boot.c | 36 +- arch/arm/src/imx/imx_cspi.h | 8 +- arch/arm/src/imx/imx_decodeirq.c | 11 +- arch/arm/src/imx/imx_gpio.c | 3 +- arch/arm/src/imx/imx_gpio.h | 97 ++-- arch/arm/src/imx/imx_irq.c | 7 +- arch/arm/src/imx/imx_serial.c | 118 ++--- arch/arm/src/imx/imx_spi.c | 114 +++-- arch/arm/src/imx/imx_timerisr.c | 11 +- arch/arm/src/lm3s/chip.h | 3 +- arch/arm/src/lm3s/lm3s_dumpgpio.c | 19 +- arch/arm/src/lm3s/lm3s_ethernet.c | 154 +++--- arch/arm/src/lm3s/lm3s_ethernet.h | 3 +- arch/arm/src/lm3s/lm3s_flash.h | 3 +- arch/arm/src/lm3s/lm3s_gpio.c | 113 +++-- arch/arm/src/lm3s/lm3s_gpio.h | 3 +- arch/arm/src/lm3s/lm3s_gpioirq.c | 20 +- arch/arm/src/lm3s/lm3s_i2c.h | 3 +- arch/arm/src/lm3s/lm3s_internal.h | 19 +- arch/arm/src/lm3s/lm3s_irq.c | 24 +- arch/arm/src/lm3s/lm3s_lowputc.c | 10 +- arch/arm/src/lm3s/lm3s_memorymap.h | 3 +- arch/arm/src/lm3s/lm3s_serial.c | 108 ++-- arch/arm/src/lm3s/lm3s_ssi.c | 209 ++++---- arch/arm/src/lm3s/lm3s_start.c | 8 +- arch/arm/src/lm3s/lm3s_syscontrol.c | 22 +- arch/arm/src/lm3s/lm3s_syscontrol.h | 3 +- arch/arm/src/lm3s/lm3s_timerisr.c | 9 +- arch/arm/src/lm3s/lm3s_uart.h | 3 +- arch/arm/src/lpc214x/lpc214x_decodeirq.c | 13 +- arch/arm/src/lpc214x/lpc214x_irq.c | 11 +- arch/arm/src/lpc214x/lpc214x_serial.c | 97 ++-- arch/arm/src/lpc214x/lpc214x_timerisr.c | 11 +- arch/arm/src/lpc214x/lpc214x_usbdev.c | 342 ++++++------- arch/arm/src/lpc214x/lpc214x_usbdev.h | 3 +- arch/arm/src/stm32/chip.h | 3 +- arch/arm/src/stm32/stm32_adc.h | 4 +- arch/arm/src/stm32/stm32_bkp.h | 4 +- arch/arm/src/stm32/stm32_can.h | 4 +- arch/arm/src/stm32/stm32_dgbmcu.h | 4 +- arch/arm/src/stm32/stm32_dma.c | 31 +- arch/arm/src/stm32/stm32_exti.h | 4 +- arch/arm/src/stm32/stm32_flash.h | 4 +- arch/arm/src/stm32/stm32_fsmc.h | 4 +- arch/arm/src/stm32/stm32_gpio.c | 34 +- arch/arm/src/stm32/stm32_gpio.h | 4 +- arch/arm/src/stm32/stm32_i2c.h | 4 +- arch/arm/src/stm32/stm32_internal.h | 55 +- arch/arm/src/stm32/stm32_irq.c | 24 +- arch/arm/src/stm32/stm32_lowputc.c | 8 +- arch/arm/src/stm32/stm32_memorymap.h | 24 +- arch/arm/src/stm32/stm32_pwr.h | 4 +- arch/arm/src/stm32/stm32_rcc.c | 14 +- arch/arm/src/stm32/stm32_rcc.h | 4 +- arch/arm/src/stm32/stm32_rtc.h | 4 +- arch/arm/src/stm32/stm32_sdio.c | 335 ++++++------ arch/arm/src/stm32/stm32_serial.c | 110 ++-- arch/arm/src/stm32/stm32_spi.c | 171 ++++--- arch/arm/src/stm32/stm32_spi.h | 314 ++++++------ arch/arm/src/stm32/stm32_start.c | 6 +- arch/arm/src/stm32/stm32_tim.h | 4 +- arch/arm/src/stm32/stm32_timerisr.c | 7 +- arch/arm/src/stm32/stm32_uart.h | 418 +++++++-------- arch/arm/src/stm32/stm32_usbdev.c | 480 +++++++++--------- arch/arm/src/stm32/stm32_usbdev.h | 4 +- arch/arm/src/stm32/stm32_wdg.h | 4 +- arch/arm/src/stm32/stm32f103ze_pinmap.h | 3 +- arch/arm/src/stm32/stm32f107vc_pinmap.h | 3 +- arch/arm/src/str71x/chip.h | 3 +- arch/arm/src/str71x/str71x_adc12.h | 6 +- arch/arm/src/str71x/str71x_apb.h | 6 +- arch/arm/src/str71x/str71x_bspi.h | 6 +- arch/arm/src/str71x/str71x_can.h | 6 +- arch/arm/src/str71x/str71x_decodeirq.c | 7 +- arch/arm/src/str71x/str71x_eic.h | 6 +- arch/arm/src/str71x/str71x_emi.h | 6 +- arch/arm/src/str71x/str71x_flash.h | 6 +- arch/arm/src/str71x/str71x_gpio.h | 4 +- arch/arm/src/str71x/str71x_i2c.h | 6 +- arch/arm/src/str71x/str71x_internal.h | 6 +- arch/arm/src/str71x/str71x_irq.c | 17 +- arch/arm/src/str71x/str71x_lowputc.c | 12 +- arch/arm/src/str71x/str71x_map.h | 3 +- arch/arm/src/str71x/str71x_pcu.h | 4 +- arch/arm/src/str71x/str71x_prccu.c | 8 +- arch/arm/src/str71x/str71x_rccu.h | 4 +- arch/arm/src/str71x/str71x_rtc.h | 6 +- arch/arm/src/str71x/str71x_serial.c | 111 ++-- arch/arm/src/str71x/str71x_timer.h | 6 +- arch/arm/src/str71x/str71x_timerisr.c | 9 +- arch/arm/src/str71x/str71x_uart.h | 4 +- arch/arm/src/str71x/str71x_usb.h | 6 +- arch/arm/src/str71x/str71x_wdog.h | 6 +- arch/arm/src/str71x/str71x_xti.h | 6 +- 172 files changed, 2768 insertions(+), 2707 deletions(-) diff --git a/arch/arm/include/arch.h b/arch/arm/include/arch.h index 426f4b9599..dd750ad77a 100644 --- a/arch/arm/include/arch.h +++ b/arch/arm/include/arch.h @@ -45,6 +45,9 @@ ****************************************************************************/ #include +#ifndef __ASSEMBLY__ +# include +#endif /**************************************************************************** * Definitions @@ -60,14 +63,14 @@ #define PIC_REG_STRING "r10" /* Macros to get and set the PIC base register. picbase is assumed to be - * of type (void*) and that it will fit into a uint32. These must be + * of type (void*) and that it will fit into a uint32_t. These must be * inline so that they will be compatible with the ABIs rules for * preserving the PIC register */ #define up_getpicbase(ppicbase) \ do { \ - uint32 picbase; \ + uint32_t picbase; \ __asm__ \ ( \ "\tmov %0, " PIC_REG_STRING "\n\t" \ @@ -78,7 +81,7 @@ do { \ #define up_setpicbase(picbase) \ do { \ - uint32 _picbase = (uint32)picbase; \ + uint32_t _picbase = (uint32_t)picbase; \ __asm__ \ ( \ "\tmov " PIC_REG_STRING ", %0\n\t" \ diff --git a/arch/arm/include/arm/irq.h b/arch/arm/include/arm/irq.h index 98335c23f5..38ea205536 100644 --- a/arch/arm/include/arm/irq.h +++ b/arch/arm/include/arm/irq.h @@ -45,7 +45,9 @@ ****************************************************************************/ #include -#include +#ifndef __ASSEMBLY__ +# include +#endif /**************************************************************************** * Definitions @@ -147,13 +149,13 @@ struct xcptcontext * signal processing. */ - uint32 saved_pc; - uint32 saved_cpsr; + uint32_t saved_pc; + uint32_t saved_cpsr; #endif /* Register save area */ - uint32 regs[XCPTCONTEXT_REGS]; + uint32_t regs[XCPTCONTEXT_REGS]; }; #endif diff --git a/arch/arm/include/cortexm3/irq.h b/arch/arm/include/cortexm3/irq.h index 91be3e8b3c..de38585c39 100644 --- a/arch/arm/include/cortexm3/irq.h +++ b/arch/arm/include/cortexm3/irq.h @@ -45,7 +45,10 @@ ****************************************************************************/ #include -#include +#ifndef __ASSEMBLY__ +# include +#endif + /**************************************************************************** * Definitions @@ -137,14 +140,14 @@ struct xcptcontext * signal processing. */ - uint32 saved_pc; - uint32 saved_primask; - uint32 saved_xpsr; + uint32_t saved_pc; + uint32_t saved_primask; + uint32_t saved_xpsr; #endif /* Register save area */ - uint32 regs[XCPTCONTEXT_REGS]; + uint32_t regs[XCPTCONTEXT_REGS]; }; #endif @@ -195,19 +198,19 @@ static inline void irqrestore(irqstate_t primask) /* Get/set the primask register */ -static inline ubyte getprimask(void) +static inline uint8_t getprimask(void) { - uint32 primask; + uint32_t primask; __asm__ __volatile__ ( "\tmrs %0, primask\n" : "=r" (primask) : : "memory"); - return (ubyte)primask; + return (uint8_t)primask; } -static inline void setprimask(uint32 primask) +static inline void setprimask(uint32_t primask) { __asm__ __volatile__ ( @@ -219,19 +222,19 @@ static inline void setprimask(uint32 primask) /* Get/set the basepri register */ -static inline ubyte getbasepri(void) +static inline uint8_t getbasepri(void) { - uint32 basepri; + uint32_t basepri; __asm__ __volatile__ ( "\tmrs %0, basepri\n" : "=r" (basepri) : : "memory"); - return (ubyte)basepri; + return (uint8_t)basepri; } -static inline void setbasepri(uint32 basepri) +static inline void setbasepri(uint32_t basepri) { __asm__ __volatile__ ( @@ -243,9 +246,9 @@ static inline void setbasepri(uint32 basepri) /* Get IPSR */ -static inline uint32 getipsr(void) +static inline uint32_t getipsr(void) { - uint32 ipsr; + uint32_t ipsr; __asm__ __volatile__ ( "\tmrs %0, ipsr\n" @@ -257,7 +260,7 @@ static inline uint32 getipsr(void) /* SVC system call */ -static inline void svcall(uint32 cmd, uint32 arg) +static inline void svcall(uint32_t cmd, uint32_t arg) { __asm__ __volatile__ ( diff --git a/arch/arm/include/lm3s/irq.h b/arch/arm/include/lm3s/irq.h index 1c838790a4..e10a884d50 100644 --- a/arch/arm/include/lm3s/irq.h +++ b/arch/arm/include/lm3s/irq.h @@ -45,7 +45,6 @@ ************************************************************************************/ #include -#include #include /************************************************************************************ diff --git a/arch/arm/include/lpc214x/irq.h b/arch/arm/include/lpc214x/irq.h index 911f51df90..221644a076 100644 --- a/arch/arm/include/lpc214x/irq.h +++ b/arch/arm/include/lpc214x/irq.h @@ -44,6 +44,10 @@ * Included Files ****************************************************************************/ +#ifndef __ASSEMBLY__ +# include +#endif + /**************************************************************************** * Definitions ****************************************************************************/ @@ -88,7 +92,7 @@ ****************************************************************************/ #ifndef __ASSEMBLY__ -typedef void (*vic_vector_t)(uint32 *regs); +typedef void (*vic_vector_t)(uint32_t *regs); #endif /**************************************************************************** diff --git a/arch/arm/include/serial.h b/arch/arm/include/serial.h index f361ed99b4..636e90947e 100644 --- a/arch/arm/include/serial.h +++ b/arch/arm/include/serial.h @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/include/serial.h * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,6 +40,8 @@ * Included Files ****************************************************************************/ +#include + /**************************************************************************** * Definitions ****************************************************************************/ diff --git a/arch/arm/include/stm32/irq.h b/arch/arm/include/stm32/irq.h index 19815c5524..108dfd10b9 100644 --- a/arch/arm/include/stm32/irq.h +++ b/arch/arm/include/stm32/irq.h @@ -45,7 +45,6 @@ ************************************************************************************/ #include -#include #include /************************************************************************************ diff --git a/arch/arm/include/str71x/irq.h b/arch/arm/include/str71x/irq.h index 26a9d1eb6e..137dab715d 100644 --- a/arch/arm/include/str71x/irq.h +++ b/arch/arm/include/str71x/irq.h @@ -45,7 +45,6 @@ ************************************************************************************/ #include -#include /************************************************************************************ * Definitions diff --git a/arch/arm/src/arm/arm.h b/arch/arm/src/arm/arm.h index aa737ff965..f398b74c12 100644 --- a/arch/arm/src/arm/arm.h +++ b/arch/arm/src/arm/arm.h @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ #undef CONFIG_ALIGNMENT_TRAP diff --git a/arch/arm/src/arm/up_assert.c b/arch/arm/src/arm/up_assert.c index 0c38781d46..657152b980 100644 --- a/arch/arm/src/arm/up_assert.c +++ b/arch/arm/src/arm/up_assert.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include #include @@ -52,7 +52,7 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Output debug info if stack dump is selected -- even if @@ -78,9 +78,9 @@ /* I don't know if the builtin to get SP is enabled */ -static inline uint32 up_getsp(void) +static inline uint32_t up_getsp(void) { - uint32 sp; + uint32_t sp; __asm__ ( "\tmov %0, sp\n\t" @@ -94,13 +94,13 @@ static inline uint32 up_getsp(void) ****************************************************************************/ #ifdef CONFIG_ARCH_STACKDUMP -static void up_stackdump(uint32 sp, uint32 stack_base) +static void up_stackdump(uint32_t sp, uint32_t stack_base) { - uint32 stack ; + uint32_t stack ; for (stack = sp & ~0x1f; stack < stack_base; stack += 32) { - uint32 *ptr = (uint32*)stack; + uint32_t *ptr = (uint32_t*)stack; lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n", stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); @@ -127,7 +127,7 @@ static inline void up_registerdump(void) for (regs = REG_R0; regs <= REG_R15; regs += 8) { - uint32 *ptr = (uint32*)¤t_regs[regs]; + uint32_t *ptr = (uint32_t*)¤t_regs[regs]; lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", regs, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); @@ -147,13 +147,13 @@ static inline void up_registerdump(void) #ifdef CONFIG_ARCH_STACKDUMP static void up_dumpstate(void) { - _TCB *rtcb = (_TCB*)g_readytorun.head; - uint32 sp = up_getsp(); - uint32 ustackbase; - uint32 ustacksize; + _TCB *rtcb = (_TCB*)g_readytorun.head; + uint32_t sp = up_getsp(); + uint32_t ustackbase; + uint32_t ustacksize; #if CONFIG_ARCH_INTERRUPTSTACK > 3 - uint32 istackbase; - uint32 istacksize; + uint32_t istackbase; + uint32_t istacksize; #endif /* Get the limits on the user stack memory */ @@ -165,14 +165,14 @@ static void up_dumpstate(void) } else { - ustackbase = (uint32)rtcb->adj_stack_ptr; - ustacksize = (uint32)rtcb->adj_stack_size; + ustackbase = (uint32_t)rtcb->adj_stack_ptr; + ustacksize = (uint32_t)rtcb->adj_stack_size; } /* Get the limits on the interrupt stack memory */ #if CONFIG_ARCH_INTERRUPTSTACK > 3 - istackbase = (uint32)&g_userstack; + istackbase = (uint32_t)&g_userstack; istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4; /* Show interrupt stack info */ @@ -269,7 +269,7 @@ static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */ * Name: up_assert ****************************************************************************/ -void up_assert(const ubyte *filename, int lineno) +void up_assert(const uint8_t *filename, int lineno) { #if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG) _TCB *rtcb = (_TCB*)g_readytorun.head; @@ -291,7 +291,7 @@ void up_assert(const ubyte *filename, int lineno) * Name: up_assert_code ****************************************************************************/ -void up_assert_code(const ubyte *filename, int lineno, int errorcode) +void up_assert_code(const uint8_t *filename, int lineno, int errorcode) { #if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG) _TCB *rtcb = (_TCB*)g_readytorun.head; diff --git a/arch/arm/src/arm/up_blocktask.c b/arch/arm/src/arm/up_blocktask.c index 8397209e17..36c8740d66 100755 --- a/arch/arm/src/arm/up_blocktask.c +++ b/arch/arm/src/arm/up_blocktask.c @@ -38,8 +38,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -49,7 +49,7 @@ #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -96,7 +96,7 @@ void up_block_task(_TCB *tcb, tstate_t task_state) else { _TCB *rtcb = (_TCB*)g_readytorun.head; - boolean switch_needed; + bool switch_needed; /* Remove the tcb task from the ready-to-run list. If we * are blocking the task at the head of the task list (the diff --git a/arch/arm/src/arm/up_copystate.c b/arch/arm/src/arm/up_copystate.c index 80b34aed7b..44f027b328 100644 --- a/arch/arm/src/arm/up_copystate.c +++ b/arch/arm/src/arm/up_copystate.c @@ -39,13 +39,13 @@ #include -#include +#include #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -66,7 +66,7 @@ /* A little faster than most memcpy's */ -void up_copystate(uint32 *dest, uint32 *src) +void up_copystate(uint32_t *dest, uint32_t *src) { int i; diff --git a/arch/arm/src/arm/up_dataabort.c b/arch/arm/src/arm/up_dataabort.c index df51f23439..0344f9bcc0 100644 --- a/arch/arm/src/arm/up_dataabort.c +++ b/arch/arm/src/arm/up_dataabort.c @@ -38,14 +38,17 @@ ****************************************************************************/ #include -#include + +#include #include + #include + #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Output debug info if stack dump is selected -- even if @@ -73,7 +76,7 @@ * Name: up_dataabort ****************************************************************************/ -void up_dataabort(uint32 *regs) +void up_dataabort(uint32_t *regs) { lldbg("Data abort at 0x%x\n", regs[REG_PC]); current_regs = regs; diff --git a/arch/arm/src/arm/up_doirq.c b/arch/arm/src/arm/up_doirq.c index ef5e7e1ee4..bc3fa2d675 100644 --- a/arch/arm/src/arm/up_doirq.c +++ b/arch/arm/src/arm/up_doirq.c @@ -38,16 +38,18 @@ ****************************************************************************/ #include -#include + +#include #include #include #include + #include "up_arch.h" #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -66,7 +68,7 @@ * Public Functions ****************************************************************************/ -void up_doirq(int irq, uint32 *regs) +void up_doirq(int irq, uint32_t *regs) { up_ledon(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/arm/src/arm/up_initialstate.c b/arch/arm/src/arm/up_initialstate.c index c3a5f8a83f..180385d6af 100644 --- a/arch/arm/src/arm/up_initialstate.c +++ b/arch/arm/src/arm/up_initialstate.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include @@ -48,7 +49,7 @@ #include "up_arch.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -87,11 +88,11 @@ void up_initial_state(_TCB *tcb) /* Save the initial stack pointer */ - xcp->regs[REG_SP] = (uint32)tcb->adj_stack_ptr; + xcp->regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr; /* Save the task entry point */ - xcp->regs[REG_PC] = (uint32)tcb->start; + xcp->regs[REG_PC] = (uint32_t)tcb->start; /* If this task is running PIC, then set the PIC base register to the * address of the allocated D-Space region. @@ -104,7 +105,7 @@ void up_initial_state(_TCB *tcb) * alloacated D-Space region. */ - xcp->regs[REG_PIC] = (uint32)tcb->dspace->region; + xcp->regs[REG_PIC] = (uint32_t)tcb->dspace->region; } #endif diff --git a/arch/arm/src/arm/up_prefetchabort.c b/arch/arm/src/arm/up_prefetchabort.c index 3f6a1c9143..3d6f5b8d82 100644 --- a/arch/arm/src/arm/up_prefetchabort.c +++ b/arch/arm/src/arm/up_prefetchabort.c @@ -38,14 +38,16 @@ ****************************************************************************/ #include -#include + +#include #include #include + #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Output debug info if stack dump is selected -- even if @@ -73,7 +75,7 @@ * Name: up_prefetchabort ****************************************************************************/ -void up_prefetchabort(uint32 *regs) +void up_prefetchabort(uint32_t *regs) { lldbg("Prefetch abort at 0x%x\n", regs[REG_PC]); current_regs = regs; diff --git a/arch/arm/src/arm/up_releasepending.c b/arch/arm/src/arm/up_releasepending.c index d7000ee9f6..dcad401593 100755 --- a/arch/arm/src/arm/up_releasepending.c +++ b/arch/arm/src/arm/up_releasepending.c @@ -38,15 +38,16 @@ ****************************************************************************/ #include -#include + #include #include #include + #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/arm/up_reprioritizertr.c b/arch/arm/src/arm/up_reprioritizertr.c index 1192a37bbf..c3a0da185c 100755 --- a/arch/arm/src/arm/up_reprioritizertr.c +++ b/arch/arm/src/arm/up_reprioritizertr.c @@ -38,15 +38,18 @@ ****************************************************************************/ #include -#include + +#include +#include #include #include #include + #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -81,7 +84,7 @@ * ****************************************************************************/ -void up_reprioritize_rtr(_TCB *tcb, ubyte priority) +void up_reprioritize_rtr(_TCB *tcb, uint8_t priority) { /* Verify that the caller is sane */ @@ -95,12 +98,12 @@ void up_reprioritize_rtr(_TCB *tcb, ubyte priority) else { _TCB *rtcb = (_TCB*)g_readytorun.head; - boolean switch_needed; + bool switch_needed; slldbg("TCB=%p PRI=%d\n", tcb, priority); /* Remove the tcb task from the ready-to-run list. - * sched_removereadytorun will return TRUE if we just + * sched_removereadytorun will return true if we just * remove the head of the ready to run list. */ @@ -108,10 +111,10 @@ void up_reprioritize_rtr(_TCB *tcb, ubyte priority) /* Setup up the new task priority */ - tcb->sched_priority = (ubyte)priority; + tcb->sched_priority = (uint8_t)priority; /* Return the task to the specified blocked task list. - * sched_addreadytorun will return TRUE if the task was + * sched_addreadytorun will return true if the task was * added to the new list. We will need to perform a context * switch only if the EXCLUSIVE or of the two calls is non-zero * (i.e., one and only one the calls changes the head of the diff --git a/arch/arm/src/arm/up_schedulesigaction.c b/arch/arm/src/arm/up_schedulesigaction.c index 091c5a400a..6312968005 100644 --- a/arch/arm/src/arm/up_schedulesigaction.c +++ b/arch/arm/src/arm/up_schedulesigaction.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -53,7 +53,7 @@ #ifndef CONFIG_DISABLE_SIGNALS /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -161,7 +161,7 @@ void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver) * disabled */ - current_regs[REG_PC] = (uint32)up_sigdeliver; + current_regs[REG_PC] = (uint32_t)up_sigdeliver; current_regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT; /* And make sure that the saved context in the TCB @@ -193,7 +193,7 @@ void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver) * disabled */ - tcb->xcp.regs[REG_PC] = (uint32)up_sigdeliver; + tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver; tcb->xcp.regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT; } diff --git a/arch/arm/src/arm/up_sigdeliver.c b/arch/arm/src/arm/up_sigdeliver.c index 277a3ba74a..60cc0caf8d 100644 --- a/arch/arm/src/arm/up_sigdeliver.c +++ b/arch/arm/src/arm/up_sigdeliver.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -53,7 +53,7 @@ #ifndef CONFIG_DISABLE_SIGNALS /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -82,7 +82,7 @@ void up_sigdeliver(void) { _TCB *rtcb = (_TCB*)g_readytorun.head; - uint32 regs[XCPTCONTEXT_REGS]; + uint32_t regs[XCPTCONTEXT_REGS]; sig_deliver_t sigdeliver; /* Save the errno. This must be preserved throughout the diff --git a/arch/arm/src/arm/up_syscall.c b/arch/arm/src/arm/up_syscall.c index ec38b35009..f331a13146 100644 --- a/arch/arm/src/arm/up_syscall.c +++ b/arch/arm/src/arm/up_syscall.c @@ -38,14 +38,16 @@ ****************************************************************************/ #include -#include + +#include #include + #include "up_arch.h" #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Output debug info if stack dump is selected -- even if @@ -86,7 +88,7 @@ * ****************************************************************************/ -void up_syscall(uint32 *regs) +void up_syscall(uint32_t *regs) { lldbg("Syscall from 0x%x\n", regs[REG_PC]); current_regs = regs; diff --git a/arch/arm/src/arm/up_unblocktask.c b/arch/arm/src/arm/up_unblocktask.c index 0563f54a73..73e292561f 100755 --- a/arch/arm/src/arm/up_unblocktask.c +++ b/arch/arm/src/arm/up_unblocktask.c @@ -38,16 +38,17 @@ ****************************************************************************/ #include -#include + #include #include #include + #include "os_internal.h" #include "clock_internal.h" #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/arm/up_undefinedinsn.c b/arch/arm/src/arm/up_undefinedinsn.c index e15457960e..4c50991b0f 100644 --- a/arch/arm/src/arm/up_undefinedinsn.c +++ b/arch/arm/src/arm/up_undefinedinsn.c @@ -38,14 +38,14 @@ ****************************************************************************/ #include -#include +#include #include #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Output debug info if stack dump is selected -- even if @@ -73,7 +73,7 @@ * Name: up_undefinedinsn ****************************************************************************/ -void up_undefinedinsn(uint32 *regs) +void up_undefinedinsn(uint32_t *regs) { lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]); current_regs = regs; diff --git a/arch/arm/src/c5471/c5471_ethernet.c b/arch/arm/src/c5471/c5471_ethernet.c index 322882fd40..3395fd3b36 100644 --- a/arch/arm/src/c5471/c5471_ethernet.c +++ b/arch/arm/src/c5471/c5471_ethernet.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/c5471/c5471_ethernet.c * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Based one a C5471 Linux driver and released under this BSD license with @@ -45,8 +45,8 @@ #include #if defined(CONFIG_NET) -#include - +#include +#include #include #include #include @@ -67,7 +67,7 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Configuration ************************************************************/ @@ -293,9 +293,9 @@ struct c5471_driver_s { - boolean c_bifup; /* TRUE:ifup FALSE:ifdown */ - WDOG_ID c_txpoll; /* TX poll timer */ - WDOG_ID c_txtimeout; /* TX timeout timer */ + bool c_bifup; /* true:ifup false:ifdown */ + WDOG_ID c_txpoll; /* TX poll timer */ + WDOG_ID c_txtimeout; /* TX timeout timer */ /* Note: According to the C547x documentation: "The software has to maintain * two pointers to the current RX-CPU and TX-CPU descriptors. At init time, @@ -303,40 +303,40 @@ struct c5471_driver_s * to be incremented each time a descriptor ownership is give to the SWITCH". */ - volatile uint32 c_txcpudesc; - volatile uint32 c_rxcpudesc; + volatile uint32_t c_txcpudesc; + volatile uint32_t c_rxcpudesc; /* Last TX descriptor saved for error handling */ - uint32 c_lastdescstart; - uint32 c_lastdescend; + uint32_t c_lastdescstart; + uint32_t c_lastdescend; /* Shadowed registers */ - uint32 c_eimstatus; + uint32_t c_eimstatus; #ifdef CONFIG_C5471_NET_STATS /* TX statistics */ - uint32 c_txpackets; /* Number of packets sent */ - uint32 c_txmiss; /* Miss */ - uint32 c_txvlan; /* VLAN */ - uint32 c_txlframe; /* Long frame errors */ - uint32 c_txsframe; /* Short frame errors */ - uint32 c_txcrc; /* CRC errors */ - uint32 c_txoverrun; /* Overrun errors */ - uint32 c_txalign; /* Non-octect align errors */ - uint32 c_txtimeouts; /* TX timeouts */ + uint32_t c_txpackets; /* Number of packets sent */ + uint32_t c_txmiss; /* Miss */ + uint32_t c_txvlan; /* VLAN */ + uint32_t c_txlframe; /* Long frame errors */ + uint32_t c_txsframe; /* Short frame errors */ + uint32_t c_txcrc; /* CRC errors */ + uint32_t c_txoverrun; /* Overrun errors */ + uint32_t c_txalign; /* Non-octect align errors */ + uint32_t c_txtimeouts; /* TX timeouts */ - uint32 c_rxpackets; /* Number of packets received */ - uint32 c_rxretries; /* Exceed retry errors */ - uint32 c_rxheartbeat; /* Heartbeat (SQE) */ - uint32 c_rxlcollision; /* Late collision errors */ - uint32 c_rxcollision; /* Collision */ - uint32 c_rxcrc; /* CRC errors */ - uint32 c_rxunderrun; /* Underrun errors */ - uint32 c_rxloc; /* Loss of carrier */ - uint32 c_rxdropped; /* Packets dropped because of size */ + uint32_t c_rxpackets; /* Number of packets received */ + uint32_t c_rxretries; /* Exceed retry errors */ + uint32_t c_rxheartbeat; /* Heartbeat (SQE) */ + uint32_t c_rxlcollision; /* Late collision errors */ + uint32_t c_rxcollision; /* Collision */ + uint32_t c_rxcrc; /* CRC errors */ + uint32_t c_rxunderrun; /* Underrun errors */ + uint32_t c_rxloc; /* Loss of carrier */ + uint32_t c_rxdropped; /* Packets dropped because of size */ #endif /* This holds the information visible to uIP/NuttX */ @@ -386,8 +386,8 @@ static int c5471_interrupt(int irq, FAR void *context); /* Watchdog timer expirations */ -static void c5471_polltimer(int argc, uint32 arg, ...); -static void c5471_txtimeout(int argc, uint32 arg, ...); +static void c5471_polltimer(int argc, uint32_t arg, ...); +static void c5471_txtimeout(int argc, uint32_t arg, ...); /* NuttX callback functions */ @@ -415,7 +415,7 @@ static void c5471_macassign(struct c5471_driver_s *c5471); ****************************************************************************/ #ifdef CONFIG_C5471_NET_DUMPBUFFER -static inline void c5471_dumpbuffer(const char *msg, const ubyte *buffer, unsigned int nbytes) +static inline void c5471_dumpbuffer(const char *msg, const uint8_t *buffer, unsigned int nbytes) { /* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_NET have to be * defined or the following does nothing. @@ -516,7 +516,7 @@ static void c5471_mdtxbit (int bit_state) static int c5471_mdrxbit (void) { - register volatile uint32 bit_state; + register volatile uint32_t bit_state; /* config MDIO as input pin. */ @@ -807,7 +807,7 @@ static inline void c5471_inctxcpu(struct c5471_driver_s *c5471) } else { - c5471->c_txcpudesc += 2*sizeof(uint32); + c5471->c_txcpudesc += 2*sizeof(uint32_t); } nvdbg("TX CPU desc: %08x\n", c5471->c_txcpudesc); @@ -830,7 +830,7 @@ static inline void c5471_incrxcpu(struct c5471_driver_s *c5471) } else { - c5471->c_rxcpudesc += 2*sizeof(uint32); + c5471->c_rxcpudesc += 2*sizeof(uint32_t); } nvdbg("RX CPU desc: %08x\n", c5471->c_rxcpudesc); @@ -856,9 +856,9 @@ static inline void c5471_incrxcpu(struct c5471_driver_s *c5471) static int c5471_transmit(struct c5471_driver_s *c5471) { struct uip_driver_s *dev = &c5471->c_dev; - volatile uint16 *packetmem; - uint16 framelen; - boolean bfirstframe; + volatile uint16_t *packetmem; + uint16_t framelen; + bool bfirstframe; int nbytes; int nshorts; unsigned int i; @@ -866,7 +866,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471) nbytes = (dev->d_len + 1) & ~1; j = 0; - bfirstframe = TRUE; + bfirstframe = true; c5471->c_lastdescstart = c5471->c_rxcpudesc; nvdbg("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc); @@ -916,12 +916,12 @@ static int c5471_transmit(struct c5471_driver_s *c5471) /* Words #2 and #3 of descriptor */ - packetmem = (uint16*)getreg32(c5471->c_rxcpudesc + sizeof(uint32)); + packetmem = (uint16_t*)getreg32(c5471->c_rxcpudesc + sizeof(uint32_t)); for (i = 0; i < nshorts; i++, j++) { /* 16-bits at a time. */ - packetmem[i] = htons(((uint16*)dev->d_buf)[j]); + packetmem[i] = htons(((uint16_t*)dev->d_buf)[j]); } putreg32(((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_BYTEMASK) | framelen), c5471->c_rxcpudesc); @@ -949,7 +949,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471) /* Advance to the next free descriptor */ c5471_incrxcpu(c5471); - bfirstframe = FALSE; + bfirstframe = false; } /* Packet transferred .. Update statistics */ @@ -960,7 +960,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471) /* Setup the TX timeout watchdog (perhaps restarting the timer) */ - (void)wd_start(c5471->c_txtimeout, C5471_TXTIMEOUT, c5471_txtimeout, 1, (uint32)c5471); + (void)wd_start(c5471->c_txtimeout, C5471_TXTIMEOUT, c5471_txtimeout, 1, (uint32_t)c5471); return OK; } @@ -1036,8 +1036,8 @@ static int c5471_uiptxpoll(struct uip_driver_s *dev) #ifdef CONFIG_C5471_NET_STATS static void c5471_rxstatus(struct c5471_driver_s *c5471) { - uint32 desc = c5471->c_txcpudesc; - uint32 rxstatus; + uint32_t desc = c5471->c_txcpudesc; + uint32_t rxstatus; /* Walk that last packet we just received to collect xmit status bits. */ @@ -1068,7 +1068,7 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471) } else { - desc += 2 * sizeof(uint32); + desc += 2 * sizeof(uint32_t); } } @@ -1138,8 +1138,8 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471) static void c5471_receive(struct c5471_driver_s *c5471) { struct uip_driver_s *dev = &c5471->c_dev; - uint16 *packetmem; - boolean bmore = TRUE; + uint16_t *packetmem; + bool bmore = true; int packetlen = 0; int framelen; int nshorts; @@ -1176,7 +1176,7 @@ static void c5471_receive(struct c5471_driver_s *c5471) { /* Get the packet memory from words #2 and #3 of descriptor */ - packetmem = (uint16*)getreg32(c5471->c_txcpudesc + sizeof(uint32)); + packetmem = (uint16_t*)getreg32(c5471->c_txcpudesc + sizeof(uint32_t)); /* Divide by 2 with round up to get the number of 16-bit words. */ @@ -1190,7 +1190,7 @@ static void c5471_receive(struct c5471_driver_s *c5471) * a time. */ - ((uint16*)dev->d_buf)[j] = htons(packetmem[i]); + ((uint16_t*)dev->d_buf)[j] = htons(packetmem[i]); } } else @@ -1200,7 +1200,7 @@ static void c5471_receive(struct c5471_driver_s *c5471) if (getreg32(c5471->c_txcpudesc) & EIM_TXDESC_LIF) { - bmore = FALSE; + bmore = false; } /* Next, Clear all bits of words0/1 of the emptied descriptor except preserve @@ -1312,8 +1312,8 @@ static void c5471_receive(struct c5471_driver_s *c5471) #ifdef CONFIG_C5471_NET_STATS static void c5471_txstatus(struct c5471_driver_s *c5471) { - uint32 desc = c5471->c_lastdescstart; - uint32 txstatus; + uint32_t desc = c5471->c_lastdescstart; + uint32_t txstatus; /* Walk that last packet we just sent to collect xmit status bits. */ @@ -1338,7 +1338,7 @@ static void c5471_txstatus(struct c5471_driver_s *c5471) } else { - desc += 2 * sizeof(uint32); + desc += 2 * sizeof(uint32_t); } } } @@ -1515,7 +1515,7 @@ static int c5471_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static void c5471_txtimeout(int argc, uint32 arg, ...) +static void c5471_txtimeout(int argc, uint32_t arg, ...) { struct c5471_driver_s *c5471 = (struct c5471_driver_s *)arg; @@ -1553,7 +1553,7 @@ static void c5471_txtimeout(int argc, uint32 arg, ...) * ****************************************************************************/ -static void c5471_polltimer(int argc, uint32 arg, ...) +static void c5471_polltimer(int argc, uint32_t arg, ...) { struct c5471_driver_s *c5471 = (struct c5471_driver_s *)arg; @@ -1594,7 +1594,7 @@ static void c5471_polltimer(int argc, uint32 arg, ...) static int c5471_ifup(struct uip_driver_s *dev) { struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private; - volatile uint32 clearbits; + volatile uint32_t clearbits; ndbg("Bringing up: %d.%d.%d.%d\n", dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, @@ -1626,11 +1626,11 @@ static int c5471_ifup(struct uip_driver_s *dev) /* Set and activate a timer process */ - (void)wd_start(c5471->c_txpoll, C5471_WDDELAY, c5471_polltimer, 1, (uint32)c5471); + (void)wd_start(c5471->c_txpoll, C5471_WDDELAY, c5471_polltimer, 1, (uint32_t)c5471); /* Enable the Ethernet interrupt */ - c5471->c_bifup = TRUE; + c5471->c_bifup = true; up_enable_irq(C5471_IRQ_ETHER); return OK; } @@ -1682,7 +1682,7 @@ static int c5471_ifdown(struct uip_driver_s *dev) /* Reset the device */ - c5471->c_bifup = FALSE; + c5471->c_bifup = false; irqrestore(flags); return OK; } @@ -1793,9 +1793,9 @@ static void c5471_eimreset (struct c5471_driver_s *c5471) static void c5471_eimconfig(struct c5471_driver_s *c5471) { - volatile uint32 pbuf; - volatile uint32 desc; - volatile uint32 val; + volatile uint32_t pbuf; + volatile uint32_t desc; + volatile uint32_t val; int i; desc = EIM_RAM_START; @@ -1815,16 +1815,16 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471) val |= EIM_TXDESC_OWN_HOST|EIM_TXDESC_INTRE|EIM_TXDESC_PADCRC|EIM_PACKET_BYTES; putreg32(val, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(pbuf, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(0, pbuf); pbuf += EIM_PACKET_BYTES; putreg32(0, pbuf); - pbuf += sizeof(uint32); /* Ether Module's "Buffer Usage Word" */ + pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */ } /* RX ENET 0 */ @@ -1841,16 +1841,16 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471) val |= EIM_RXDESC_OWN_ENET|EIM_RXDESC_INTRE|EIM_RXDESC_PADCRC|EIM_PACKET_BYTES; putreg32(val, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(pbuf, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(0, pbuf); pbuf += EIM_PACKET_BYTES; putreg32(0, pbuf); - pbuf += sizeof(uint32); /* Ether Module's "Buffer Usage Word" */ + pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */ } /* TX CPU */ @@ -1870,16 +1870,16 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471) val |= EIM_TXDESC_OWN_HOST|EIM_TXDESC_INTRE|EIM_TXDESC_PADCRC|EIM_PACKET_BYTES; putreg32(val, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(pbuf, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg(0, pbuf); pbuf += EIM_PACKET_BYTES; putreg(0, pbuf); - pbuf += sizeof(uint32); /* Ether Module's "Buffer Usage Word" */ + pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */ } /* RX CPU */ @@ -1899,16 +1899,16 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471) val |= EIM_RXDESC_OWN_ENET|EIM_RXDESC_INTRE|EIM_RXDESC_PADCRC|EIM_PACKET_BYTES; putreg32(val, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(pbuf, desc); - desc += sizeof(uint32); + desc += sizeof(uint32_t); putreg32(0, pbuf); pbuf += EIM_PACKET_BYTES; putreg32(0, pbuf); - pbuf += sizeof(uint32); /* Ether Module's "Buffer Usage Word" */ + pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */ } ndbg("END desc: %08x pbuf: %08x\n", desc, pbuf); @@ -2018,8 +2018,8 @@ static void c5471_reset(struct c5471_driver_s *c5471) static void c5471_macassign(struct c5471_driver_s *c5471) { struct uip_driver_s *dev = &c5471->c_dev; - uint8 *mptr = dev->d_mac.ether_addr_octet; - register uint32 tmp; + uint8_t *mptr = dev->d_mac.ether_addr_octet; + register uint32_t tmp; ndbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n", mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]); @@ -2028,11 +2028,11 @@ static void c5471_macassign(struct c5471_driver_s *c5471) * this destination address. */ - tmp = (((uint32)mptr[0]) << 8) | ((uint32)mptr[1]); + tmp = (((uint32_t)mptr[0]) << 8) | ((uint32_t)mptr[1]); putreg32(tmp, EIM_CPU_DAHI); - tmp = (((uint32)mptr[2]) << 24) | (((uint32)mptr[3]) << 16) | - (((uint32)mptr[4]) << 8) | ((uint32)mptr[5]); + tmp = (((uint32_t)mptr[2]) << 24) | (((uint32_t)mptr[3]) << 16) | + (((uint32_t)mptr[4]) << 8) | ((uint32_t)mptr[5]); putreg32(tmp, EIM_CPU_DALO); #if 0 diff --git a/arch/arm/src/c5471/c5471_irq.c b/arch/arm/src/c5471/c5471_irq.c index 08b76d3e71..27e1784692 100644 --- a/arch/arm/src/c5471/c5471_irq.c +++ b/arch/arm/src/c5471/c5471_irq.c @@ -38,8 +38,8 @@ ****************************************************************************/ #include -#include +#include #include #include "arm.h" @@ -48,7 +48,7 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ #define ILR_EDGESENSITIVE 0x00000020 @@ -58,7 +58,7 @@ * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data @@ -107,7 +107,7 @@ static up_vector_t g_vectorinittab[] = static inline void up_ackirq(unsigned int irq) { - uint32 reg; + uint32_t reg; reg = getreg32(SRC_IRQ_REG); /* Insure appropriate IT_REG bit clears */ putreg32(reg | 0x00000001, INT_CTRL_REG); /* write the NEW_IRQ_AGR bit. */ } @@ -125,7 +125,7 @@ static inline void up_ackirq(unsigned int irq) static inline void up_ackfiq(unsigned int irq) { - uint32 reg; + uint32_t reg; reg = getreg32(SRC_FIQ_REG); /* Insure appropriate IT_REG bit clears */ putreg32(reg | 0x00000002, INT_CTRL_REG); /* write the NEW_FIQ_AGR bit. */ } @@ -197,7 +197,7 @@ void up_disable_irq(int irq) { if ((unsigned)irq < NR_IRQS) { - uint32 reg = getreg32(MASK_IT_REG); + uint32_t reg = getreg32(MASK_IT_REG); putreg32(reg | (1 << irq), MASK_IT_REG); } } @@ -214,7 +214,7 @@ void up_enable_irq(int irq) { if ((unsigned)irq < NR_IRQS) { - uint32 reg = getreg32(MASK_IT_REG); + uint32_t reg = getreg32(MASK_IT_REG); putreg32(reg & ~(1 << irq), MASK_IT_REG); } } @@ -229,7 +229,7 @@ void up_enable_irq(int irq) void up_maskack_irq(int irq) { - uint32 reg = getreg32(INT_CTRL_REG); + uint32_t reg = getreg32(INT_CTRL_REG); /* Mask the interrupt */ diff --git a/arch/arm/src/c5471/c5471_serial.c b/arch/arm/src/c5471/c5471_serial.c index 375bacd814..6e3d52c672 100644 --- a/arch/arm/src/c5471/c5471_serial.c +++ b/arch/arm/src/c5471/c5471_serial.c @@ -1,7 +1,7 @@ /**************************************************************************** * c5471/c5471_serial.c * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,6 +40,8 @@ #include #include +#include +#include #include #include #include @@ -56,7 +58,7 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ #define BASE_BAUD 115200 @@ -71,12 +73,12 @@ struct uart_regs_s { - uint32 ier; - uint32 lcr; - uint32 fcr; + uint32_t ier; + uint32_t lcr; + uint32_t fcr; #ifdef CONFIG_UART_HWFLOWCONTROL - uint32 efr; - uint32 tcr; + uint32_t efr; + uint32_t tcr; #endif }; @@ -85,16 +87,16 @@ struct up_dev_s unsigned int uartbase; /* Base address of UART registers */ unsigned int baud_base; /* Base baud for conversions */ unsigned int baud; /* Configured baud */ - ubyte xmit_fifo_size; /* Size of transmit FIFO */ - ubyte irq; /* IRQ associated with this UART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ + uint8_t xmit_fifo_size; /* Size of transmit FIFO */ + uint8_t irq; /* IRQ associated with this UART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ #ifdef CONFIG_UART_HWFLOWCONTROL - boolean flowcontrol; /* TRUE: Hardware flow control - * is enabled. */ + bool flowcontrol; /* true: Hardware flow control + * is enabled. */ #endif - boolean stopbits2; /* TRUE: Configure with 2 - * stop bits instead of 1 */ + bool stopbits2; /* true: Configure with 2 + * stop bits instead of 1 */ struct uart_regs_s regs; /* Shadow copy of readonly regs */ }; @@ -102,19 +104,19 @@ struct up_dev_s * Private Function Prototypes ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, unsigned int *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, unsigned int *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -155,7 +157,7 @@ static struct up_dev_s g_irdapriv = .parity = CONFIG_UART_IRDA_PARITY, .bits = CONFIG_UART_IRDA_BITS, #ifdef CONFIG_UART_IRDA_HWFLOWCONTROL - .flowcontrol = TRUE, + .flowcontrol = true, #endif .stopbits2 = CONFIG_UART_IRDA_2STOP, }; @@ -188,7 +190,7 @@ static struct up_dev_s g_modempriv = .parity = CONFIG_UART_MODEM_PARITY, .bits = CONFIG_UART_MODEM_BITS, #ifdef CONFIG_UART_MODEM_HWFLOWCONTROL - .flowcontrol = TRUE, + .flowcontrol = true, #endif .stopbits2 = CONFIG_UART_MODEM_2STOP, }; @@ -229,7 +231,7 @@ static uart_dev_t g_modemport = * Name: up_inserial ****************************************************************************/ -static inline uint32 up_inserial(struct up_dev_s *priv, uint32 offset) +static inline uint32_t up_inserial(struct up_dev_s *priv, uint32_t offset) { return getreg32(priv->uartbase + offset); } @@ -238,7 +240,7 @@ static inline uint32 up_inserial(struct up_dev_s *priv, uint32 offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint32 value) +static inline void up_serialout(struct up_dev_s *priv, uint32_t offset, uint32_t value) { putreg32(value, priv->uartbase + offset); } @@ -247,7 +249,7 @@ static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint32 val * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, uint16 *ier) +static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier) { if (ier) { @@ -261,7 +263,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint16 *ier) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, uint16 ier) +static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier) { priv->regs.ier |= ier & (UART_IER_RECVINT|UART_IER_XMITINT); up_serialout(priv, UART_IER_OFFS, priv->regs.ier); @@ -309,7 +311,7 @@ static inline void up_enablebreaks(struct up_dev_s *priv) static inline void up_setrate(struct up_dev_s *priv, unsigned int rate) { - uint32 div_bit_rate; + uint32_t div_bit_rate; switch (rate) { @@ -420,7 +422,7 @@ static int up_setup(struct uart_dev_s *dev) up_setrate(priv, priv->baud); priv->regs.lcr &= 0xffffffe0; /* clear original field, and... */ - priv->regs.lcr |= (uint32)cval; /* Set new bits in that field. */ + priv->regs.lcr |= (uint32_t)cval; /* Set new bits in that field. */ up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr); #ifdef CONFIG_UART_HWFLOWCONTROL @@ -532,7 +534,7 @@ static int up_interrupt(int irq, void *context) { struct uart_dev_s *dev = NULL; struct up_dev_s *priv; - volatile uint32 cause; + volatile uint32_t cause; if (g_irdapriv.irq == irq) { @@ -552,7 +554,7 @@ static int up_interrupt(int irq, void *context) if ((cause & 0x0000000c) == 0x0000000c) { - uint32 ier_val = 0; + uint32_t ier_val = 0; /* Is this an interrupt from the IrDA UART? */ @@ -671,8 +673,8 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) static int up_receive(struct uart_dev_s *dev, unsigned int *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 rhr; - uint32 lsr; + uint32_t rhr; + uint32_t lsr; /* Construct a 16bit status word that uses the high byte to * hold the status bits associated with framing,parity,break @@ -696,7 +698,7 @@ static int up_receive(struct uart_dev_s *dev, unsigned int *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -717,11 +719,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return up_inserial(priv, UART_LSR_OFFS) & UART_RX_FIFO_NOEMPTY; @@ -738,7 +740,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, UART_THR_OFFS, (ubyte)ch); + up_serialout(priv, UART_THR_OFFS, (uint8_t)ch); } /**************************************************************************** @@ -749,7 +751,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -770,11 +772,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return (up_inserial(priv, UART_SSR_OFFS) & UART_SSR_TXFULL) == 0; @@ -784,11 +786,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return (up_inserial(priv, UART_LSR_OFFS) & UART_LSR_TREF) != 0; @@ -813,7 +815,7 @@ void up_earlyserialinit(void) up_disableuartint(TTYS0_DEV.priv, NULL); up_disableuartint(TTYS1_DEV.priv, NULL); - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); } @@ -845,11 +847,11 @@ void up_serialinit(void) int up_putc(int ch) { struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint16 ier; + uint16_t ier; up_disableuartint(priv, &ier); up_waittxready(priv); - up_serialout(priv, UART_THR_OFFS, (ubyte)ch); + up_serialout(priv, UART_THR_OFFS, (uint8_t)ch); /* Check for LF */ diff --git a/arch/arm/src/c5471/c5471_timerisr.c b/arch/arm/src/c5471/c5471_timerisr.c index e37043173e..81fb24a219 100644 --- a/arch/arm/src/c5471/c5471_timerisr.c +++ b/arch/arm/src/c5471/c5471_timerisr.c @@ -1,7 +1,7 @@ /************************************************************ * c5471/c5471_timerisr.c * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -38,15 +38,17 @@ ************************************************************/ #include -#include + +#include #include #include + #include "clock_internal.h" #include "up_internal.h" #include "up_arch.h" /************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************/ /* We want the general purpose timer running at the rate @@ -87,7 +89,7 @@ * ************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { /* Process timer interrupt */ @@ -106,7 +108,7 @@ int up_timerisr(int irq, uint32 *regs) void up_timerinit(void) { - uint32 val; + uint32_t val; up_disable_irq(C5471_IRQ_SYSTIMER); diff --git a/arch/arm/src/c5471/c5471_watchdog.c b/arch/arm/src/c5471/c5471_watchdog.c index 96ddb65297..3660996984 100644 --- a/arch/arm/src/c5471/c5471_watchdog.c +++ b/arch/arm/src/c5471/c5471_watchdog.c @@ -1,7 +1,7 @@ /************************************************************************** * c5471/c5471_watchdog.c * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -38,13 +38,18 @@ **************************************************************************/ #include + #include +#include +#include #include #include #include + #include #include #include + #include "up_arch.h" /************************************************************************** @@ -72,8 +77,8 @@ /* Macros to manage access to to watchdog timer macros */ -#define c5471_wdt_cntl (*(volatile uint32*)C5471_TIMER0_CTRL) -#define c5471_wdt_count (*(volatile uint32*)C5471_TIMER0_CNT) +#define c5471_wdt_cntl (*(volatile uint32_t*)C5471_TIMER0_CTRL) +#define c5471_wdt_count (*(volatile uint32_t*)C5471_TIMER0_CNT) /************************************************************************** * Private Types @@ -87,20 +92,20 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale); -static int wdt_setusec(uint32 usec); +static int wdt_setusec(uint32_t usec); static int wdt_interrupt(int irq, void *context); static int wdt_open(struct file *filep); static int wdt_close(struct file *filep); static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen); static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen); -static int wdt_ioctl(struct file *filep, int cmd, uint32 arg); +static int wdt_ioctl(struct file *filep, int cmd, uint32_t arg); /************************************************************************** * Private Data **************************************************************************/ -static boolean g_wdtopen; +static bool g_wdtopen; static const struct file_operations g_wdtops = { @@ -156,15 +161,15 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale) * Name: wdt_setusec **************************************************************************/ -static int wdt_setusec(uint32 usec) +static int wdt_setusec(uint32_t usec) { /* prescaler: clock / prescaler = #clock ticks per counter in ptv * divisor: #counts until the interrupt comes. */ - uint32 prescaler = MAX_PRESCALER; - uint32 divisor = 1; - uint32 mode; + uint32_t prescaler = MAX_PRESCALER; + uint32_t divisor = 1; + uint32_t mode; dbg("usec=%d\n", usec); @@ -283,7 +288,7 @@ static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen) * Name: wdt_ioctl **************************************************************************/ -static int wdt_ioctl(struct file *filep, int cmd, uint32 arg) +static int wdt_ioctl(struct file *filep, int cmd, uint32_t arg) { dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg); @@ -323,7 +328,7 @@ static int wdt_open(struct file *filep) c5471_wdt_cntl = C5471_DISABLE_VALUE1; c5471_wdt_cntl = C5471_DISABLE_VALUE2; - g_wdtopen = TRUE; + g_wdtopen = true; return OK; } @@ -345,7 +350,7 @@ static int wdt_close(struct file *filep) c5471_wdt_cntl = C5471_TIMER_MODE; #endif - g_wdtopen = FALSE; + g_wdtopen = false; return 0; } diff --git a/arch/arm/src/common/up_arch.h b/arch/arm/src/common/up_arch.h index 6c8a2a6e3c..3b001542b4 100644 --- a/arch/arm/src/common/up_arch.h +++ b/arch/arm/src/common/up_arch.h @@ -42,14 +42,14 @@ #include #ifndef __ASSEMBLY__ -# include +# include #endif #include #include "chip.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -58,25 +58,25 @@ #ifndef __ASSEMBLY__ -# define getreg8(a) (*(volatile ubyte *)(a)) -# define putreg8(v,a) (*(volatile ubyte *)(a) = (v)) -# define getreg32(a) (*(volatile uint32 *)(a)) -# define putreg32(v,a) (*(volatile uint32 *)(a) = (v)) +# define getreg8(a) (*(volatile uint8_t *)(a)) +# define putreg8(v,a) (*(volatile uint8_t *)(a) = (v)) +# define getreg32(a) (*(volatile uint32_t *)(a)) +# define putreg32(v,a) (*(volatile uint32_t *)(a) = (v)) /* Some compiler options will convert short loads and stores into byte loads * and stores. We don't want this to happen for IO reads and writes! */ -/* # define getreg16(a) (*(volatile uint16 *)(a)) */ -static inline uint16 getreg16(unsigned int addr) +/* # define getreg16(a) (*(volatile uint16_t *)(a)) */ +static inline uint16_t getreg16(unsigned int addr) { - uint16 retval; + uint16_t retval; __asm__ __volatile__("\tldrh %0, [%1]\n\t" : "=r"(retval) : "r"(addr)); return retval; } -/* define putreg16(v,a) (*(volatile uint16 *)(a) = (v)) */ -static inline void putreg16(uint16 val, unsigned int addr) +/* define putreg16(v,a) (*(volatile uint16_t *)(a) = (v)) */ +static inline void putreg16(uint16_t val, unsigned int addr) { __asm__ __volatile__("\tstrh %0, [%1]\n\t": : "r"(val), "r"(addr)); } @@ -95,9 +95,9 @@ extern "C" { /* Atomic modification of registers */ -EXTERN void modifyreg8(unsigned int addr, ubyte clearbits, ubyte setbits); -EXTERN void modifyreg16(unsigned int addr, uint16 clearbits, uint16 setbits); -EXTERN void modifyreg32(unsigned int addr, uint32 clearbits, uint32 setbits); +EXTERN void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits); +EXTERN void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits); +EXTERN void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c index e76e05696b..9f4989da3a 100644 --- a/arch/arm/src/common/up_createstack.c +++ b/arch/arm/src/common/up_createstack.c @@ -40,6 +40,7 @@ #include #include +#include #include #include @@ -93,7 +94,7 @@ int up_create_stack(_TCB *tcb, size_t stack_size) if (!tcb->stack_alloc_ptr) { - tcb->stack_alloc_ptr = (uint32 *)kzmalloc(stack_size); + tcb->stack_alloc_ptr = (uint32_t*)kzmalloc(stack_size); } if (tcb->stack_alloc_ptr) @@ -108,7 +109,7 @@ int up_create_stack(_TCB *tcb, size_t stack_size) * referenced as positive word offsets from sp. */ - top_of_stack = (uint32)tcb->stack_alloc_ptr + stack_size - 4; + top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; /* The ARM stack must be aligned at word (4 byte) * boundaries. If necessary top_of_stack must be rounded @@ -116,11 +117,11 @@ int up_create_stack(_TCB *tcb, size_t stack_size) */ top_of_stack &= ~3; - size_of_stack = top_of_stack - (uint32)tcb->stack_alloc_ptr + 4; + size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4; /* Save the adjusted stack values in the _TCB */ - tcb->adj_stack_ptr = (uint32*)top_of_stack; + tcb->adj_stack_ptr = (uint32_t*)top_of_stack; tcb->adj_stack_size = size_of_stack; up_ledon(LED_STACKCREATED); diff --git a/arch/arm/src/common/up_exit.c b/arch/arm/src/common/up_exit.c index 8416a99a35..17de3ade39 100644 --- a/arch/arm/src/common/up_exit.c +++ b/arch/arm/src/common/up_exit.c @@ -38,7 +38,7 @@ ****************************************************************************/ #include -#include + #include #include #include @@ -51,7 +51,7 @@ #endif /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/common/up_idle.c b/arch/arm/src/common/up_idle.c index 08f7f1080a..4927ce0e8e 100644 --- a/arch/arm/src/common/up_idle.c +++ b/arch/arm/src/common/up_idle.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/common/up_idle.c * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,12 +38,12 @@ ****************************************************************************/ #include -#include + #include #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c index d12a23de10..4460090405 100644 --- a/arch/arm/src/common/up_initialize.c +++ b/arch/arm/src/common/up_initialize.c @@ -39,7 +39,6 @@ #include -#include #include #include @@ -49,7 +48,7 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h index 9abf4a0b61..e95d5a7726 100644 --- a/arch/arm/src/common/up_internal.h +++ b/arch/arm/src/common/up_internal.h @@ -40,8 +40,12 @@ * Included Files ****************************************************************************/ +#ifndef __ASSEMBLY__ +# include +#endif + /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Bring-up debug configurations. These are here (vs defconfig) @@ -103,7 +107,7 @@ typedef void (*up_vector_t)(void); * interrupt processing. */ -extern uint32 *current_regs; +extern uint32_t *current_regs; /* This is the beginning of heap as provided from up_head.S. * This is the first address in DRAM after the loaded @@ -111,33 +115,33 @@ extern uint32 *current_regs; * CONFIG_DRAM_END */ -extern uint32 g_heapbase; +extern uint32_t g_heapbase; /* Address of the saved user stack pointer */ #if CONFIG_ARCH_INTERRUPTSTACK > 3 -extern uint32 g_userstack; +extern uint32_t g_userstack; #endif /* These 'addresses' of these values are setup by the linker script. They are - * not actual uint32 storage locations! They are only used meaningfully in the + * not actual uint32_t storage locations! They are only used meaningfully in the * following way: * * - The linker script defines, for example, the symbol_sdata. - * - The declareion extern uint32 _sdata; makes C happy. C will believe - * that the value _sdata is the address of a uint32 variable _data (it is + * - The declareion extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it is * not!). * - We can recoved the linker value then by simply taking the address of - * of _data. like: uint32 *pdata = &_sdata; + * of _data. like: uint32_t *pdata = &_sdata; */ -extern uint32 _stext; /* Start of .text */ -extern uint32 _etext; /* End_1 of .text + .rodata */ -extern const uint32 _eronly; /* End+1 of read only section (.text + .rodata) */ -extern uint32 _sdata; /* Start of .data */ -extern uint32 _edata; /* End+1 of .data */ -extern uint32 _sbss; /* Start of .bss */ -extern uint32 _ebss; /* End+1 of .bss */ +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ #endif /**************************************************************************** @@ -153,31 +157,31 @@ extern uint32 _ebss; /* End+1 of .bss */ /* Defined in files with the same name as the function */ extern void up_boot(void); -extern void up_copystate(uint32 *dest, uint32 *src); -extern void up_decodeirq(uint32 *regs); +extern void up_copystate(uint32_t *dest, uint32_t *src); +extern void up_decodeirq(uint32_t *regs); extern void up_irqinitialize(void); #ifdef CONFIG_ARCH_DMA extern void weak_function up_dmainitialize(void); #endif -extern int up_saveusercontext(uint32 *saveregs); -extern void up_fullcontextrestore(uint32 *restoreregs) __attribute__ ((noreturn)); -extern void up_switchcontext(uint32 *saveregs, uint32 *restoreregs); +extern int up_saveusercontext(uint32_t *saveregs); +extern void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn)); +extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); extern void up_sigdeliver(void); -extern int up_timerisr(int irq, uint32 *regs); +extern int up_timerisr(int irq, uint32_t *regs); extern void up_lowputc(char ch); extern void up_puts(const char *str); extern void up_lowputs(const char *str); #ifdef CONFIG_ARCH_CORTEXM3 -extern uint32 *up_doirq(int irq, uint32 *regs); +extern uint32_t *up_doirq(int irq, uint32_t *regs); extern int up_svcall(int irq, FAR void *context); extern int up_hardfault(int irq, FAR void *context); #else -extern void up_doirq(int irq, uint32 *regs); -extern void up_dataabort(uint32 *regs); -extern void up_prefetchabort(uint32 *regs); -extern void up_syscall(uint32 *regs); -extern void up_undefinedinsn(uint32 *regs); +extern void up_doirq(int irq, uint32_t *regs); +extern void up_dataabort(uint32_t *regs); +extern void up_prefetchabort(uint32_t *regs); +extern void up_syscall(uint32_t *regs); +extern void up_undefinedinsn(uint32_t *regs); #endif /* Defined in up_vectors.S */ diff --git a/arch/arm/src/common/up_interruptcontext.c b/arch/arm/src/common/up_interruptcontext.c index 3c435ac789..b67ad523a2 100644 --- a/arch/arm/src/common/up_interruptcontext.c +++ b/arch/arm/src/common/up_interruptcontext.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/common/up_interruptcontext.c * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,9 +38,11 @@ ****************************************************************************/ #include -#include + +#include #include #include + #include "up_internal.h" /**************************************************************************** @@ -58,11 +60,11 @@ /**************************************************************************** * Name: up_interrupt_context * - * Description: Return TRUE is we are currently executing in + * Description: Return true is we are currently executing in * the interrupt handler context. ****************************************************************************/ -boolean up_interrupt_context(void) +bool up_interrupt_context(void) { return current_regs != NULL; } diff --git a/arch/arm/src/common/up_lowputs.c b/arch/arm/src/common/up_lowputs.c index 697b11e9a8..8b2919a05e 100644 --- a/arch/arm/src/common/up_lowputs.c +++ b/arch/arm/src/common/up_lowputs.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/common/up_lowputs.c * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,12 +38,11 @@ ****************************************************************************/ #include -#include #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/common/up_modifyreg16.c b/arch/arm/src/common/up_modifyreg16.c index 2c235ebfea..e488a6eee3 100644 --- a/arch/arm/src/common/up_modifyreg16.c +++ b/arch/arm/src/common/up_modifyreg16.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -48,7 +48,7 @@ #include "up_arch.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -71,10 +71,10 @@ * ****************************************************************************/ -void modifyreg16(unsigned int addr, uint16 clearbits, uint16 setbits) +void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) { irqstate_t flags; - uint16 regval; + uint16_t regval; flags = irqsave(); regval = getreg16(addr); diff --git a/arch/arm/src/common/up_modifyreg32.c b/arch/arm/src/common/up_modifyreg32.c index 33b40ae3a6..8b93f6b84f 100644 --- a/arch/arm/src/common/up_modifyreg32.c +++ b/arch/arm/src/common/up_modifyreg32.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -48,7 +48,7 @@ #include "up_arch.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -71,10 +71,10 @@ * ****************************************************************************/ -void modifyreg32(unsigned int addr, uint32 clearbits, uint32 setbits) +void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) { irqstate_t flags; - uint32 regval; + uint32_t regval; flags = irqsave(); regval = getreg32(addr); diff --git a/arch/arm/src/common/up_modifyreg8.c b/arch/arm/src/common/up_modifyreg8.c index eefce6db03..2c9dbac250 100644 --- a/arch/arm/src/common/up_modifyreg8.c +++ b/arch/arm/src/common/up_modifyreg8.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -48,7 +48,7 @@ #include "up_arch.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -71,10 +71,10 @@ * ****************************************************************************/ -void modifyreg8(unsigned int addr, ubyte clearbits, ubyte setbits) +void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) { irqstate_t flags; - ubyte regval; + uint8_t regval; flags = irqsave(); regval = getreg8(addr); diff --git a/arch/arm/src/common/up_puts.c b/arch/arm/src/common/up_puts.c index dc8c920f5c..4e74f0cdc3 100644 --- a/arch/arm/src/common/up_puts.c +++ b/arch/arm/src/common/up_puts.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/common/up_puts.c * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,13 +38,12 @@ ****************************************************************************/ #include -#include #include #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/common/up_releasestack.c b/arch/arm/src/common/up_releasestack.c index c65953bd2d..407bd1b544 100644 --- a/arch/arm/src/common/up_releasestack.c +++ b/arch/arm/src/common/up_releasestack.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/common/up_releasestack.c * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,10 +38,11 @@ ****************************************************************************/ #include -#include + #include #include #include + #include "os_internal.h" #include "up_internal.h" diff --git a/arch/arm/src/common/up_usestack.c b/arch/arm/src/common/up_usestack.c index bd7411f0ce..822f051689 100644 --- a/arch/arm/src/common/up_usestack.c +++ b/arch/arm/src/common/up_usestack.c @@ -38,11 +38,15 @@ ****************************************************************************/ #include + #include +#include #include #include + #include #include + #include "up_internal.h" /**************************************************************************** @@ -99,7 +103,7 @@ int up_use_stack(_TCB *tcb, void *stack, size_t stack_size) * referenced as positive word offsets from sp. */ - top_of_stack = (uint32)tcb->stack_alloc_ptr + stack_size - 4; + top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; /* The ARM stack must be aligned at word (4 byte) * boundaries. If necessary top_of_stack must be rounded @@ -107,11 +111,11 @@ int up_use_stack(_TCB *tcb, void *stack, size_t stack_size) */ top_of_stack &= ~3; - size_of_stack = top_of_stack - (uint32)tcb->stack_alloc_ptr + 4; + size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4; /* Save the adjusted stack values in the _TCB */ - tcb->adj_stack_ptr = (uint32*)top_of_stack; + tcb->adj_stack_ptr = (uint32_t*)top_of_stack; tcb->adj_stack_size = size_of_stack; return OK; diff --git a/arch/arm/src/cortexm3/nvic.h b/arch/arm/src/cortexm3/nvic.h index 3cd0941337..c94a88a0e6 100644 --- a/arch/arm/src/cortexm3/nvic.h +++ b/arch/arm/src/cortexm3/nvic.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* NVIC base address ****************************************************************/ diff --git a/arch/arm/src/cortexm3/psr.h b/arch/arm/src/cortexm3/psr.h index dea45555ac..b392cfa3f5 100644 --- a/arch/arm/src/cortexm3/psr.h +++ b/arch/arm/src/cortexm3/psr.h @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Application Program Status Register (APSR) */ diff --git a/arch/arm/src/cortexm3/up_assert.c b/arch/arm/src/cortexm3/up_assert.c index ec2339887e..9a27ac13de 100644 --- a/arch/arm/src/cortexm3/up_assert.c +++ b/arch/arm/src/cortexm3/up_assert.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include #include @@ -52,7 +52,7 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Output debug info if stack dump is selected -- even if @@ -78,9 +78,9 @@ /* I don't know if the builtin to get SP is enabled */ -static inline uint32 up_getsp(void) +static inline uint32_t up_getsp(void) { - uint32 sp; + uint32_t sp; __asm__ ( "\tmov %0, sp\n\t" @@ -94,13 +94,13 @@ static inline uint32 up_getsp(void) ****************************************************************************/ #ifdef CONFIG_ARCH_STACKDUMP -static void up_stackdump(uint32 sp, uint32 stack_base) +static void up_stackdump(uint32_t sp, uint32_t stack_base) { - uint32 stack ; + uint32_t stack ; for (stack = sp & ~0x1f; stack < stack_base; stack += 32) { - uint32 *ptr = (uint32*)stack; + uint32_t *ptr = (uint32_t*)stack; lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n", stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); @@ -148,13 +148,13 @@ static inline void up_registerdump(void) #ifdef CONFIG_ARCH_STACKDUMP static void up_dumpstate(void) { - _TCB *rtcb = (_TCB*)g_readytorun.head; - uint32 sp = up_getsp(); - uint32 ustackbase; - uint32 ustacksize; + _TCB *rtcb = (_TCB*)g_readytorun.head; + uint32_t sp = up_getsp(); + uint32_t ustackbase; + uint32_t ustacksize; #if CONFIG_ARCH_INTERRUPTSTACK > 3 - uint32 istackbase; - uint32 istacksize; + uint32_t istackbase; + uint32_t istacksize; #endif /* Get the limits on the user stack memory */ @@ -166,14 +166,14 @@ static void up_dumpstate(void) } else { - ustackbase = (uint32)rtcb->adj_stack_ptr; - ustacksize = (uint32)rtcb->adj_stack_size; + ustackbase = (uint32_t)rtcb->adj_stack_ptr; + ustacksize = (uint32_t)rtcb->adj_stack_size; } /* Get the limits on the interrupt stack memory */ #if CONFIG_ARCH_INTERRUPTSTACK > 3 - istackbase = (uint32)&g_userstack; + istackbase = (uint32_t)&g_userstack; istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4; /* Show interrupt stack info */ @@ -270,7 +270,7 @@ static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */ * Name: up_assert ****************************************************************************/ -void up_assert(const ubyte *filename, int lineno) +void up_assert(const uint8_t *filename, int lineno) { #if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG) _TCB *rtcb = (_TCB*)g_readytorun.head; @@ -292,7 +292,7 @@ void up_assert(const ubyte *filename, int lineno) * Name: up_assert_code ****************************************************************************/ -void up_assert_code(const ubyte *filename, int lineno, int errorcode) +void up_assert_code(const uint8_t *filename, int lineno, int errorcode) { #if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG) _TCB *rtcb = (_TCB*)g_readytorun.head; diff --git a/arch/arm/src/cortexm3/up_blocktask.c b/arch/arm/src/cortexm3/up_blocktask.c index e50019809d..59d1fa04ed 100755 --- a/arch/arm/src/cortexm3/up_blocktask.c +++ b/arch/arm/src/cortexm3/up_blocktask.c @@ -38,8 +38,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -49,7 +49,7 @@ #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -96,7 +96,7 @@ void up_block_task(_TCB *tcb, tstate_t task_state) else { _TCB *rtcb = (_TCB*)g_readytorun.head; - boolean switch_needed; + bool switch_needed; /* Remove the tcb task from the ready-to-run list. If we * are blocking the task at the head of the task list (the diff --git a/arch/arm/src/cortexm3/up_copystate.c b/arch/arm/src/cortexm3/up_copystate.c index a7e7b11668..f5d4ecad2b 100644 --- a/arch/arm/src/cortexm3/up_copystate.c +++ b/arch/arm/src/cortexm3/up_copystate.c @@ -39,13 +39,13 @@ #include -#include +#include #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -66,7 +66,7 @@ /* A little faster than most memcpy's */ -void up_copystate(uint32 *dest, uint32 *src) +void up_copystate(uint32_t *dest, uint32_t *src) { int i; diff --git a/arch/arm/src/cortexm3/up_doirq.c b/arch/arm/src/cortexm3/up_doirq.c index d6551153cf..f465109a10 100644 --- a/arch/arm/src/cortexm3/up_doirq.c +++ b/arch/arm/src/cortexm3/up_doirq.c @@ -38,16 +38,18 @@ ****************************************************************************/ #include -#include + +#include #include #include #include + #include "up_arch.h" #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -66,7 +68,7 @@ * Public Functions ****************************************************************************/ -uint32 *up_doirq(int irq, uint32 *regs) +uint32_t *up_doirq(int irq, uint32_t *regs) { up_ledon(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/arm/src/cortexm3/up_fullcontextrestore.S b/arch/arm/src/cortexm3/up_fullcontextrestore.S index b5a2092f2b..aab30b3095 100755 --- a/arch/arm/src/cortexm3/up_fullcontextrestore.S +++ b/arch/arm/src/cortexm3/up_fullcontextrestore.S @@ -67,7 +67,7 @@ * Description: * Restore the current thread context. Full prototype is: * - * void up_fullcontextrestore(uint32 *restoreregs) __attribute__ ((noreturn)); + * void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn)); * * Return: * None diff --git a/arch/arm/src/cortexm3/up_hardfault.c b/arch/arm/src/cortexm3/up_hardfault.c index d610a9ba14..0f0c777398 100644 --- a/arch/arm/src/cortexm3/up_hardfault.c +++ b/arch/arm/src/cortexm3/up_hardfault.c @@ -38,8 +38,8 @@ ****************************************************************************/ #include -#include +#include #include #include #include @@ -94,13 +94,13 @@ int up_hardfault(int irq, FAR void *context) { - uint32 *regs = (uint32*)context; - uint16 *pc; - uint16 insn; + uint32_t *regs = (uint32_t*)context; + uint16_t *pc; + uint16_t insn; /* Get the value of the program counter where the fault occurred */ - pc = (uint16*)regs[REG_PC] - 1; + pc = (uint16_t*)regs[REG_PC] - 1; if ((void*)pc >= (void*)&_stext && (void*)pc < (void*)&_etext) { /* Fetch the instruction that caused the Hard fault */ diff --git a/arch/arm/src/cortexm3/up_initialstate.c b/arch/arm/src/cortexm3/up_initialstate.c index 951ce1a95f..40f98bf8c4 100644 --- a/arch/arm/src/cortexm3/up_initialstate.c +++ b/arch/arm/src/cortexm3/up_initialstate.c @@ -38,7 +38,9 @@ ****************************************************************************/ #include + #include +#include #include #include @@ -48,7 +50,7 @@ #include "psr.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -87,11 +89,11 @@ void up_initial_state(_TCB *tcb) /* Save the initial stack pointer */ - xcp->regs[REG_SP] = (uint32)tcb->adj_stack_ptr; + xcp->regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr; /* Save the task entry point (stripping off the thumb bit) */ - xcp->regs[REG_PC] = (uint32)tcb->start & ~1; + xcp->regs[REG_PC] = (uint32_t)tcb->start & ~1; /* Specify thumb mode */ @@ -108,7 +110,7 @@ void up_initial_state(_TCB *tcb) * alloacated D-Space region. */ - xcp->regs[REG_PIC] = (uint32)tcb->dspace->region; + xcp->regs[REG_PIC] = (uint32_t)tcb->dspace->region; } /* Make certain that bit 0 is set in the main entry address. This @@ -118,7 +120,7 @@ void up_initial_state(_TCB *tcb) */ #ifdef CONFIG_NXFLAT - tcb->entry.main = (main_t)((uint32)tcb->entry.main | 1); + tcb->entry.main = (main_t)((uint32_t)tcb->entry.main | 1); #endif #endif diff --git a/arch/arm/src/cortexm3/up_releasepending.c b/arch/arm/src/cortexm3/up_releasepending.c index f3c7ae2098..46218cbbe1 100755 --- a/arch/arm/src/cortexm3/up_releasepending.c +++ b/arch/arm/src/cortexm3/up_releasepending.c @@ -38,15 +38,16 @@ ****************************************************************************/ #include -#include + #include #include #include + #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/cortexm3/up_reprioritizertr.c b/arch/arm/src/cortexm3/up_reprioritizertr.c index 4d406de808..875fc1d6ff 100755 --- a/arch/arm/src/cortexm3/up_reprioritizertr.c +++ b/arch/arm/src/cortexm3/up_reprioritizertr.c @@ -38,15 +38,18 @@ ****************************************************************************/ #include -#include + +#include +#include #include #include #include + #include "os_internal.h" #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -81,7 +84,7 @@ * ****************************************************************************/ -void up_reprioritize_rtr(_TCB *tcb, ubyte priority) +void up_reprioritize_rtr(_TCB *tcb, uint8_t priority) { /* Verify that the caller is sane */ @@ -95,12 +98,12 @@ void up_reprioritize_rtr(_TCB *tcb, ubyte priority) else { _TCB *rtcb = (_TCB*)g_readytorun.head; - boolean switch_needed; + bool switch_needed; slldbg("TCB=%p PRI=%d\n", tcb, priority); /* Remove the tcb task from the ready-to-run list. - * sched_removereadytorun will return TRUE if we just + * sched_removereadytorun will return true if we just * remove the head of the ready to run list. */ @@ -108,10 +111,10 @@ void up_reprioritize_rtr(_TCB *tcb, ubyte priority) /* Setup up the new task priority */ - tcb->sched_priority = (ubyte)priority; + tcb->sched_priority = (uint8_t)priority; /* Return the task to the specified blocked task list. - * sched_addreadytorun will return TRUE if the task was + * sched_addreadytorun will return true if the task was * added to the new list. We will need to perform a context * switch only if the EXCLUSIVE or of the two calls is non-zero * (i.e., one and only one the calls changes the head of the diff --git a/arch/arm/src/cortexm3/up_saveusercontext.S b/arch/arm/src/cortexm3/up_saveusercontext.S index fe7305c101..dee8419592 100755 --- a/arch/arm/src/cortexm3/up_saveusercontext.S +++ b/arch/arm/src/cortexm3/up_saveusercontext.S @@ -42,7 +42,7 @@ #include "nvic.h" /************************************************************************************ - * Preprocessor Definitions + * Pre-processor Definitions ************************************************************************************/ /************************************************************************************ @@ -67,7 +67,7 @@ * Description: * Save the current thread context. Full prototype is: * - * int up_saveusercontext(uint32 *saveregs); + * int up_saveusercontext(uint32_t *saveregs); * * Return: * 0: Normal return diff --git a/arch/arm/src/cortexm3/up_schedulesigaction.c b/arch/arm/src/cortexm3/up_schedulesigaction.c index 31219874b3..e4f4f51b4a 100644 --- a/arch/arm/src/cortexm3/up_schedulesigaction.c +++ b/arch/arm/src/cortexm3/up_schedulesigaction.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -53,7 +53,7 @@ #ifndef CONFIG_DISABLE_SIGNALS /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -162,7 +162,7 @@ void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver) * disabled */ - current_regs[REG_PC] = (uint32)up_sigdeliver; + current_regs[REG_PC] = (uint32_t)up_sigdeliver; current_regs[REG_PRIMASK] = 1; current_regs[REG_XPSR] = CORTEXM3_XPSR_T; @@ -196,7 +196,7 @@ void up_schedule_sigaction(_TCB *tcb, sig_deliver_t sigdeliver) * disabled */ - tcb->xcp.regs[REG_PC] = (uint32)up_sigdeliver; + tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver; tcb->xcp.regs[REG_PRIMASK] = 1; tcb->xcp.regs[REG_XPSR] = CORTEXM3_XPSR_T; } diff --git a/arch/arm/src/cortexm3/up_sigdeliver.c b/arch/arm/src/cortexm3/up_sigdeliver.c index fa7c6b0bf0..79b3f876f9 100644 --- a/arch/arm/src/cortexm3/up_sigdeliver.c +++ b/arch/arm/src/cortexm3/up_sigdeliver.c @@ -39,7 +39,7 @@ #include -#include +#include #include #include @@ -53,7 +53,7 @@ #ifndef CONFIG_DISABLE_SIGNALS /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -82,7 +82,7 @@ void up_sigdeliver(void) { _TCB *rtcb = (_TCB*)g_readytorun.head; - uint32 regs[XCPTCONTEXT_REGS]; + uint32_t regs[XCPTCONTEXT_REGS]; sig_deliver_t sigdeliver; /* Save the errno. This must be preserved throughout the @@ -117,7 +117,7 @@ void up_sigdeliver(void) /* Then restore the task interrupt state */ - irqrestore((uint16)regs[REG_PRIMASK]); + irqrestore((uint16_t)regs[REG_PRIMASK]); /* Deliver the signals */ diff --git a/arch/arm/src/cortexm3/up_svcall.c b/arch/arm/src/cortexm3/up_svcall.c index 7d89e9a0e4..0fc96df426 100644 --- a/arch/arm/src/cortexm3/up_svcall.c +++ b/arch/arm/src/cortexm3/up_svcall.c @@ -38,8 +38,8 @@ ****************************************************************************/ #include -#include +#include #include #include #include @@ -88,7 +88,7 @@ int up_svcall(int irq, FAR void *context) { - uint32 *regs = (uint32*)context; + uint32_t *regs = (uint32_t*)context; DEBUGASSERT(regs && regs == current_regs); DEBUGASSERT(regs[REG_R1] != 0); @@ -115,7 +115,7 @@ int up_svcall(int irq, FAR void *context) { /* R0=0: This is a save context command: * - * int up_saveusercontext(uint32 *saveregs); + * int up_saveusercontext(uint32_t *saveregs); * * At this point, the following values are saved in context: * @@ -128,13 +128,13 @@ int up_svcall(int irq, FAR void *context) case 0: { - memcpy((uint32*)regs[REG_R1], regs, XCPTCONTEXT_SIZE); + memcpy((uint32_t*)regs[REG_R1], regs, XCPTCONTEXT_SIZE); } break; /* R0=1: This a restore context command: * - * void up_fullcontextrestore(uint32 *restoreregs) __attribute__ ((noreturn)); + * void up_fullcontextrestore(uint32_t *restoreregs) __attribute__ ((noreturn)); * * At this point, the following values are saved in context: * @@ -149,13 +149,13 @@ int up_svcall(int irq, FAR void *context) case 1: { - current_regs = (uint32*)regs[REG_R1]; + current_regs = (uint32_t*)regs[REG_R1]; } break; /* R0=2: This a switch context command: * - * void up_switchcontext(uint32 *saveregs, uint32 *restoreregs); + * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); * * At this point, the following values are saved in context: * @@ -172,8 +172,8 @@ int up_svcall(int irq, FAR void *context) case 2: { DEBUGASSERT(regs[REG_R2] != 0); - memcpy((uint32*)regs[REG_R1], regs, XCPTCONTEXT_SIZE); - current_regs = (uint32*)regs[REG_R2]; + memcpy((uint32_t*)regs[REG_R1], regs, XCPTCONTEXT_SIZE); + current_regs = (uint32_t*)regs[REG_R2]; } break; diff --git a/arch/arm/src/cortexm3/up_switchcontext.S b/arch/arm/src/cortexm3/up_switchcontext.S index 055a7a268f..c85cf5d77e 100755 --- a/arch/arm/src/cortexm3/up_switchcontext.S +++ b/arch/arm/src/cortexm3/up_switchcontext.S @@ -42,7 +42,7 @@ #include "nvic.h" /************************************************************************************ - * Preprocessor Definitions + * Pre-processor Definitions ************************************************************************************/ /************************************************************************************ @@ -68,7 +68,7 @@ * Save the current thread context and restore the specified context. * Full prototype is: * - * void up_switchcontext(uint32 *saveregs, uint32 *restoreregs); + * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); * * Return: * None diff --git a/arch/arm/src/cortexm3/up_unblocktask.c b/arch/arm/src/cortexm3/up_unblocktask.c index 0fce2d7062..8fcc28d83e 100755 --- a/arch/arm/src/cortexm3/up_unblocktask.c +++ b/arch/arm/src/cortexm3/up_unblocktask.c @@ -38,16 +38,17 @@ ****************************************************************************/ #include -#include + #include #include #include + #include "os_internal.h" #include "clock_internal.h" #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/dm320/dm320_ahb.h b/arch/arm/src/dm320/dm320_ahb.h index 054280bc02..7e238f54b7 100644 --- a/arch/arm/src/dm320/dm320_ahb.h +++ b/arch/arm/src/dm320/dm320_ahb.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_uart.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* AHB Bus Controller (AHBBUSC) Registers *******************************************/ diff --git a/arch/arm/src/dm320/dm320_boot.c b/arch/arm/src/dm320/dm320_boot.c index 9d7cb1a95c..1dd7288f07 100644 --- a/arch/arm/src/dm320/dm320_boot.c +++ b/arch/arm/src/dm320/dm320_boot.c @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -38,7 +38,7 @@ ************************************************************************************/ #include -#include +#include #include "arm.h" #include "up_internal.h" @@ -54,18 +54,18 @@ struct section_mapping_s { - uint32 physbase; /* Physical address of the region to be mapped */ - uint32 virtbase; /* Virtual address of the region to be mapped */ - uint32 mmuflags; /* MMU settings for the region (e.g., cache-able) */ - uint32 nsections; /* Number of mappings in the region */ + uint32_t physbase; /* Physical address of the region to be mapped */ + uint32_t virtbase; /* Virtual address of the region to be mapped */ + uint32_t mmuflags; /* MMU settings for the region (e.g., cache-able) */ + uint32_t nsections; /* Number of mappings in the region */ }; /************************************************************************************ * Public Variables ************************************************************************************/ -extern uint32 _vector_start; /* Beginning of vector block */ -extern uint32 _vector_end; /* End+1 of vector block */ +extern uint32_t _vector_start; /* Beginning of vector block */ +extern uint32_t _vector_end; /* End+1 of vector block */ /************************************************************************************ * Private Variables @@ -100,10 +100,10 @@ static const struct section_mapping_s section_mapping[] = * Name: up_setlevel1entry ************************************************************************************/ -static inline void up_setlevel1entry(uint32 paddr, uint32 vaddr, uint32 mmuflags) +static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags) { - uint32 *pgtable = (uint32*)PGTABLE_BASE_VADDR; - uint32 index = vaddr >> 20; + uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR; + uint32_t index = vaddr >> 20; /* Save the page table entry */ @@ -114,11 +114,11 @@ static inline void up_setlevel1entry(uint32 paddr, uint32 vaddr, uint32 mmuflags * Name: up_setlevel2coarseentry ************************************************************************************/ -static inline void up_setlevel2coarseentry(uint32 ctabvaddr, uint32 paddr, - uint32 vaddr, uint32 mmuflags) +static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr, + uint32_t vaddr, uint32_t mmuflags) { - uint32 *ctable = (uint32*)ctabvaddr; - uint32 index; + uint32_t *ctable = (uint32_t*)ctabvaddr; + uint32_t index; /* The coarse table divides a 1Mb address space up into 256 entries, each * corresponding to 4Kb of address space. The coarse page table index is @@ -142,9 +142,9 @@ static void up_setupmappings(void) for (i = 0; i < NMAPPINGS; i++) { - uint32 sect_paddr = section_mapping[i].physbase; - uint32 sect_vaddr = section_mapping[i].virtbase; - uint32 mmuflags = section_mapping[i].mmuflags; + uint32_t sect_paddr = section_mapping[i].physbase; + uint32_t sect_vaddr = section_mapping[i].virtbase; + uint32_t mmuflags = section_mapping[i].mmuflags; for (j = 0; j < section_mapping[i].nsections; j++) { @@ -161,9 +161,9 @@ static void up_setupmappings(void) static void up_vectormapping(void) { - uint32 vector_paddr = DM320_IRAM_PADDR; - uint32 vector_vaddr = DM320_VECTOR_VADDR; - uint32 end_paddr = vector_paddr + DM320_IRAM_SIZE; + uint32_t vector_paddr = DM320_IRAM_PADDR; + uint32_t vector_vaddr = DM320_VECTOR_VADDR; + uint32_t end_paddr = vector_paddr + DM320_IRAM_SIZE; /* We want to keep our interrupt vectors and interrupt-related logic in zero-wait * state internal RAM (IRAM). The DM320 has 16Kb of IRAM positioned at physical @@ -193,9 +193,9 @@ static void up_vectormapping(void) static void up_copyvectorblock(void) { - uint32 *src = (uint32*)&_vector_start; - uint32 *end = (uint32*)&_vector_end; - uint32 *dest = (uint32*)VECTOR_BASE; + uint32_t *src = (uint32_t*)&_vector_start; + uint32_t *end = (uint32_t*)&_vector_end; + uint32_t *dest = (uint32_t*)VECTOR_BASE; while (src < end) { diff --git a/arch/arm/src/dm320/dm320_busc.h b/arch/arm/src/dm320/dm320_busc.h index 3d234387de..b7c3287e57 100644 --- a/arch/arm/src/dm320/dm320_busc.h +++ b/arch/arm/src/dm320/dm320_busc.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_busc.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Bus Controller Register Map (BUSC) ***********************************************/ diff --git a/arch/arm/src/dm320/dm320_clkc.h b/arch/arm/src/dm320/dm320_clkc.h index ecb19c3009..1e8e7da91d 100644 --- a/arch/arm/src/dm320/dm320_clkc.h +++ b/arch/arm/src/dm320/dm320_clkc.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_clkc.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Clock Controller Register Map (CLKC) *********************************************/ diff --git a/arch/arm/src/dm320/dm320_decodeirq.c b/arch/arm/src/dm320/dm320_decodeirq.c index c93805d8f5..e7953caf01 100644 --- a/arch/arm/src/dm320/dm320_decodeirq.c +++ b/arch/arm/src/dm320/dm320_decodeirq.c @@ -39,7 +39,8 @@ ********************************************************************************/ #include -#include + +#include #include #include #include @@ -50,7 +51,7 @@ #include "up_internal.h" /******************************************************************************** - * Definitions + * Pre-processor Definitions ********************************************************************************/ /******************************************************************************** @@ -69,7 +70,7 @@ * Public Funtions ********************************************************************************/ -void up_decodeirq(uint32* regs) +void up_decodeirq(uint32_t* regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lib_lowprintf("Unexpected IRQ\n"); @@ -78,7 +79,7 @@ void up_decodeirq(uint32* regs) #else /* Decode the interrupt. First, fetch the interrupt id register. */ - uint16 irqentry = getreg16(DM320_INTC_IRQENTRY0); + uint16_t irqentry = getreg16(DM320_INTC_IRQENTRY0); /* The irqentry value is an offset into a table. Zero means no interrupt. */ diff --git a/arch/arm/src/dm320/dm320_emif.h b/arch/arm/src/dm320/dm320_emif.h index a546663877..0675595d06 100644 --- a/arch/arm/src/dm320/dm320_emif.h +++ b/arch/arm/src/dm320/dm320_emif.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_emif.h * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* External Memory Interface (EMIF) Registers */ diff --git a/arch/arm/src/dm320/dm320_framebuffer.c b/arch/arm/src/dm320/dm320_framebuffer.c index 04cee0f96d..60565deee6 100644 --- a/arch/arm/src/dm320/dm320_framebuffer.c +++ b/arch/arm/src/dm320/dm320_framebuffer.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/dm320/dm320_framebuffer.c * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -39,7 +39,7 @@ #include -#include +#include #include #include #include @@ -53,7 +53,7 @@ #include "dm320_osd.h" /************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************/ /* Configuration ********************************************************/ @@ -592,34 +592,34 @@ static struct fb_vtable_s g_osd1vtable = * Private Functions ****************************************************************************/ -static inline void dm320_blankscreen(ubyte *buffer, int len) +static inline void dm320_blankscreen(uint8_t *buffer, int len) { memset(buffer, 0xff, len); } -static inline uint32 dm320_physaddr(FAR void *fb_vaddr) +static inline uint32_t dm320_physaddr(FAR void *fb_vaddr) { - return (uint32)fb_vaddr - DM320_SDRAM_VADDR; + return (uint32_t)fb_vaddr - DM320_SDRAM_VADDR; } #ifndef CONFIG_DM320_VID0_DISABLE -static inline uint32 dm320_vid0upperoffset(void) +static inline uint32_t dm320_vid0upperoffset(void) { return (((dm320_physaddr(g_vid0base) / 32) >> 16) & 0xff); } -static inline uint32 dm320_vid0loweroffset(void) +static inline uint32_t dm320_vid0loweroffset(void) { return ((dm320_physaddr(g_vid0base) / 32) & 0xffff); } #ifndef CONFIG_DM320_DISABLE_PINGPONG -static inline uint32 dm320_vid0ppupperoffset(void) +static inline uint32_t dm320_vid0ppupperoffset(void) { return (((dm320_physaddr(g_vid0ppbase) / 32) >> 16) & 0xff); } -static inline uint32 dm320_vid0pploweroffset(void) +static inline uint32_t dm320_vid0pploweroffset(void) { return ((dm320_physaddr(g_vid0ppbase) / 32) & 0xffff); } @@ -627,36 +627,36 @@ static inline uint32 dm320_vid0pploweroffset(void) #endif #ifndef CONFIG_DM320_VID1_DISABLE -static inline uint32 dm320_vid1upperoffset(void) +static inline uint32_t dm320_vid1upperoffset(void) { return (((dm320_physaddr(g_vid1base) / 32) >> 16) & 0xff); } -static inline uint32 dm320_vid1loweroffset(void) +static inline uint32_t dm320_vid1loweroffset(void) { return ((dm320_physaddr(g_vid1base) / 32) & 0xffff); } #endif #ifndef CONFIG_DM320_OSD0_DISABLE -static inline uint32 dm320_osd0upperoffset(void) +static inline uint32_t dm320_osd0upperoffset(void) { return (((dm320_physaddr(g_osd0base) / 32) >> 16) & 0xff); } -static inline uint32 dm320_osd0loweroffset(void) +static inline uint32_t dm320_osd0loweroffset(void) { return ((dm320_physaddr(g_osd0base) / 32) & 0xffff); } #endif #ifndef CONFIG_DM320_OSD1_DISABLE -static inline uint32 dm320_osd1upperoffset(void) +static inline uint32_t dm320_osd1upperoffset(void) { return (((dm320_physaddr(g_osd1base) / 32) >> 16) & 0xff); } -static inline uint32 dm320_osd1loweroffset(void) +static inline uint32_t dm320_osd1loweroffset(void) { return ((dm320_physaddr(g_osd1base) / 32) & 0xffff); } @@ -823,7 +823,7 @@ static void dm320_hwinitialize(void) gvdbg("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH)); gvdbg("DM320_OSD_VIDWIN0ADL: %04x\n", getreg16(DM320_OSD_VIDWIN0ADL)); - dm320_blankscreen((ubyte *)g_vid0base, DM320_VID0_FBLEN); + dm320_blankscreen((uint8_t *)g_vid0base, DM320_VID0_FBLEN); #ifndef CONFIG_DM320_DISABLE_PINGPONG putreg16(dm320_vid0ppupperoffset(), DM320_OSD_PPVWIN0ADH); @@ -831,7 +831,7 @@ static void dm320_hwinitialize(void) gvdbg("DM320_OSD_PPVWIN0ADH: %04x\n", getreg16(DM320_OSD_PPVWIN0ADH)); gvdbg("DM320_OSD_PPVWIN0ADL: %04x\n", getreg16(DM320_OSD_PPVWIN0ADL)); - dm320_blankscreen((ubyte *)g_vid0ppbase, DM320_VID0_FBLEN); + dm320_blankscreen((uint8_t *)g_vid0ppbase, DM320_VID0_FBLEN); #endif putreg16(CONFIG_DM320_VID0_XPOS, DM320_OSD_VIDWIN0XP); @@ -855,7 +855,7 @@ static void dm320_hwinitialize(void) gvdbg("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH)); gvdbg("DM320_OSD_VIDWIN1ADL: %04x\n", getreg16(DM320_OSD_VIDWIN1ADL)); - dm320_blankscreen((ubyte *)g_vid1base, DM320_VID1_FBLEN); + dm320_blankscreen((uint8_t *)g_vid1base, DM320_VID1_FBLEN); putreg16(CONFIG_DM320_VID1_XPOS, DM320_OSD_VIDWIN1XP); putreg16(CONFIG_DM320_VID1_XPOS, DM320_OSD_VIDWIN1YP); @@ -877,7 +877,7 @@ static void dm320_hwinitialize(void) #ifndef CONFIG_DM320_OSD0_DISABLE gvdbg("Initialize OSD win0:\n"); - dm320_blankscreen((ubyte *)g_osd0base, DM320_OSD0_FBLEN); + dm320_blankscreen((uint8_t *)g_osd0base, DM320_OSD0_FBLEN); putreg16(CONFIG_DM320_OSD0_XPOS, DM320_OSD_OSDWIN0XP); putreg16(CONFIG_DM320_OSD0_YPOS, DM320_OSD_OSDWIN0YP); @@ -902,7 +902,7 @@ static void dm320_hwinitialize(void) #ifndef CONFIG_DM320_OSD1_DISABLE gvdbg("Initialize OSD win1\n"); - dm320_blankscreen((ubyte *)g_osd1base, DM320_OSD1_FBLEN); + dm320_blankscreen((uint8_t *)g_osd1base, DM320_OSD1_FBLEN); putreg16(CONFIG_DM320_OSD1_XPOS, DM320_OSD_OSDWIN1XP); putreg16(CONFIG_DM320_OSD1_YPOS, DM320_OSD_OSDWIN1YP); @@ -1183,12 +1183,12 @@ static int dm320_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap) { irqstate_t flags; - uint16 regval; - ubyte y; - ubyte u; - ubyte v; - int len - int i; + uint16_t regval; + uint8_t y; + uint8_t u; + uint8_t v; + int len + int i; #ifdef CONFIG_DEBUG if (!vtable || !cmap || !cmap->read || !cmap->green || !cmap->blue) @@ -1207,8 +1207,8 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c /* Program the CLUT */ while (getreg16(DM320_OSD_MISCCTL) & 0x8); - putreg16(((uint16)y) << 8 | uint16(u)), DM320_OSD_CLUTRAMYCB); - putreg16(((uint16)v << 8 | i), DM320_OSD_CLUTRAMCR); + putreg16(((uint16_t)y) << 8 | uint16_t(u)), DM320_OSD_CLUTRAMYCB); + putreg16(((uint16_t)v << 8 | i), DM320_OSD_CLUTRAMCR); } /* Select RAM clut */ @@ -1279,7 +1279,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *settings) { irqstate_t flags; - uint16 regval; + uint16_t regval; #ifdef CONFIG_DEBUG if (!vtable || !settings) diff --git a/arch/arm/src/dm320/dm320_gio.h b/arch/arm/src/dm320/dm320_gio.h index 642c68bc9c..da21c67558 100644 --- a/arch/arm/src/dm320/dm320_gio.h +++ b/arch/arm/src/dm320/dm320_gio.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_gio.h * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -41,11 +41,11 @@ ************************************************************************************/ #ifndef __ASSEMBLY__ -# include +# include #endif /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* General I/O Registers */ @@ -77,7 +77,7 @@ #define _GIO_READ_REG(pin, reg0, reg1, reg2, bval) \ do { \ - register uint32 _reg; register int _pin; \ + register uint32_t _reg; register int _pin; \ if ((pin) < 16) { _reg = (reg0); _pin = (pin); } \ else if ((pin) < 32) { _reg = (reg1); _pin = ((pin) - 16); } \ else { _reg = (reg2); _pin = ((pin) - 32); } \ @@ -86,7 +86,7 @@ #define _GIO_SET_REG(pin, reg0, reg1, reg2) \ do { \ - register uint32 _reg; register int _pin; \ + register uint32_t _reg; register int _pin; \ if ((pin) < 16) { _reg = (reg0); _pin = (pin); } \ else if ((pin) < 32) { _reg = (reg1); _pin = ((pin) - 16); } \ else { _reg = (reg2); _pin = ((pin) - 32); } \ @@ -95,7 +95,7 @@ #define _GIO_CLEAR_REG(pin, reg0, reg1, reg2) \ do { \ - register uint32 _reg; register int _pin; \ + register uint32_t _reg; register int _pin; \ if ((pin) < 16) { _reg = (reg0); _pin = (pin); } \ else if ((pin) < 32) { _reg = (reg1); _pin = ((pin) - 16); } \ else { _reg = (reg2); _pin = ((pin) - 32); } \ diff --git a/arch/arm/src/dm320/dm320_intc.h b/arch/arm/src/dm320/dm320_intc.h index 13f4452ec2..245eb30ca9 100644 --- a/arch/arm/src/dm320/dm320_intc.h +++ b/arch/arm/src/dm320/dm320_intc.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_intc.h * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Interrupt Controller Registers */ diff --git a/arch/arm/src/dm320/dm320_irq.c b/arch/arm/src/dm320/dm320_irq.c index 84e0efcf5a..ec31e32467 100644 --- a/arch/arm/src/dm320/dm320_irq.c +++ b/arch/arm/src/dm320/dm320_irq.c @@ -1,4 +1,4 @@ -/************************************************************ +/************************************************************************ * arch/arm/src/dm320/dm320_irq.c * * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -31,14 +31,15 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************/ + ************************************************************************/ -/************************************************************ +/************************************************************************ * Included Files - ************************************************************/ + ************************************************************************/ #include -#include + +#include #include #include "arm.h" @@ -46,19 +47,19 @@ #include "os_internal.h" #include "up_internal.h" -/************************************************************ - * Definitions - ************************************************************/ +/************************************************************************ + * Pre-processor Definitions + ************************************************************************/ -/************************************************************ +/************************************************************************ * Public Data - ************************************************************/ + ************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; -/************************************************************ +/************************************************************************ * Private Data - ************************************************************/ + ************************************************************************/ /* The value of _vflashstart is defined in ld.script. It * could be hard-coded because we know that correct IRAM @@ -67,17 +68,17 @@ uint32 *current_regs; extern int _svectors; /* Type does not matter */ -/************************************************************ +/************************************************************************ * Private Functions - ************************************************************/ + ************************************************************************/ -/************************************************************ +/************************************************************************ * Public Functions - ************************************************************/ + ************************************************************************/ -/************************************************************ +/************************************************************************ * Name: up_irqinitialize - ************************************************************/ + ************************************************************************/ void up_irqinitialize(void) { @@ -119,13 +120,13 @@ void up_irqinitialize(void) #endif } -/************************************************************ +/************************************************************************ * Name: up_disable_irq * * Description: * Disable the IRQ specified by 'irq' * - ************************************************************/ + ************************************************************************/ void up_disable_irq(int irq) { @@ -159,13 +160,13 @@ void up_disable_irq(int irq) } } -/************************************************************ +/************************************************************************ * Name: up_enable_irq * * Description: * Enable the IRQ specified by 'irq' * - ************************************************************/ + ************************************************************************/ void up_enable_irq(int irq) { @@ -199,13 +200,13 @@ void up_enable_irq(int irq) } } -/************************************************************ +/************************************************************************ * Name: up_maskack_irq * * Description: * Mask the IRQ and acknowledge it * - ************************************************************/ + ************************************************************************/ void up_maskack_irq(int irq) { diff --git a/arch/arm/src/dm320/dm320_memorymap.h b/arch/arm/src/dm320/dm320_memorymap.h index 7e7247b531..17afa183d1 100644 --- a/arch/arm/src/dm320/dm320_memorymap.h +++ b/arch/arm/src/dm320/dm320_memorymap.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_memorymap.h * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -40,14 +40,10 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - #include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Mapped base of all registers *****************************************************/ diff --git a/arch/arm/src/dm320/dm320_osd.h b/arch/arm/src/dm320/dm320_osd.h index a7857590d0..496e49ff2b 100644 --- a/arch/arm/src/dm320/dm320_osd.h +++ b/arch/arm/src/dm320/dm320_osd.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_osd.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* On Screen Display Register Map (OSD) *********************************************/ diff --git a/arch/arm/src/dm320/dm320_serial.c b/arch/arm/src/dm320/dm320_serial.c index 35d0db17d9..47e15defea 100644 --- a/arch/arm/src/dm320/dm320_serial.c +++ b/arch/arm/src/dm320/dm320_serial.c @@ -41,6 +41,8 @@ #include #include +#include +#include #include #include #include @@ -59,7 +61,7 @@ #ifdef CONFIG_USE_SERIALDRIVER /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -68,33 +70,33 @@ struct up_dev_s { - uint32 uartbase; /* Base address of UART registers */ - uint32 baud; /* Configured baud */ - uint16 msr; /* Saved MSR value */ - ubyte irq; /* IRQ associated with this UART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - boolean stopbits2; /* TRUE: Configure with 2 - * stop bits instead of 1 */ + uint32_t uartbase; /* Base address of UART registers */ + uint32_t baud; /* Configured baud */ + uint16_t msr; /* Saved MSR value */ + uint8_t irq; /* IRQ associated with this UART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + bool stopbits2; /* true: Configure with 2 + * stop bits instead of 1 */ }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -199,7 +201,7 @@ static uart_dev_t g_uart1port = * Name: up_serialin ****************************************************************************/ -static inline uint16 up_serialin(struct up_dev_s *priv, uint32 offset) +static inline uint16_t up_serialin(struct up_dev_s *priv, uint32_t offset) { return getreg16(priv->uartbase + offset); } @@ -208,7 +210,7 @@ static inline uint16 up_serialin(struct up_dev_s *priv, uint32 offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint16 value) +static inline void up_serialout(struct up_dev_s *priv, uint32_t offset, uint16_t value) { putreg16(value, priv->uartbase + offset); } @@ -217,7 +219,7 @@ static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint16 val * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, uint16 *msr) +static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *msr) { if (msr) { @@ -232,7 +234,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint16 *msr) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, uint16 msr) +static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t msr) { priv->msr |= msr & UART_MSR_ALLIE; up_serialout(priv, UART_MSR, priv->msr); @@ -259,9 +261,9 @@ static inline void up_waittxready(struct up_dev_s *priv) * Name: up_enablebreaks ****************************************************************************/ -static inline void up_enablebreaks(struct up_dev_s *priv, boolean enable) +static inline void up_enablebreaks(struct up_dev_s *priv, bool enable) { - uint16 lcr = up_serialin(priv, UART_LCR); + uint16_t lcr = up_serialin(priv, UART_LCR); if (enable) { lcr |= UART_LCR_BOC; @@ -287,7 +289,7 @@ static int up_setup(struct uart_dev_s *dev) { #ifndef CONFIG_SUPPRESS_UART_CONFIG struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint16 brsr; + uint16_t brsr; /* Clear fifos */ @@ -380,7 +382,7 @@ static int up_setup(struct uart_dev_s *dev) up_serialout(priv, UART_MSR, priv->msr); up_serialout(priv, UART_BRSR, brsr); - up_enablebreaks(priv, FALSE); + up_enablebreaks(priv, false); #endif return OK; } @@ -468,7 +470,7 @@ static int up_interrupt(int irq, void *context) { struct uart_dev_s *dev = NULL; struct up_dev_s *priv; - uint16 status; + uint16_t status; int passes = 0; if (g_uart1priv.irq == irq) @@ -559,7 +561,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { irqstate_t flags = irqsave(); - up_enablebreaks(priv, TRUE); + up_enablebreaks(priv, true); irqrestore(flags); } break; @@ -568,7 +570,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) { irqstate_t flags; flags = irqsave(); - up_enablebreaks(priv, FALSE); + up_enablebreaks(priv, false); irqrestore(flags); } break; @@ -591,10 +593,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint16 dtrr; + uint16_t dtrr; dtrr = up_serialin(priv, UART_DTRR); *status = dtrr; @@ -609,7 +611,7 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -629,11 +631,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, UART_SR) & UART_SR_RFNEF) != 0); @@ -650,7 +652,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, UART_DTRR, (uint16)ch); + up_serialout(priv, UART_DTRR, (uint16_t)ch); } /**************************************************************************** @@ -661,7 +663,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -681,11 +683,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, UART_SR) & UART_SR_TFTI) != 0); @@ -695,11 +697,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, UART_SR) & UART_SR_TREF) == 0); @@ -724,7 +726,7 @@ void up_earlyserialinit(void) up_disableuartint(TTYS0_DEV.priv, NULL); up_disableuartint(TTYS1_DEV.priv, NULL); - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); } @@ -756,11 +758,11 @@ void up_serialinit(void) int up_putc(int ch) { struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint16 ier; + uint16_t ier; up_disableuartint(priv, &ier); up_waittxready(priv); - up_serialout(priv, UART_DTRR, (uint16)ch); + up_serialout(priv, UART_DTRR, (uint16_t)ch); /* Check for LF */ @@ -814,7 +816,7 @@ static inline void up_waittxready(void) int up_putc(int ch) { up_waittxready(); - putreg16((uint16)ch, DM320_REGISTER_BASE + UART_DTRR); + putreg16((uint16_t)ch, DM320_REGISTER_BASE + UART_DTRR); /* Check for LF */ @@ -823,7 +825,7 @@ int up_putc(int ch) /* Add CR */ up_waittxready(); - putreg16((uint16)'\r', DM320_REGISTER_BASE + UART_DTRR); + putreg16((uint16_t)'\r', DM320_REGISTER_BASE + UART_DTRR); } up_waittxready(); diff --git a/arch/arm/src/dm320/dm320_timer.h b/arch/arm/src/dm320/dm320_timer.h index 6c76f48240..31839a091c 100644 --- a/arch/arm/src/dm320/dm320_timer.h +++ b/arch/arm/src/dm320/dm320_timer.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_timer.h * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Timer Registers */ diff --git a/arch/arm/src/dm320/dm320_timerisr.c b/arch/arm/src/dm320/dm320_timerisr.c index 59fa7581f8..a8e3f39fe9 100644 --- a/arch/arm/src/dm320/dm320_timerisr.c +++ b/arch/arm/src/dm320/dm320_timerisr.c @@ -39,15 +39,17 @@ ****************************************************************************/ #include -#include + +#include #include #include + #include "clock_internal.h" #include "up_internal.h" #include "up_arch.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* DM320 Timers @@ -114,7 +116,7 @@ * ****************************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { /* Process timer interrupt */ diff --git a/arch/arm/src/dm320/dm320_uart.h b/arch/arm/src/dm320/dm320_uart.h index 0c5d803be4..f92a5ccdd6 100644 --- a/arch/arm/src/dm320/dm320_uart.h +++ b/arch/arm/src/dm320/dm320_uart.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_uart.h * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -41,11 +41,11 @@ ************************************************************************************/ #ifndef __ASSEMBLY__ -# include +# include #endif /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* UART definitions *****************************************************************/ @@ -80,18 +80,18 @@ /* And baud = UART_REFCLK / (brsr+1) */ -#define UART_BAUD_2400 ((uint16)((UART_REFCLK / 2400 ) - 1)) -#define UART_BAUD_4800 ((uint16)((UART_REFCLK / 4800 ) - 1)) -#define UART_BAUD_9600 ((uint16)((UART_REFCLK / 9600 ) - 1)) -#define UART_BAUD_14400 ((uint16)((UART_REFCLK / 14400 ) - 1)) -#define UART_BAUD_19200 ((uint16)((UART_REFCLK / 19200 ) - 1)) -#define UART_BAUD_28800 ((uint16)((UART_REFCLK / 28800 ) - 1)) -#define UART_BAUD_38400 ((uint16)((UART_REFCLK / 38400 ) - 1)) -#define UART_BAUD_57600 ((uint16)((UART_REFCLK / 57600 ) - 1)) -#define UART_BAUD_115200 ((uint16)((UART_REFCLK / 115200) - 1)) -#define UART_BAUD_230400 ((uint16)((UART_REFCLK / 230400) - 1)) -#define UART_BAUD_460800 ((uint16)((UART_REFCLK / 460800) - 1)) -#define UART_BAUD_921600 ((uint16)((UART_REFCLK / 921600) - 1)) +#define UART_BAUD_2400 ((uint16_t)((UART_REFCLK / 2400 ) - 1)) +#define UART_BAUD_4800 ((uint16_t)((UART_REFCLK / 4800 ) - 1)) +#define UART_BAUD_9600 ((uint16_t)((UART_REFCLK / 9600 ) - 1)) +#define UART_BAUD_14400 ((uint16_t)((UART_REFCLK / 14400 ) - 1)) +#define UART_BAUD_19200 ((uint16_t)((UART_REFCLK / 19200 ) - 1)) +#define UART_BAUD_28800 ((uint16_t)((UART_REFCLK / 28800 ) - 1)) +#define UART_BAUD_38400 ((uint16_t)((UART_REFCLK / 38400 ) - 1)) +#define UART_BAUD_57600 ((uint16_t)((UART_REFCLK / 57600 ) - 1)) +#define UART_BAUD_115200 ((uint16_t)((UART_REFCLK / 115200) - 1)) +#define UART_BAUD_230400 ((uint16_t)((UART_REFCLK / 230400) - 1)) +#define UART_BAUD_460800 ((uint16_t)((UART_REFCLK / 460800) - 1)) +#define UART_BAUD_921600 ((uint16_t)((UART_REFCLK / 921600) - 1)) /* UART MSR register bit definitions */ diff --git a/arch/arm/src/dm320/dm320_usb.h b/arch/arm/src/dm320/dm320_usb.h index 4dfe582ff4..229c2857e9 100644 --- a/arch/arm/src/dm320/dm320_usb.h +++ b/arch/arm/src/dm320/dm320_usb.h @@ -1,7 +1,7 @@ /************************************************************************************ * dm320/dm320_uart.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -40,12 +40,8 @@ * Included Files ************************************************************************************/ -#ifndef __ASSEMBLY__ -# include -#endif - /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* USB Controller Registers *********************************************************/ diff --git a/arch/arm/src/dm320/dm320_usbdev.c b/arch/arm/src/dm320/dm320_usbdev.c index b77cf2317d..9e8dc5ea1e 100644 --- a/arch/arm/src/dm320/dm320_usbdev.c +++ b/arch/arm/src/dm320/dm320_usbdev.c @@ -1,7 +1,7 @@ /******************************************************************************* * arch/arm/src/dm320/dm320_usbdev.c * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,8 +38,10 @@ *******************************************************************************/ #include -#include +#include +#include +#include #include #include #include @@ -208,11 +210,11 @@ struct dm320_ep_s struct dm320_usbdev_s *dev; /* Reference to private driver data */ struct dm320_req_s *head; /* Request list for this endpoint */ struct dm320_req_s *tail; - ubyte epphy; /* Physical EP address/index */ - ubyte stalled:1; /* Endpoint is halted */ - ubyte in:1; /* Endpoint is IN only */ - ubyte halted:1; /* Endpoint feature halted */ - ubyte txnullpkt:1; /* Null packet needed at end of transfer */ + uint8_t epphy; /* Physical EP address/index */ + uint8_t stalled:1; /* Endpoint is halted */ + uint8_t in:1; /* Endpoint is IN only */ + uint8_t halted:1; /* Endpoint feature halted */ + uint8_t txnullpkt:1; /* Null packet needed at end of transfer */ }; /* This structure encapsulates the overall driver state */ @@ -232,12 +234,12 @@ struct dm320_usbdev_s /* DM320-specific fields */ - ubyte stalled:1; /* 1: Protocol stalled */ - ubyte selfpowered:1; /* 1: Device is self powered */ - ubyte paddrset:1; /* 1: Peripheral addr has been set */ - ubyte attached:1; /* 1: Host attached */ - ubyte rxpending:1; /* 1: RX pending */ - ubyte paddr; /* Peripheral address */ + uint8_t stalled:1; /* 1: Protocol stalled */ + uint8_t selfpowered:1; /* 1: Device is self powered */ + uint8_t paddrset:1; /* 1: Peripheral addr has been set */ + uint8_t attached:1; /* 1: Host attached */ + uint8_t rxpending:1; /* 1: RX pending */ + uint8_t paddr; /* Peripheral address */ /* The endpoint list */ @@ -248,13 +250,13 @@ struct dm320_usbdev_s struct dm320_epinfo_s { - ubyte addr; /* Logical endpoint address */ - ubyte attr; /* Endpoint attributes */ - ubyte fifo; /* FIFO mx pkt size + dual buffer bits */ + uint8_t addr; /* Logical endpoint address */ + uint8_t attr; /* Endpoint attributes */ + uint8_t fifo; /* FIFO mx pkt size + dual buffer bits */ #ifdef CONFIG_USBDEV_HIGHSPEED - uint16 maxpacket; /* Max packet size */ + uint16_t maxpacket; /* Max packet size */ #else - ubyte maxpacket; /* Max packet size */ + uint8_t maxpacket; /* Max packet size */ #endif }; @@ -265,12 +267,12 @@ struct dm320_epinfo_s /* Register operations */ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint32 dm320_getreg8(uint32 addr); -static uint32 dm320_getreg16(uint32 addr); -static uint32 dm320_getreg32(uint32 addr); -static void dm320_putreg8(ubyte val, uint32 addr); -static void dm320_putreg16(uint16 val, uint32 addr); -static void dm320_putreg32(uint32 val, uint32 addr); +static uint32_t dm320_getreg8(uint32_t addr); +static uint32_t dm320_getreg16(uint32_t addr); +static uint32_t dm320_getreg32(uint32_t addr); +static void dm320_putreg8(uint8_t val, uint32_t addr); +static void dm320_putreg16(uint16_t val, uint32_t addr); +static void dm320_putreg32(uint32_t val, uint32_t addr); #else # define dm320_getreg8(addr) getreg8(addr) # define dm320_getreg16(addr) getreg16(addr) @@ -287,12 +289,12 @@ static void dm320_rqenqueue(FAR struct dm320_ep_s *privep, FAR struct dm320_req_ /* Low level data transfers and request operations */ -static int dm320_ep0write(ubyte *buf, uint16 nbytes); -static int dm320_epwrite(ubyte epphy, ubyte *buf, uint16 nbytes); -static int dm320_epread(ubyte epphy, ubyte *buf, uint16 nbytes); +static int dm320_ep0write(uint8_t *buf, uint16_t nbytes); +static int dm320_epwrite(uint8_t epphy, uint8_t *buf, uint16_t nbytes); +static int dm320_epread(uint8_t epphy, uint8_t *buf, uint16_t nbytes); static inline void dm320_abortrequest(struct dm320_ep_s *privep, - struct dm320_req_s *privreq, sint16 result); -static void dm320_reqcomplete(struct dm320_ep_s *privep, sint16 result); + struct dm320_req_s *privreq, int16_t result); +static void dm320_reqcomplete(struct dm320_ep_s *privep, int16_t result); static int dm320_wrrequest(struct dm320_ep_s *privep); static int dm320_rdrequest(struct dm320_ep_s *privep); static void dm320_cancelrequests(struct dm320_ep_s *privep); @@ -300,11 +302,11 @@ static void dm320_cancelrequests(struct dm320_ep_s *privep); /* Interrupt handling */ static struct dm320_ep_s *dm320_epfindbyaddr(struct dm320_usbdev_s *priv, - uint16 eplog); + uint16_t eplog); static void dm320_dispatchrequest(struct dm320_usbdev_s *priv, const struct usb_ctrlreq_s *ctrl); static inline void dm320_ep0setup(struct dm320_usbdev_s *priv); -static inline uint32 dm320_highestpriinterrupt(int intstatus); +static inline uint32_t dm320_highestpriinterrupt(int intstatus); static int dm320_ctlrinterrupt(int irq, FAR void *context); static int dm320_attachinterrupt(int irq, FAR void *context); @@ -317,12 +319,12 @@ static void dm320_ctrlinitialize(struct dm320_usbdev_s *priv); /* Endpoint methods */ static int dm320_epconfigure(FAR struct usbdev_ep_s *ep, - const struct usb_epdesc_s *desc, boolean last); + const struct usb_epdesc_s *desc, bool last); static int dm320_epdisable(FAR struct usbdev_ep_s *ep); static FAR struct usbdev_req_s *dm320_epallocreq(FAR struct usbdev_ep_s *ep); static void dm320_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req); #ifdef CONFIG_DM320_USBDEV_DMA -static FAR void *dm320_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16 nbytes); +static FAR void *dm320_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t nbytes); static void dm320_epfreebuffer(FAR struct usbdev_ep_s *ep, void *buf); #endif static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *privreq); @@ -331,12 +333,12 @@ static int dm320_epcancel(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *priv /* USB device controller methods */ static FAR struct usbdev_ep_s *dm320_allocep(FAR struct usbdev_s *dev, - ubyte epno, boolean in, ubyte eptype); + uint8_t epno, bool in, uint8_t eptype); static void dm320_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep); static int dm320_getframe(struct usbdev_s *dev); static int dm320_wakeup(struct usbdev_s *dev); -static int dm320_selfpowered(struct usbdev_s *dev, boolean selfpowered); -static int dm320_pullup(struct usbdev_s *dev, boolean enable); +static int dm320_selfpowered(struct usbdev_s *dev, bool selfpowered); +static int dm320_pullup(struct usbdev_s *dev, bool enable); /******************************************************************************* * Private Data @@ -419,15 +421,15 @@ static const struct dm320_epinfo_s g_epinfo[DM320_NENDPOINTS] = *******************************************************************************/ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static ubyte dm320_getreg8(uint32 addr) +static uint8_t dm320_getreg8(uint32_t addr) { - static uint32 prevaddr = 0; - static ubyte preval = 0; - static uint32 count = 0; + static uint32_t prevaddr = 0; + static uint8_t preval = 0; + static uint32_t count = 0; /* Read the value from the register */ - ubyte val = getreg8(addr); + uint8_t val = getreg8(addr); /* Is this the same value that we read from the same registe last time? Are * we polling the register? If so, suppress some of the output. @@ -481,15 +483,15 @@ static ubyte dm320_getreg8(uint32 addr) *******************************************************************************/ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint32 dm320_getreg16(uint32 addr) +static uint32_t dm320_getreg16(uint32_t addr) { - static uint32 prevaddr = 0; - static uint16 preval = 0; - static uint32 count = 0; + static uint32_t prevaddr = 0; + static uint16_t preval = 0; + static uint32_t count = 0; /* Read the value from the register */ - uint16 val = getreg16(addr); + uint16_t val = getreg16(addr); /* Is this the same value that we read from the same registe last time? Are * we polling the register? If so, suppress some of the output. @@ -543,15 +545,15 @@ static uint32 dm320_getreg16(uint32 addr) *******************************************************************************/ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint32 dm320_getreg32(uint32 addr) +static uint32_t dm320_getreg32(uint32_t addr) { - static uint32 prevaddr = 0; - static uint32 preval = 0; - static uint32 count = 0; + static uint32_t prevaddr = 0; + static uint32_t preval = 0; + static uint32_t count = 0; /* Read the value from the register */ - uint32 val = getreg32(addr); + uint32_t val = getreg32(addr); /* Is this the same value that we read from the same registe last time? Are * we polling the register? If so, suppress some of the output. @@ -605,7 +607,7 @@ static uint32 dm320_getreg32(uint32 addr) *******************************************************************************/ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static void dm320_putreg8(ubyte val, uint32 addr) +static void dm320_putreg8(uint8_t val, uint32_t addr) { /* Show the register value being written */ @@ -626,7 +628,7 @@ static void dm320_putreg8(ubyte val, uint32 addr) *******************************************************************************/ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static void dm320_putreg16(uint16 val, uint32 addr) +static void dm320_putreg16(uint16_t val, uint32_t addr) { /* Show the register value being written */ @@ -647,7 +649,7 @@ static void dm320_putreg16(uint16 val, uint32 addr) *******************************************************************************/ #if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static void dm320_putreg32(uint32 val, uint32 addr) +static void dm320_putreg32(uint32_t val, uint32_t addr) { /* Show the register value being written */ @@ -717,11 +719,11 @@ static void dm320_rqenqueue(FAR struct dm320_ep_s *privep, * *******************************************************************************/ -static int dm320_ep0write(ubyte *buf, uint16 nbytes) +static int dm320_ep0write(uint8_t *buf, uint16_t nbytes) { - ubyte csr0 = USB_PERCSR0_TXPKTRDY; /* XMT packet ready bit */ - uint16 bytesleft; - uint16 nwritten; + uint8_t csr0 = USB_PERCSR0_TXPKTRDY; /* XMT packet ready bit */ + uint16_t bytesleft; + uint16_t nwritten; if ( nbytes <= DM320_EP0MAXPACKET) { @@ -752,10 +754,10 @@ static int dm320_ep0write(ubyte *buf, uint16 nbytes) * *******************************************************************************/ -static int dm320_epwrite(ubyte epphy, ubyte *buf, uint16 nbytes) +static int dm320_epwrite(uint8_t epphy, uint8_t *buf, uint16_t nbytes) { - volatile ubyte *fifo; - uint16 bytesleft; + volatile uint8_t *fifo; + uint16_t bytesleft; int ret = ERROR; if (/*epphy < USB_EP0_SELECT || */ epphy >= DM320_NENDPOINTS) @@ -776,7 +778,7 @@ static int dm320_epwrite(ubyte epphy, ubyte *buf, uint16 nbytes) } ret = bytesleft; - fifo = (volatile ubyte *)DM320_USB_FIFO0; + fifo = (volatile uint8_t *)DM320_USB_FIFO0; fifo = fifo + (epphy << 2); if (dm320_getreg8(DM320_USB_PERTXCSR1) & USB_TXCSR1_FIFOEMP) @@ -803,9 +805,9 @@ static int dm320_epwrite(ubyte epphy, ubyte *buf, uint16 nbytes) * *******************************************************************************/ -static int dm320_epread(ubyte epphy, ubyte *buf, uint16 nbytes) +static int dm320_epread(uint8_t epphy, uint8_t *buf, uint16_t nbytes) { - volatile ubyte *fifo; + volatile uint8_t *fifo; int bytesleft; int ret = ERROR; @@ -834,7 +836,7 @@ static int dm320_epread(ubyte epphy, ubyte *buf, uint16 nbytes) } ret = bytesleft; - fifo = (ubyte*)DM320_USB_FIFO0; + fifo = (uint8_t*)DM320_USB_FIFO0; fifo = fifo + (epphy << 2); while (bytesleft > 0) @@ -858,10 +860,10 @@ static int dm320_epread(ubyte epphy, ubyte *buf, uint16 nbytes) *******************************************************************************/ static inline void dm320_abortrequest(struct dm320_ep_s *privep, - struct dm320_req_s *privreq, - sint16 result) + struct dm320_req_s *privreq, + int16_t result) { - usbtrace(TRACE_DEVERROR(DM320_TRACEERR_REQABORTED), (uint16)privep->epphy); + usbtrace(TRACE_DEVERROR(DM320_TRACEERR_REQABORTED), (uint16_t)privep->epphy); /* Save the result in the request structure */ @@ -880,7 +882,7 @@ static inline void dm320_abortrequest(struct dm320_ep_s *privep, * *******************************************************************************/ -static void dm320_reqcomplete(struct dm320_ep_s *privep, sint16 result) +static void dm320_reqcomplete(struct dm320_ep_s *privep, int16_t result) { struct dm320_req_s *privreq; int stalled = privep->stalled; @@ -935,7 +937,7 @@ static void dm320_reqcomplete(struct dm320_ep_s *privep, sint16 result) static int dm320_wrrequest(struct dm320_ep_s *privep) { struct dm320_req_s *privreq; - ubyte *buf; + uint8_t *buf; int nbytes; int bytesleft; int nbyteswritten; @@ -1026,7 +1028,7 @@ static int dm320_wrrequest(struct dm320_ep_s *privep) static int dm320_rdrequest(struct dm320_ep_s *privep) { struct dm320_req_s *privreq; - ubyte *buf; + uint8_t *buf; int nbytesread; /* Check the request from the head of the endpoint request queue */ @@ -1092,7 +1094,7 @@ static void dm320_cancelrequests(struct dm320_ep_s *privep) *******************************************************************************/ static struct dm320_ep_s *dm320_epfindbyaddr(struct dm320_usbdev_s *priv, - uint16 eplog) + uint16_t eplog) { struct dm320_ep_s *privep; int i; @@ -1166,9 +1168,9 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv) struct dm320_req_s *privreq = dm320_rqpeek(ep0); struct dm320_ep_s *privep; struct usb_ctrlreq_s ctrl; - uint16 index; - uint16 value; - uint16 len; + uint16_t index; + uint16_t value; + uint16_t len; int ret; /* Starting a control request? */ @@ -1182,7 +1184,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv) while (!dm320_rqempty(ep0)) { - sint16 result = OK; + int16_t result = OK; if (privreq->req.xfrd != privreq->req.len) { result = -EPROTO; @@ -1199,7 +1201,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv) /* Read EP0 data */ - ret = dm320_epread(USB_EP0_SELECT, (ubyte*)&ctrl, USB_SIZEOF_CTRLREQ); + ret = dm320_epread(USB_EP0_SELECT, (uint8_t*)&ctrl, USB_SIZEOF_CTRLREQ); if (ret <= 0) { return; @@ -1285,7 +1287,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv) */ dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_DATAEND, DM320_USB_PERCSR0); - usbtrace(TRACE_INTDECODE(DM320_TRACEINTID_CLEARFEATURE), (uint16)ctrl.req); + usbtrace(TRACE_INTDECODE(DM320_TRACEINTID_CLEARFEATURE), (uint16_t)ctrl.req); if (ctrl.type != USB_REQ_RECIPIENT_ENDPOINT) { dm320_dispatchrequest(priv, &ctrl); @@ -1433,7 +1435,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv) * *******************************************************************************/ -static inline uint32 dm320_highestpriinterrupt(int intstatus) +static inline uint32_t dm320_highestpriinterrupt(int intstatus) { if ((intstatus & USB_INT_CONNECTED) != 0) return USB_INT_CONNECTED; @@ -1473,17 +1475,17 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context) { struct dm320_usbdev_s *priv = &g_usbdev; struct dm320_ep_s *privep ; - uint32 intstatus; - uint32 priorityint; - ubyte csr0; + uint32_t intstatus; + uint32_t priorityint; + uint8_t csr0; usbtrace(TRACE_INTENTRY(DM320_TRACEINTID_USBCTLR), 0); /* Combine interretup registers into one interrupt status value */ - intstatus = ((uint32)dm320_getreg8(DM320_USB_INTRTX1) << 12) | - (((uint32)dm320_getreg8(DM320_USB_INTRRX1) >> 1) << 8) | - (uint32)dm320_getreg8(DM320_USB_INTRUSB); + intstatus = ((uint32_t)dm320_getreg8(DM320_USB_INTRTX1) << 12) | + (((uint32_t)dm320_getreg8(DM320_USB_INTRRX1) >> 1) << 8) | + (uint32_t)dm320_getreg8(DM320_USB_INTRUSB); /* Then process each interrupt source, highest priority first */ do @@ -1639,7 +1641,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context) static int dm320_attachinterrupt(int irq, FAR void *context) { struct dm320_usbdev_s *priv = &g_usbdev; - uint16 gio; + uint16_t gio; /* Check if the USB device was connected to or disconnected from a host */ @@ -1708,9 +1710,9 @@ static void dm320_epreset(unsigned int index) static inline void dm320_epinitialize(struct dm320_usbdev_s *priv) { - uint16 offset; /* Full USB buffer offset */ - ubyte addrhi; /* MS bytes of ofset */ - ubyte addrlo; /* LS bytes of offset */ + uint16_t offset; /* Full USB buffer offset */ + uint8_t addrhi; /* MS bytes of ofset */ + uint8_t addrlo; /* LS bytes of offset */ int i; /* Initialize endpoint 0 */ @@ -1862,7 +1864,7 @@ static void dm320_ctrlinitialize(FAR struct dm320_usbdev_s *priv) * Input Parameters: * ep - the struct usbdev_ep_s instance obtained from allocep() * desc - A struct usb_epdesc_s instance describing the endpoint - * last - TRUE if this this last endpoint to be configured. Some hardware + * last - true if this this last endpoint to be configured. Some hardware * needs to take special action when all of the endpoints have been * configured. * @@ -1870,7 +1872,7 @@ static void dm320_ctrlinitialize(FAR struct dm320_usbdev_s *priv) static int dm320_epconfigure(FAR struct usbdev_ep_s *ep, FAR const struct usb_epdesc_s *desc, - boolean last) + bool last) { FAR struct dm320_ep_s *privep = (FAR struct dm320_ep_s *)ep; @@ -2141,14 +2143,14 @@ static int dm320_epcancel(struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) * eplog - 7-bit logical endpoint number (direction bit ignored). Zero means * that any endpoint matching the other requirements will suffice. The * assigned endpoint can be found in the eplog field. - * in - TRUE: IN (device-to-host) endpoint requested + * in - true: IN (device-to-host) endpoint requested * eptype - Endpoint type. One of {USB_EP_ATTR_XFER_ISOC, USB_EP_ATTR_XFER_BULK, * USB_EP_ATTR_XFER_INT} * *******************************************************************************/ -static FAR struct usbdev_ep_s *dm320_allocep(FAR struct usbdev_s *dev, ubyte eplog, - boolean in, ubyte eptype) +static FAR struct usbdev_ep_s *dm320_allocep(FAR struct usbdev_s *dev, uint8_t eplog, + bool in, uint8_t eptype) { FAR struct dm320_usbdev_s *priv = (FAR struct dm320_usbdev_s *)dev; int ndx; @@ -2212,7 +2214,7 @@ static FAR struct usbdev_ep_s *dm320_allocep(FAR struct usbdev_s *dev, ubyte epl static void dm320_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { FAR struct dm320_ep_s *privep = (FAR struct dm320_ep_s *)ep; - usbtrace(TRACE_DEVFREEEP, (uint16)privep->epphy); + usbtrace(TRACE_DEVFREEEP, (uint16_t)privep->epphy); /* Nothing needs to be done */ } @@ -2278,11 +2280,11 @@ static int dm320_wakeup(struct usbdev_s *dev) * *******************************************************************************/ -static int dm320_selfpowered(struct usbdev_s *dev, boolean selfpowered) +static int dm320_selfpowered(struct usbdev_s *dev, bool selfpowered) { struct dm320_usbdev_s *priv = &g_usbdev; - usbtrace(TRACE_DEVSELFPOWERED, (uint16)selfpowered); + usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered); #ifdef CONFIG_DEBUG if (!dev) @@ -2305,11 +2307,11 @@ static int dm320_selfpowered(struct usbdev_s *dev, boolean selfpowered) *******************************************************************************/ #ifdef CONFIG_DM320_GIO_USBDPPULLUP -static int dm320_pullup(struct usbdev_s *dev, boolean enable) +static int dm320_pullup(struct usbdev_s *dev, bool enable) { irqstate_t flags; - usbtrace(TRACE_DEVPULLUP, (uint16)enable); + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); flags = irqsave(); if (enable) @@ -2343,7 +2345,7 @@ void up_usbinitialize(void) struct dm320_usbdev_s *priv = &g_usbdev; struct dm320_ep_s *privep; #ifdef CONFIG_DEBUG_USB - uint16 chiprev; + uint16_t chiprev; #endif int i; @@ -2507,7 +2509,7 @@ int usbdev_register(FAR struct usbdevclass_driver_s *driver) ret = CLASS_BIND(driver, &g_usbdev.usbdev); if (ret) { - usbtrace(TRACE_DEVERROR(DM320_TRACEERR_BINDFAILED), (uint16)-ret); + usbtrace(TRACE_DEVERROR(DM320_TRACEERR_BINDFAILED), (uint16_t)-ret); g_usbdev.driver = NULL; return ret; } diff --git a/arch/arm/src/imx/imx_allocateheap.c b/arch/arm/src/imx/imx_allocateheap.c index 84f2b7b5a3..fcf0117ffd 100644 --- a/arch/arm/src/imx/imx_allocateheap.c +++ b/arch/arm/src/imx/imx_allocateheap.c @@ -39,7 +39,9 @@ ****************************************************************************/ #include + #include +#include #include #include #include @@ -48,7 +50,7 @@ #include "up_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -98,8 +100,8 @@ void up_addregion(void) #if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM) # if (CONFIG_DRAM_NUTTXENTRY & 0xffff0000) != CONFIG_DRAM_VSTART - uint32 start = CONFIG_DRAM_VSTART + 0x1000; - uint32 end = (CONFIG_DRAM_NUTTXENTRY & 0xffff0000); + uint32_t start = CONFIG_DRAM_VSTART + 0x1000; + uint32_t end = (CONFIG_DRAM_NUTTXENTRY & 0xffff0000); mm_addregion((FAR void*)start, end - start); # endif #endif diff --git a/arch/arm/src/imx/imx_boot.c b/arch/arm/src/imx/imx_boot.c index a463dcf348..4979d77605 100644 --- a/arch/arm/src/imx/imx_boot.c +++ b/arch/arm/src/imx/imx_boot.c @@ -15,7 +15,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -39,13 +39,13 @@ ************************************************************************************/ #include -#include +#include #include "up_internal.h" #include "up_arch.h" /************************************************************************************ - * Private Types + * Pre-processor Definitions ************************************************************************************/ /************************************************************************************ @@ -54,18 +54,18 @@ struct section_mapping_s { - uint32 physbase; /* Physical address of the region to be mapped */ - uint32 virtbase; /* Virtual address of the region to be mapped */ - uint32 mmuflags; /* MMU settings for the region (e.g., cache-able) */ - uint32 nsections; /* Number of mappings in the region */ + uint32_t physbase; /* Physical address of the region to be mapped */ + uint32_t virtbase; /* Virtual address of the region to be mapped */ + uint32_t mmuflags; /* MMU settings for the region (e.g., cache-able) */ + uint32_t nsections; /* Number of mappings in the region */ }; /************************************************************************************ * Public Variables ************************************************************************************/ -extern uint32 _vector_start; /* Beginning of vector block */ -extern uint32 _vector_end; /* End+1 of vector block */ +extern uint32_t _vector_start; /* Beginning of vector block */ +extern uint32_t _vector_end; /* End+1 of vector block */ /************************************************************************************ * Private Variables @@ -114,10 +114,10 @@ extern void imx_boardinitialize(void); * Name: up_setlevel1entry ************************************************************************************/ -static inline void up_setlevel1entry(uint32 paddr, uint32 vaddr, uint32 mmuflags) +static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags) { - uint32 *pgtable = (uint32*)PGTABLE_VBASE; - uint32 index = vaddr >> 20; + uint32_t *pgtable = (uint32_t*)PGTABLE_VBASE; + uint32_t index = vaddr >> 20; /* Save the page table entry */ @@ -134,9 +134,9 @@ static void up_setupmappings(void) for (i = 0; i < NMAPPINGS; i++) { - uint32 sect_paddr = section_mapping[i].physbase; - uint32 sect_vaddr = section_mapping[i].virtbase; - uint32 mmuflags = section_mapping[i].mmuflags; + uint32_t sect_paddr = section_mapping[i].physbase; + uint32_t sect_vaddr = section_mapping[i].virtbase; + uint32_t mmuflags = section_mapping[i].mmuflags; for (j = 0; j < section_mapping[i].nsections; j++) { @@ -178,9 +178,9 @@ static void up_copyvectorblock(void) */ #if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM) - uint32 *src = (uint32*)&_vector_start; - uint32 *end = (uint32*)&_vector_end; - uint32 *dest = (uint32*)VECTOR_BASE; + uint32_t *src = (uint32_t*)&_vector_start; + uint32_t *end = (uint32_t*)&_vector_end; + uint32_t *dest = (uint32_t*)VECTOR_BASE; while (src < end) { diff --git a/arch/arm/src/imx/imx_cspi.h b/arch/arm/src/imx/imx_cspi.h index 71f9ad7cc8..e0d97f2d44 100755 --- a/arch/arm/src/imx/imx_cspi.h +++ b/arch/arm/src/imx/imx_cspi.h @@ -41,11 +41,13 @@ ************************************************************************************/ #ifndef __ASSEMBLY__ +# include +# include # include #endif /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* CSPI Register Offsets ************************************************************/ @@ -189,8 +191,8 @@ extern "C" { * for example, will bind the SPI driver to the SPI MMC/SD driver). */ -EXTERN void imx_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected); -EXTERN ubyte imx_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +EXTERN void imx_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +EXTERN uint8_t imx_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/imx/imx_decodeirq.c b/arch/arm/src/imx/imx_decodeirq.c index 7d2ba81dd7..4657d18da1 100644 --- a/arch/arm/src/imx/imx_decodeirq.c +++ b/arch/arm/src/imx/imx_decodeirq.c @@ -39,7 +39,8 @@ ********************************************************************************/ #include -#include + +#include #include #include #include @@ -50,7 +51,7 @@ #include "up_internal.h" /******************************************************************************** - * Definitions + * Pre-processor Definitions ********************************************************************************/ /******************************************************************************** @@ -69,15 +70,15 @@ * Public Funtions ********************************************************************************/ -void up_decodeirq(uint32* regs) +void up_decodeirq(uint32_t* regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS lib_lowprintf("Unexpected IRQ\n"); current_regs = regs; PANIC(OSERR_ERREXCEPTION); #else - uint32 regval; - int irq; + uint32_t regval; + int irq; /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. diff --git a/arch/arm/src/imx/imx_gpio.c b/arch/arm/src/imx/imx_gpio.c index 65d1b3d10b..9ca86e1207 100644 --- a/arch/arm/src/imx/imx_gpio.c +++ b/arch/arm/src/imx/imx_gpio.c @@ -39,13 +39,12 @@ ****************************************************************************/ #include -#include #include "up_arch.h" #include "imx_gpio.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/imx/imx_gpio.h b/arch/arm/src/imx/imx_gpio.h index e8da7c46fe..26c1c43465 100755 --- a/arch/arm/src/imx/imx_gpio.h +++ b/arch/arm/src/imx/imx_gpio.h @@ -41,10 +41,13 @@ * Included Files ************************************************************************************/ +#ifndef __ASSEMBLY__ +# include +#endif #include "up_arch.h" /* getreg32(), putreg32() */ /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* GPIO Register Offsets ************************************************************/ @@ -197,14 +200,14 @@ static inline void imxgpio_dirout(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_DDIR(port)); + uint32_t regval = getreg32(IMX_GPIO_DDIR(port)); regval |= (1 << bit); putreg32(regval, IMX_GPIO_DDIR(port)); } static inline void imxgpio_dirin(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_DDIR(port)); + uint32_t regval = getreg32(IMX_GPIO_DDIR(port)); regval &= ~(1 << bit); putreg32(regval, IMX_GPIO_DDIR(port)); } @@ -213,9 +216,9 @@ static inline void imxgpio_dirin(int port, int bit) static inline void imxgpio_ocrain(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -235,9 +238,9 @@ static inline void imxgpio_ocrain(int port, int bit) static inline void imxgpio_ocrbin(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -258,9 +261,9 @@ static inline void imxgpio_ocrbin(int port, int bit) static inline void imxgpio_ocrcin(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -281,9 +284,9 @@ static inline void imxgpio_ocrcin(int port, int bit) static inline void imxgpio_ocrodrin(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -305,9 +308,9 @@ static inline void imxgpio_ocrodrin(int port, int bit) static inline void imxgpio_aoutgpio(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -327,9 +330,9 @@ static inline void imxgpio_aoutgpio(int port, int bit) static inline void imxgpio_aoutisr(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -350,9 +353,9 @@ static inline void imxgpio_aoutisr(int port, int bit) static inline void imxgpio_aout0(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -373,9 +376,9 @@ static inline void imxgpio_aout0(int port, int bit) static inline void imxgpio_aout1(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -395,9 +398,9 @@ static inline void imxgpio_aout1(int port, int bit) static inline void imxgpio_boutgpio(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -417,9 +420,9 @@ static inline void imxgpio_boutgpio(int port, int bit) static inline void imxgpio_boutisr(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -440,9 +443,9 @@ static inline void imxgpio_boutisr(int port, int bit) static inline void imxgpio_bout0(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -463,9 +466,9 @@ static inline void imxgpio_bout0(int port, int bit) static inline void imxgpio_bout1(int port, int bit) { - uint32 regval; - uint32 regaddr; - int shift; + uint32_t regval; + uint32_t regaddr; + int shift; if (bit < 16) { @@ -490,28 +493,28 @@ static inline void imxgpio_bout1(int port, int bit) static inline void imxgpio_gpiofunc(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_GIUS(port)); + uint32_t regval = getreg32(IMX_GPIO_GIUS(port)); regval |= (1 << bit); putreg32(regval, IMX_GPIO_GIUS(port)); } static inline void imxgpio_peripheralfunc(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_GIUS(port)); + uint32_t regval = getreg32(IMX_GPIO_GIUS(port)); regval &= ~(1 << bit); putreg32(regval, IMX_GPIO_GIUS(port)); } static inline void imxgpio_altperipheralfunc(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_GPR(port)); + uint32_t regval = getreg32(IMX_GPIO_GPR(port)); regval |= (1 << bit); putreg32(regval, IMX_GPIO_GPR(port)); } static inline void imxgpio_primaryperipheralfunc(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_GPR(port)); + uint32_t regval = getreg32(IMX_GPIO_GPR(port)); regval &= ~(1 << bit); putreg32(regval, IMX_GPIO_GPR(port)); } @@ -520,28 +523,28 @@ static inline void imxgpio_primaryperipheralfunc(int port, int bit) static inline void imxgpio_pullupenable(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_PUEN(port)); + uint32_t regval = getreg32(IMX_GPIO_PUEN(port)); regval |= (1 << bit); putreg32(regval, IMX_GPIO_PUEN(port)); } static inline void imxgpio_pullupdisable(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_PUEN(port)); + uint32_t regval = getreg32(IMX_GPIO_PUEN(port)); regval &= ~(1 << bit); putreg32(regval, IMX_GPIO_PUEN(port)); } static inline void imxgpio_setoutput(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_DR(port)); + uint32_t regval = getreg32(IMX_GPIO_DR(port)); regval |= (1 << bit); putreg32(regval, IMX_GPIO_DR(port)); } static inline void imxgpio_clroutput(int port, int bit) { - uint32 regval = getreg32(IMX_GPIO_DR(port)); + uint32_t regval = getreg32(IMX_GPIO_DR(port)); regval &= ~(1 << bit); putreg32(regval, IMX_GPIO_DR(port)); } diff --git a/arch/arm/src/imx/imx_irq.c b/arch/arm/src/imx/imx_irq.c index 2e53db08e6..2793438ed1 100644 --- a/arch/arm/src/imx/imx_irq.c +++ b/arch/arm/src/imx/imx_irq.c @@ -39,7 +39,8 @@ ****************************************************************************/ #include -#include + +#include #include #include "up_arch.h" @@ -47,14 +48,14 @@ #include "up_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data diff --git a/arch/arm/src/imx/imx_serial.c b/arch/arm/src/imx/imx_serial.c index 70dcb5f1ca..5a03a70bb1 100644 --- a/arch/arm/src/imx/imx_serial.c +++ b/arch/arm/src/imx/imx_serial.c @@ -41,6 +41,8 @@ #include #include +#include +#include #include #include #include @@ -60,7 +62,7 @@ #ifdef CONFIG_USE_SERIALDRIVER /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Configuration ************************************************************/ @@ -77,46 +79,46 @@ struct up_dev_s { - uint32 uartbase; /* Base address of UART registers */ - uint32 baud; /* Configured baud */ - uint32 ucr1; /* Saved UCR1 value */ + uint32_t uartbase; /* Base address of UART registers */ + uint32_t baud; /* Configured baud */ + uint32_t ucr1; /* Saved UCR1 value */ #if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL) - ubyte rxirq; /* Rx IRQ associated with this UART */ - ubyte txirq; /* Tx IRQ associated with this UART */ + uint8_t rxirq; /* Rx IRQ associated with this UART */ + uint8_t txirq; /* Tx IRQ associated with this UART */ #else - ubyte irq; /* IRQ associated with this UART */ + uint8_t irq; /* IRQ associated with this UART */ #endif - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - ubyte stopbits2:1; /* 1: Configure with 2 stop bits vs 1 */ - ubyte hwfc:1; /* 1: Hardware flow control */ - ubyte reserved:6; + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + uint8_t stopbits2:1; /* 1: Configure with 2 stop bits vs 1 */ + uint8_t hwfc:1; /* 1: Hardware flow control */ + uint8_t reserved:6; }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static inline uint32 up_serialin(struct up_dev_s *priv, uint32 offset); -static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint32 value); -static inline void up_disableuartint(struct up_dev_s *priv, uint32 *ucr1); -static inline void up_restoreuartint(struct up_dev_s *priv, uint32 ucr1); +static inline uint32_t up_serialin(struct up_dev_s *priv, uint32_t offset); +static inline void up_serialout(struct up_dev_s *priv, uint32_t offset, uint32_t value); +static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *ucr1); +static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t ucr1); static inline void up_waittxready(struct up_dev_s *priv); -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); static inline struct uart_dev_s *up_mapirq(int irq); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -372,7 +374,7 @@ static uart_dev_t g_uart3port = * Name: up_serialin ****************************************************************************/ -static inline uint32 up_serialin(struct up_dev_s *priv, uint32 offset) +static inline uint32_t up_serialin(struct up_dev_s *priv, uint32_t offset) { return getreg32(priv->uartbase + offset); } @@ -381,7 +383,7 @@ static inline uint32 up_serialin(struct up_dev_s *priv, uint32 offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint32 value) +static inline void up_serialout(struct up_dev_s *priv, uint32_t offset, uint32_t value) { putreg32(value, priv->uartbase + offset); } @@ -390,7 +392,7 @@ static inline void up_serialout(struct up_dev_s *priv, uint32 offset, uint32 val * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, uint32 *ucr1) +static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *ucr1) { /* Return the current Rx and Tx interrupt state */ @@ -409,7 +411,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint32 *ucr1) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, uint32 ucr1) +static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t ucr1) { /* Enable/disable any interrupts that are currently disabled but should be * enabled/disabled. @@ -451,11 +453,11 @@ static int up_setup(struct uart_dev_s *dev) { #ifndef CONFIG_SUPPRESS_UART_CONFIG struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 regval; - uint32 ucr2; - uint32 div; - uint32 num; - uint32 den; + uint32_t regval; + uint32_t ucr2; + uint32_t div; + uint32_t num; + uint32_t den; /* Disable the UART */ @@ -564,7 +566,7 @@ static int up_setup(struct uart_dev_s *dev) { /* b16 is a scale such that b16*num = 0x10000 * 2**16 */ - uint32 b16 = 0x100000000LL / num; + uint32_t b16 = 0x100000000LL / num; num = 0x00010000; den = (b16 * den) >> 16; } @@ -575,7 +577,7 @@ static int up_setup(struct uart_dev_s *dev) { /* b16 is a scale such that b16*den = 0x10000 * 2**16 */ - uint32 b16 = 0x100000000LL / den; + uint32_t b16 = 0x100000000LL / den; num = (b16 * num) >> 16; den = 0x00010000; } @@ -818,7 +820,7 @@ static int up_interrupt(int irq, void *context) { struct uart_dev_s *dev; struct up_dev_s *priv; - uint32 usr1; + uint32_t usr1; int passes = 0; dev = up_mapirq(irq); @@ -915,10 +917,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 rxd0; + uint32_t rxd0; rxd0 = up_serialin(priv, UART_RXD0); *status = rxd0; @@ -933,7 +935,7 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; @@ -956,11 +958,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; @@ -980,7 +982,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, UART_TXD0, (uint32)ch); + up_serialout(priv, UART_TXD0, (uint32_t)ch); } /**************************************************************************** @@ -991,7 +993,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; @@ -1016,11 +1018,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; @@ -1033,11 +1035,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; @@ -1113,7 +1115,7 @@ void up_earlyserialinit(void) */ #ifdef CONSOLE_DEV - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); #endif } @@ -1156,7 +1158,7 @@ void up_serialinit(void) int up_putc(int ch) { struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint32 ier; + uint32_t ier; up_disableuartint(priv, &ier); up_waittxready(priv); @@ -1167,11 +1169,11 @@ int up_putc(int ch) { /* Add CR */ - up_serialout(priv, UART_TXD0, (uint32)'\r'); + up_serialout(priv, UART_TXD0, (uint32_t)'\r'); up_waittxready(priv); } - up_serialout(priv, UART_TXD0, (uint32)ch); + up_serialout(priv, UART_TXD0, (uint32_t)ch); up_waittxready(priv); up_restoreuartint(priv, ier); return ch; @@ -1227,11 +1229,11 @@ int up_putc(int ch) { /* Add CR */ - putreg32((uint16)'\r', IMX_REGISTER_BASE + UART_TXD0); + putreg32((uint16_t)'\r', IMX_REGISTER_BASE + UART_TXD0); up_waittxready(); } - putreg32((uint16)ch, IMX_REGISTER_BASE + UART_TXD0); + putreg32((uint16_t)ch, IMX_REGISTER_BASE + UART_TXD0); return ch; } diff --git a/arch/arm/src/imx/imx_spi.c b/arch/arm/src/imx/imx_spi.c index 46cfb69134..5f065f8866 100755 --- a/arch/arm/src/imx/imx_spi.c +++ b/arch/arm/src/imx/imx_spi.c @@ -38,7 +38,9 @@ ****************************************************************************/ #include + #include +#include #include #include @@ -56,7 +58,7 @@ #include "imx_cspi.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* The i.MX1/L supports 2 SPI interfaces. Which have been enabled? */ @@ -101,8 +103,8 @@ struct imx_spidev_s /* These following are the source and destination buffers of the transfer. * they are retained in this structure so that they will be accessible - * from an interrupt handler. The actual type of the buffer is ubyte is - * nbits <=8 and uint16 is nbits >8. + * from an interrupt handler. The actual type of the buffer is uint8_t is + * nbits <=8 and uint16_t is nbits >8. */ void *txbuffer; /* Source buffer */ @@ -118,18 +120,18 @@ struct imx_spidev_s void (*txword)(struct imx_spidev_s *priv); void (*rxword)(struct imx_spidev_s *priv); - uint32 base; /* SPI register base address */ - uint32 frequency; /* Current desired SCLK frequency */ - uint32 actual; /* Current actual SCLK frequency */ + uint32_t base; /* SPI register base address */ + uint32_t frequency; /* Current desired SCLK frequency */ + uint32_t actual; /* Current actual SCLK frequency */ int ntxwords; /* Number of words left to transfer on the Tx FIFO */ int nrxwords; /* Number of words received on the Rx FIFO */ int nwords; /* Number of words to be exchanged */ - ubyte mode; /* Current mode */ - ubyte nbits; /* Current number of bits per word */ + uint8_t mode; /* Current mode */ + uint8_t nbits; /* Current number of bits per word */ #ifndef CONFIG_SPI_POLLWAIT - ubyte irq; /* SPI IRQ number */ + uint8_t irq; /* SPI IRQ number */ #endif }; @@ -139,17 +141,17 @@ struct imx_spidev_s /* SPI register access */ -static inline uint32 spi_getreg(struct imx_spidev_s *priv, unsigned int offset); -static inline void spi_putreg(struct imx_spidev_s *priv, unsigned int offset, uint32 value); +static inline uint32_t spi_getreg(struct imx_spidev_s *priv, unsigned int offset); +static inline void spi_putreg(struct imx_spidev_s *priv, unsigned int offset, uint32_t value); /* SPI data transfer */ static void spi_txnull(struct imx_spidev_s *priv); static void spi_txuint16(struct imx_spidev_s *priv); -static void spi_txubyte(struct imx_spidev_s *priv); +static void spi_txuint8(struct imx_spidev_s *priv); static void spi_rxnull(struct imx_spidev_s *priv); -static void spi_rxuint16(struct imx_spidev_s *priv); -static void spi_rxubyte(struct imx_spidev_s *priv); +static void spi_rxuint16(struct imx_spidev_s *priv); +static void spi_rxuint8(struct imx_spidev_s *priv); static int spi_performtx(struct imx_spidev_s *priv); static inline void spi_performrx(struct imx_spidev_s *priv); static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer, @@ -164,10 +166,10 @@ static int spi_interrupt(int irq, void *context); /* SPI methods */ -static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency); +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency); static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); static void spi_setbits(FAR struct spi_dev_s *dev, int nbits); -static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd); +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd); #ifdef CONFIG_SPI_EXCHANGE static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, FAR void *rxbuffer, size_t nwords); @@ -246,7 +248,7 @@ static struct imx_spidev_s g_spidev[] = * ****************************************************************************/ -static inline uint32 spi_getreg(struct imx_spidev_s *priv, unsigned int offset) +static inline uint32_t spi_getreg(struct imx_spidev_s *priv, unsigned int offset) { return getreg32(priv->base + offset); } @@ -267,16 +269,16 @@ static inline uint32 spi_getreg(struct imx_spidev_s *priv, unsigned int offset) * ****************************************************************************/ -static inline void spi_putreg(struct imx_spidev_s *priv, unsigned int offset, uint32 value) +static inline void spi_putreg(struct imx_spidev_s *priv, unsigned int offset, uint32_t value) { putreg32(value, priv->base + offset); } /**************************************************************************** - * Name: spi_txnull, spi_txuint16, and spi_txubyte + * Name: spi_txnull, spi_txuint16, and spi_txuint8 * * Description: - * Transfer all ones, a ubyte, or uint16 to Tx FIFO and update the txbuffer + * Transfer all ones, a uint8_t, or uint16_t to Tx FIFO and update the txbuffer * pointer appropriately. The selected function dependes on (1) if there * is a source txbuffer provided, and (2) if the number of bits per * word is <=8 or >8. @@ -296,23 +298,23 @@ static void spi_txnull(struct imx_spidev_s *priv) static void spi_txuint16(struct imx_spidev_s *priv) { - uint16 *ptr = (uint16*)priv->txbuffer; + uint16_t *ptr = (uint16_t*)priv->txbuffer; spi_putreg(priv, CSPI_TXD_OFFSET, *ptr++); priv->txbuffer = (void*)ptr; } -static void spi_txubyte(struct imx_spidev_s *priv) +static void spi_txuint8(struct imx_spidev_s *priv) { - ubyte *ptr = (ubyte*)priv->txbuffer; + uint8_t *ptr = (uint8_t*)priv->txbuffer; spi_putreg(priv, CSPI_TXD_OFFSET, *ptr++); priv->txbuffer = (void*)ptr; } /**************************************************************************** - * Name: spi_rxnull, spi_rxuint16, and spi_rxubyte + * Name: spi_rxnull,spi_rxuint16, and spi_rxuint8 * * Description: - * Discard input, save a ubyte, or or save a uint16 from Tx FIFO in the + * Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the * user rxvbuffer and update the rxbuffer pointer appropriately. The * selected function dependes on (1) if there is a desination rxbuffer * provided, and (2) if the number of bits per word is <=8 or >8. @@ -330,17 +332,17 @@ static void spi_rxnull(struct imx_spidev_s *priv) (void)spi_getreg(priv, CSPI_RXD_OFFSET); } -static void spi_rxuint16(struct imx_spidev_s *priv) +static voidspi_rxuint16(struct imx_spidev_s *priv) { - uint16 *ptr = (uint16*)priv->rxbuffer; - *ptr++ = (uint16)spi_getreg(priv, CSPI_TXD_OFFSET); + uint16_t *ptr = (uint16_t*)priv->rxbuffer; + *ptr++ = (uint16_t)spi_getreg(priv, CSPI_TXD_OFFSET); priv->rxbuffer = (void*)ptr; } -static void spi_rxubyte(struct imx_spidev_s *priv) +static void spi_rxuint8(struct imx_spidev_s *priv) { - ubyte *ptr = (ubyte*)priv->rxbuffer; - *ptr++ = (ubyte)spi_getreg(priv, CSPI_TXD_OFFSET); + uint8_t *ptr = (uint8_t*)priv->rxbuffer; + *ptr++ = (uint8_t)spi_getreg(priv, CSPI_TXD_OFFSET); priv->rxbuffer = (void*)ptr; } @@ -362,7 +364,7 @@ static void spi_rxubyte(struct imx_spidev_s *priv) static int spi_performtx(struct imx_spidev_s *priv) { - uint32 regval; + uint32_t regval; int ntxd = 0; /* Number of words written to Tx FIFO */ /* Check if the Tx FIFO is empty */ @@ -448,7 +450,7 @@ static inline void spi_performrx(struct imx_spidev_s *priv) static void spi_startxfr(struct imx_spidev_s *priv, int ntxd) { - uint32 regval; + uint32_t regval; /* The XCH bit initiates an exchange in master mode. It remains set * remains set while the exchange is in progress but is automatically @@ -476,9 +478,9 @@ static void spi_startxfr(struct imx_spidev_s *priv, int ntxd) * txbuffer - The buffer of data to send to the device (may be NULL). * rxbuffer - The buffer to receive data from the device (may be NULL). * nwords - The total number of words to be exchanged. If the interface - * uses <= 8 bits per word, then this is the number of ubytes; + * uses <= 8 bits per word, then this is the number of uint8_t's; * if the interface uses >8 bits per word, then this is the - * number of uint16's + * number of uint16_t's * * Returned Value: * 0: success, <0:Negated error number on failure @@ -491,14 +493,14 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer, #ifndef CONFIG_SPI_POLLWAIT irqstate_t flags; #endif - uint32 regval; + uint32_t regval; int ntxd; int ret; /* Set up to perform the transfer */ - priv->txbuffer = (ubyte*)txbuffer; /* Source buffer */ - priv->rxbuffer = (ubyte*)rxbuffer; /* Destination buffer */ + priv->txbuffer = (uint8_t*)txbuffer; /* Source buffer */ + priv->rxbuffer = (uint8_t*)rxbuffer; /* Destination buffer */ priv->ntxwords = nwords; /* Number of words left to send */ priv->nrxwords = 0; /* Number of words received */ priv->nwords = nwords; /* Total number of exchanges */ @@ -508,12 +510,12 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer, if (priv->nbits > 8) { priv->txword = spi_txuint16; - priv->rxword = spi_rxuint16; + priv->rxword =spi_rxuint16; } else { - priv->txword = spi_txubyte; - priv->rxword = spi_rxubyte; + priv->txword = spi_txuint8; + priv->rxword = spi_rxuint8; } if (!txbuffer) @@ -629,9 +631,9 @@ static inline struct imx_spidev_s *spi_mapirq(int irq) * txbuffer - The buffer of data to send to the device (may be NULL). * rxbuffer - The buffer to receive data from the device (may be NULL). * nwords - The total number of words to be exchanged. If the interface - * uses <= 8 bits per word, then this is the number of ubytes; + * uses <= 8 bits per word, then this is the number of uint8_t's; * if the interface uses >8 bits per word, then this is the - * number of uint16's + * number of uint16_t's * * Returned Value: * 0: success, <0:Negated error number on failure @@ -685,15 +687,15 @@ static int spi_interrupt(int irq, void *context) * ****************************************************************************/ -static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) { struct imx_spidev_s *priv = (struct imx_spidev_s *)dev; - uint32 actual = priv->actual; + uint32_t actual = priv->actual; if (priv && frequency != priv->frequency) { - uint32 freqbits; - uint32 regval; + uint32_t freqbits; + uint32_t regval; if (frequency >= IMX_PERCLK2_FREQ / 4) { @@ -770,8 +772,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) struct imx_spidev_s *priv = (struct imx_spidev_s *)dev; if (priv && mode != priv->mode) { - uint32 modebits; - uint32 regval; + uint32_t modebits; + uint32_t regval; /* Select the CTL register bits based on the selected mode */ @@ -826,7 +828,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) struct imx_spidev_s *priv = (struct imx_spidev_s *)dev; if (priv && nbits != priv->nbits && nbits > 0 && nbits <= 16) { - uint32 regval = spi_getreg(priv, CSPI_CTRL_OFFSET); + uint32_t regval = spi_getreg(priv, CSPI_CTRL_OFFSET); regval &= ~CSPI_CTRL_BITCOUNT_MASK; regval |= ((nbits - 1) << CSPI_CTRL_BITCOUNT_SHIFT); spi_putreg(priv, CSPI_CTRL_OFFSET, regval); @@ -850,10 +852,10 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) * ****************************************************************************/ -static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd) +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) { struct imx_spidev_s *priv = (struct imx_spidev_s*)dev; - uint16 response = 0; + uint16_t response = 0; (void)spi_transfer(priv, &wd, &response, 1); return response; @@ -872,7 +874,7 @@ static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd) * nwords - the length of data that to be exchanged in units of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -900,7 +902,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, * nwords - the length of data to send from the buffer in number of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -927,7 +929,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size * nwords - the length of data that can be received in the buffer in number * of words. The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -971,7 +973,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw FAR struct spi_dev_s *up_spiinitialize(int port) { struct imx_spidev_s *priv; - ubyte regval; + uint8_t regval; /* Only the SPI1 interface is supported */ diff --git a/arch/arm/src/imx/imx_timerisr.c b/arch/arm/src/imx/imx_timerisr.c index c1543925a6..74429ef5ec 100644 --- a/arch/arm/src/imx/imx_timerisr.c +++ b/arch/arm/src/imx/imx_timerisr.c @@ -39,7 +39,8 @@ ****************************************************************************/ #include -#include + +#include #include #include #include @@ -49,7 +50,7 @@ #include "up_arch.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -73,9 +74,9 @@ * ****************************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { - uint32 tstat; + uint32_t tstat; int ret = -EIO; /* Get and clear the interrupt status */ @@ -107,7 +108,7 @@ int up_timerisr(int irq, uint32 *regs) void up_timerinit(void) { - uint32 tctl; + uint32_t tctl; /* Make sure the timer interrupts are disabled */ diff --git a/arch/arm/src/lm3s/chip.h b/arch/arm/src/lm3s/chip.h index 21cf9baadc..d96b6fb0fb 100644 --- a/arch/arm/src/lm3s/chip.h +++ b/arch/arm/src/lm3s/chip.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Get customizations for each supported chip (only the LM3S6918 right now) */ diff --git a/arch/arm/src/lm3s/lm3s_dumpgpio.c b/arch/arm/src/lm3s/lm3s_dumpgpio.c index e58a5ceb7c..f7bb7c7d73 100644 --- a/arch/arm/src/lm3s/lm3s_dumpgpio.c +++ b/arch/arm/src/lm3s/lm3s_dumpgpio.c @@ -38,8 +38,9 @@ ****************************************************************************/ #include -#include +#include +#include #include #include @@ -50,7 +51,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -59,7 +60,7 @@ /* NOTE: this is duplicated in lm3s_gpio.c */ -static const uint32 g_gpiobase[8] = +static const uint32_t g_gpiobase[8] = { LM3S_GPIOA_BASE, LM3S_GPIOB_BASE, LM3S_GPIOC_BASE, LM3S_GPIOD_BASE, LM3S_GPIOE_BASE, LM3S_GPIOF_BASE, LM3S_GPIOG_BASE, LM3S_GPIOH_BASE, @@ -80,7 +81,7 @@ static const char g_portchar[8] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' }; * ****************************************************************************/ -static inline uint32 lm3s_gpiobaseaddress(int port) +static inline uint32_t lm3s_gpiobaseaddress(int port) { return g_gpiobase[port & 7]; } @@ -94,7 +95,7 @@ static inline uint32 lm3s_gpiobaseaddress(int port) * ****************************************************************************/ -static inline ubyte lm3s_gpioport(int port) +static inline uint8_t lm3s_gpioport(int port) { return g_portchar[port & 7]; } @@ -111,13 +112,13 @@ static inline ubyte lm3s_gpioport(int port) * ****************************************************************************/ -int lm3s_dumpgpio(uint32 pinset, const char *msg) +int lm3s_dumpgpio(uint32_t pinset, const char *msg) { irqstate_t flags; unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; - uint32 base; - uint32 rcgc2; - boolean enabled; + uint32_t base; + uint32_t rcgc2; + bool enabled; /* Get the base address associated with the GPIO port */ diff --git a/arch/arm/src/lm3s/lm3s_ethernet.c b/arch/arm/src/lm3s/lm3s_ethernet.c index 5d9e4b7115..41224418be 100644 --- a/arch/arm/src/lm3s/lm3s_ethernet.c +++ b/arch/arm/src/lm3s/lm3s_ethernet.c @@ -40,6 +40,8 @@ #include #if defined(CONFIG_NET) && defined(CONFIG_LM3S_ETHERNET) +#include +#include #include #include #include @@ -58,7 +60,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Half duplex can be forced if CONFIG_LM3S_ETHHDUPLEX is defined. */ @@ -159,18 +161,18 @@ #if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET) struct ez80mac_statistics_s { - uint32 rx_int; /* Number of Rx interrupts received */ - uint32 rx_packets; /* Number of packets received (sum of the following): */ - uint32 rx_ip; /* Number of Rx IP packets received */ - uint32 rx_arp; /* Number of Rx ARP packets received */ - uint32 rx_dropped; /* Number of dropped, unsupported Rx packets */ - uint32 rx_pktsize; /* Number of dropped, too small or too bigr */ - uint32 rx_errors; /* Number of Rx errors (reception error) */ - uint32 rx_ovrerrors; /* Number of Rx FIFO overrun errors */ - uint32 tx_int; /* Number of Tx interrupts received */ - uint32 tx_packets; /* Number of Tx packets queued */ - uint32 tx_errors; /* Number of Tx errors (transmission error)*/ - uint32 tx_timeouts; /* Number of Tx timeout errors */ + uint32_t rx_int; /* Number of Rx interrupts received */ + uint32_t rx_packets; /* Number of packets received (sum of the following): */ + uint32_t rx_ip; /* Number of Rx IP packets received */ + uint32_t rx_arp; /* Number of Rx ARP packets received */ + uint32_t rx_dropped; /* Number of dropped, unsupported Rx packets */ + uint32_t rx_pktsize; /* Number of dropped, too small or too bigr */ + uint32_t rx_errors; /* Number of Rx errors (reception error) */ + uint32_t rx_ovrerrors; /* Number of Rx FIFO overrun errors */ + uint32_t tx_int; /* Number of Tx interrupts received */ + uint32_t tx_packets; /* Number of Tx packets queued */ + uint32_t tx_errors; /* Number of Tx errors (transmission error)*/ + uint32_t tx_timeouts; /* Number of Tx timeout errors */ }; # define EMAC_STAT(priv,name) priv->ld_stat.name++ #else @@ -188,13 +190,13 @@ struct lm3s_driver_s */ #if LM3S_NETHCONTROLLERS > 1 - uint32 ld_base; /* Ethernet controller base address */ - int ld-irq; /* Ethernet controller IRQ */ + uint32_t ld_base; /* Ethernet controller base address */ + int ld-irq; /* Ethernet controller IRQ */ #endif - boolean ld_bifup; /* TRUE:ifup FALSE:ifdown */ - WDOG_ID ld_txpoll; /* TX poll timer */ - WDOG_ID ld_txtimeout; /* TX timeout timer */ + bool ld_bifup; /* true:ifup false:ifdown */ + WDOG_ID ld_txpoll; /* TX poll timer */ + WDOG_ID ld_txtimeout; /* TX timeout timer */ #if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET) struct ez80mac_statistics_s ld_stat; @@ -218,39 +220,39 @@ static struct lm3s_driver_s g_lm3sdev[LM3S_NETHCONTROLLERS]; /* Miscellaneous low level helpers */ #if LM3S_NETHCONTROLLERS > 1 -static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset); -static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value); +static uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset); +static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value); #else -static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset); -static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value); +static inline uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset); +static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value); #endif -static void lm3s_ethreset(struct lm3s_driver_s *priv); +static void lm3s_ethreset(struct lm3s_driver_s *priv); #if 0 /* Not used */ -static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16 value); +static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16_t value); #endif -static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr); +static uint16_t lm3s_phyread(struct lm3s_driver_s *priv, int regaddr); /* Common TX logic */ -static int lm3s_transmit(struct lm3s_driver_s *priv); -static int lm3s_uiptxpoll(struct uip_driver_s *dev); +static int lm3s_transmit(struct lm3s_driver_s *priv); +static int lm3s_uiptxpoll(struct uip_driver_s *dev); /* Interrupt handling */ -static void lm3s_receive(struct lm3s_driver_s *priv); -static void lm3s_txdone(struct lm3s_driver_s *priv); -static int lm3s_interrupt(int irq, FAR void *context); +static void lm3s_receive(struct lm3s_driver_s *priv); +static void lm3s_txdone(struct lm3s_driver_s *priv); +static int lm3s_interrupt(int irq, FAR void *context); /* Watchdog timer expirations */ -static void lm3s_polltimer(int argc, uint32 arg, ...); -static void lm3s_txtimeout(int argc, uint32 arg, ...); +static void lm3s_polltimer(int argc, uint32_t arg, ...); +static void lm3s_txtimeout(int argc, uint32_t arg, ...); /* NuttX callback functions */ -static int lm3s_ifup(struct uip_driver_s *dev); -static int lm3s_ifdown(struct uip_driver_s *dev); -static int lm3s_txavail(struct uip_driver_s *dev); +static int lm3s_ifup(struct uip_driver_s *dev); +static int lm3s_ifdown(struct uip_driver_s *dev); +static int lm3s_txavail(struct uip_driver_s *dev); /**************************************************************************** * Private Functions @@ -272,12 +274,12 @@ static int lm3s_txavail(struct uip_driver_s *dev); ****************************************************************************/ #if LM3S_NETHCONTROLLERS > 1 -static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) +static uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset) { return getreg32(priv->ld_base + offset); } #else -static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) +static inline uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset) { return getreg32(LM3S_ETHCON_BASE + offset); } @@ -300,12 +302,12 @@ static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) ****************************************************************************/ #if LM3S_NETHCONTROLLERS > 1 -static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value) +static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value) { putreg32(value, priv->ld_base + offset); } #else -static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value) +static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value) { putreg32(value, LM3S_ETHCON_BASE + offset); } @@ -330,7 +332,7 @@ static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 va static void lm3s_ethreset(struct lm3s_driver_s *priv) { irqstate_t flags; - uint32 regval; + uint32_t regval; #if LM3S_NETHCONTROLLERS > 1 # error "If multiple interfaces are supported, this function would have to be redesigned" @@ -399,7 +401,7 @@ static void lm3s_ethreset(struct lm3s_driver_s *priv) ****************************************************************************/ #if 0 /* Not used */ -static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16 value) +static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16_t value) { /* Wait for any MII transactions in progress to complete */ @@ -438,7 +440,7 @@ static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16 value) * ****************************************************************************/ -static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) +static uint16_t lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) { /* Wait for any MII transactions in progress to complete */ @@ -456,7 +458,7 @@ static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) /* Read and return the PHY data */ - return (uint16)(lm3s_ethin(priv, LM3S_MAC_MRXD_OFFSET) & MAC_MTRD_MASK); + return (uint16_t)(lm3s_ethin(priv, LM3S_MAC_MRXD_OFFSET) & MAC_MTRD_MASK); } /**************************************************************************** @@ -477,8 +479,8 @@ static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) static int lm3s_transmit(struct lm3s_driver_s *priv) { irqstate_t flags; - uint32 regval; - ubyte *dbuf; + uint32_t regval; + uint8_t *dbuf; int pktlen; int bytesleft; int ret = -EBUSY; @@ -504,9 +506,9 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) DEBUGASSERT(pktlen > UIP_LLH_LEN); dbuf = priv->ld_dev.d_buf; - regval = (uint32)(pktlen - 14); - regval |= ((uint32)(*dbuf++) << 16); - regval |= ((uint32)(*dbuf++) << 24); + regval = (uint32_t)(pktlen - 14); + regval |= ((uint32_t)(*dbuf++) << 16); + regval |= ((uint32_t)(*dbuf++) << 24); lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, regval); /* Write all of the whole, 32-bit values in the middle of the packet */ @@ -517,7 +519,7 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) * buffer may be un-aligned. */ - lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, *(uint32*)dbuf); + lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, *(uint32_t*)dbuf); } /* Write the last, partial word in the FIFO */ @@ -534,11 +536,11 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) break; case 3: - regval |= ((uint32)dbuf[2] << 16); + regval |= ((uint32_t)dbuf[2] << 16); case 2: - regval |= ((uint32)dbuf[1] << 8); + regval |= ((uint32_t)dbuf[1] << 8); case 1: - regval |= (uint32)dbuf[0]; + regval |= (uint32_t)dbuf[0]; break; } lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, regval); @@ -550,7 +552,7 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) /* Setup the TX timeout watchdog (perhaps restarting the timer) */ - (void)wd_start(priv->ld_txtimeout, LM3S_TXTIMEOUT, lm3s_txtimeout, 1, (uint32)priv); + (void)wd_start(priv->ld_txtimeout, LM3S_TXTIMEOUT, lm3s_txtimeout, 1, (uint32_t)priv); ret = OK; } @@ -625,10 +627,10 @@ static int lm3s_uiptxpoll(struct uip_driver_s *dev) static void lm3s_receive(struct lm3s_driver_s *priv) { - uint32 regval; - ubyte *dbuf; - int pktlen; - int bytesleft; + uint32_t regval; + uint8_t *dbuf; + int pktlen; + int bytesleft; /* Loop while there are incoming packets to be processed */ @@ -690,8 +692,8 @@ static void lm3s_receive(struct lm3s_driver_s *priv) /* Save the first two bytes from the first word */ - *dbuf++ = (ubyte)((regval >> 16) & 0xff); - *dbuf++ = (ubyte)((regval >> 24) & 0xff); + *dbuf++ = (uint8_t)((regval >> 16) & 0xff); + *dbuf++ = (uint8_t)((regval >> 24) & 0xff); /* Read all of the whole, 32-bit values in the middle of the packet. * We've already read the length (2 bytes) plus the first two bytes @@ -704,7 +706,7 @@ static void lm3s_receive(struct lm3s_driver_s *priv) * buffer may be un-aligned. */ - *(uint32*)dbuf = lm3s_ethin(priv, LM3S_MAC_DATA_OFFSET); + *(uint32_t*)dbuf = lm3s_ethin(priv, LM3S_MAC_DATA_OFFSET); } /* Handle the last, partial word in the FIFO */ @@ -845,7 +847,7 @@ static void lm3s_txdone(struct lm3s_driver_s *priv) static int lm3s_interrupt(int irq, FAR void *context) { register struct lm3s_driver_s *priv; - uint32 ris; + uint32_t ris; #if LM3S_NETHCONTROLLERS > 1 # error "A mechanism to associate and interface with an IRQ is needed" @@ -929,7 +931,7 @@ static int lm3s_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static void lm3s_txtimeout(int argc, uint32 arg, ...) +static void lm3s_txtimeout(int argc, uint32_t arg, ...) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)arg; @@ -966,7 +968,7 @@ static void lm3s_txtimeout(int argc, uint32 arg, ...) * ****************************************************************************/ -static void lm3s_polltimer(int argc, uint32 arg, ...) +static void lm3s_polltimer(int argc, uint32_t arg, ...) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)arg; @@ -1011,9 +1013,9 @@ static int lm3s_ifup(struct uip_driver_s *dev) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)dev->d_private; irqstate_t flags; - uint32 regval; - uint32 div; - uint16 phyreg; + uint32_t regval; + uint32_t div; + uint16_t phyreg; nlldbg("Bringing up: %d.%d.%d.%d\n", dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, @@ -1127,21 +1129,21 @@ static int lm3s_ifup(struct uip_driver_s *dev) /* Program the hardware with it's MAC address (for filtering) */ - regval = (uint32)priv->ld_dev.d_mac.ether_addr_octet[3] << 24 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[2] << 16 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[1] << 8 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[0]; + regval = (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[3] << 24 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[2] << 16 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[1] << 8 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[0]; lm3s_ethout(priv, LM3S_MAC_IA0_OFFSET, regval); - regval = (uint32)priv->ld_dev.d_mac.ether_addr_octet[5] << 8 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[4]; + regval = (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[5] << 8 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[4]; lm3s_ethout(priv, LM3S_MAC_IA1_OFFSET, regval); /* Set and activate a timer process */ - (void)wd_start(priv->ld_txpoll, LM3S_WDDELAY, lm3s_polltimer, 1, (uint32)priv); + (void)wd_start(priv->ld_txpoll, LM3S_WDDELAY, lm3s_polltimer, 1, (uint32_t)priv); - priv->ld_bifup = TRUE; + priv->ld_bifup = true; irqrestore(flags); return OK; } @@ -1167,7 +1169,7 @@ static int lm3s_ifdown(struct uip_driver_s *dev) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)dev->d_private; irqstate_t flags; - uint32 regval; + uint32_t regval; nlldbg("Taking down: %d.%d.%d.%d\n", dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, @@ -1224,7 +1226,7 @@ static int lm3s_ifdown(struct uip_driver_s *dev) /* The interface is now DOWN */ - priv->ld_bifup = FALSE; + priv->ld_bifup = false; irqrestore(flags); return OK; } diff --git a/arch/arm/src/lm3s/lm3s_ethernet.h b/arch/arm/src/lm3s/lm3s_ethernet.h index e67a0a34ef..7b0a043a9b 100644 --- a/arch/arm/src/lm3s/lm3s_ethernet.h +++ b/arch/arm/src/lm3s/lm3s_ethernet.h @@ -41,11 +41,10 @@ ************************************************************************************/ #include -#include #include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Ethernet Controller Register Offsets *********************************************/ diff --git a/arch/arm/src/lm3s/lm3s_flash.h b/arch/arm/src/lm3s/lm3s_flash.h index 22f94ca0a2..53b0e685aa 100644 --- a/arch/arm/src/lm3s/lm3s_flash.h +++ b/arch/arm/src/lm3s/lm3s_flash.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* FLASH register offsets ***********************************************************/ diff --git a/arch/arm/src/lm3s/lm3s_gpio.c b/arch/arm/src/lm3s/lm3s_gpio.c index d289022a9f..d227e62ea6 100644 --- a/arch/arm/src/lm3s/lm3s_gpio.c +++ b/arch/arm/src/lm3s/lm3s_gpio.c @@ -39,8 +39,9 @@ ****************************************************************************/ #include -#include +#include +#include #include #include #include @@ -52,7 +53,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /* These definitions are part of the implementation of the GPIO pad @@ -119,8 +120,8 @@ struct gpio_func_s { - ubyte setbits; /* A set of GPIO register bits to set */ - ubyte clrbits; /* A set of GPIO register bits to clear */ + uint8_t setbits; /* A set of GPIO register bits to set */ + uint8_t clrbits; /* A set of GPIO register bits to clear */ }; /**************************************************************************** @@ -139,7 +140,7 @@ static const struct gpio_func_s g_funcbits[] = {GPIO_INTERRUPT_SETBITS, GPIO_INTERRUPT_CLRBITS}, /* GPIO_FUNC_INTERRUPT */ }; -static const uint32 g_gpiobase[] = +static const uint32_t g_gpiobase[] = { LM3S_GPIOA_BASE, LM3S_GPIOB_BASE, LM3S_GPIOC_BASE, LM3S_GPIOD_BASE, LM3S_GPIOE_BASE, LM3S_GPIOF_BASE, LM3S_GPIOG_BASE, LM3S_GPIOH_BASE, @@ -162,7 +163,7 @@ static const uint32 g_gpiobase[] = * ****************************************************************************/ -static inline uint32 lm3s_gpiobaseaddress(unsigned int port) +static inline uint32_t lm3s_gpiobaseaddress(unsigned int port) { return g_gpiobase[port & 7]; } @@ -175,11 +176,11 @@ static inline uint32 lm3s_gpiobaseaddress(unsigned int port) * ****************************************************************************/ -static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *func) +static void lm3s_gpiofunc(uint32_t base, uint32_t pinno, const struct gpio_func_s *func) { - uint32 setbit; - uint32 clrbit; - uint32 regval; + uint32_t setbit; + uint32_t clrbit; + uint32_t regval; /* Set/clear/ignore the GPIO ODR bit. "The GPIO ODR register is the open drain * control register. Setting a bit in this register enables the open drain @@ -192,8 +193,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * drain output when set to 1." */ - setbit = (((uint32)func->setbits >> ODR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> ODR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> ODR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> ODR_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_ODR_OFFSET); regval &= ~clrbit; @@ -206,8 +207,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * corresponding bit in the GPIO Pull-Down Select (GPIOPDR) register ..." */ - setbit = (((uint32)func->setbits >> PUR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> PUR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> PUR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> PUR_SHIFT) & 1) << pinno; if (setbit || clrbit) { @@ -223,8 +224,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * the corresponding bit in the GPIO Pull-Up Select (GPIOPUR) register ..." */ - setbit = (((uint32)func->setbits >> PDR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> PDR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> PDR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> PDR_SHIFT) & 1) << pinno; if (setbit || clrbit) { @@ -243,8 +244,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * corresponding GPIODEN bit must be set." */ - setbit = (((uint32)func->setbits >> DEN_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> DEN_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> DEN_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> DEN_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_DEN_OFFSET); regval &= ~clrbit; @@ -258,8 +259,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * pins are inputs by default. */ - setbit = (((uint32)func->setbits >> DIR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> DIR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> DIR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> DIR_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_DIR_OFFSET); regval &= ~clrbit; @@ -275,8 +276,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * and unlock the GPIO. That is not implemented here. */ - setbit = (((uint32)func->setbits >> AFSEL_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> AFSEL_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> AFSEL_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> AFSEL_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_AFSEL_OFFSET); regval &= ~clrbit; @@ -292,13 +293,13 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * ****************************************************************************/ -static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) +static inline void lm3s_gpiopadstrength(uint32_t base, uint32_t pin, uint32_t cfgset) { int strength = (cfgset & GPIO_STRENGTH_MASK) >> GPIO_STRENGTH_SHIFT; - uint32 regoffset; - uint32 regval; - uint32 slrset; - uint32 slrclr; + uint32_t regoffset; + uint32_t regval; + uint32_t slrset; + uint32_t slrclr; /* Prepare bits to disable slew */ @@ -381,22 +382,22 @@ static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) * ****************************************************************************/ -static inline void lm3s_gpiopadtype(uint32 base, uint32 pin, uint32 cfgset) +static inline void lm3s_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset) { int padtype = (cfgset & GPIO_PADTYPE_MASK) >> GPIO_PADTYPE_SHIFT; #if 0 /* always overwritten by lm3s_gpiofunc */ - uint32 odrset; - uint32 odrclr; + uint32_t odrset; + uint32_t odrclr; #endif - uint32 purset; - uint32 purclr; - uint32 pdrset; - uint32 pdrclr; + uint32_t purset; + uint32_t purclr; + uint32_t pdrset; + uint32_t pdrclr; #if 0 /* always overwritten by lm3s_gpiofunc */ - uint32 denset; - uint32 denclr; + uint32_t denset; + uint32_t denclr; #endif - uint32 regval; + uint32_t regval; /* Assume digital GPIO function, push-pull with no pull-up or pull-down */ @@ -536,9 +537,9 @@ static inline void lm3s_gpiopadtype(uint32 base, uint32 pin, uint32 cfgset) * ****************************************************************************/ -static inline void lm3s_initoutput(uint32 cfgset) +static inline void lm3s_initoutput(uint32_t cfgset) { - boolean value = ((cfgset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO); + bool value = ((cfgset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO); lm3s_gpiowrite(cfgset, value); } @@ -550,16 +551,16 @@ static inline void lm3s_initoutput(uint32 cfgset) * ****************************************************************************/ -static inline void lm3s_interrupt(uint32 base, uint32 pin, uint32 cfgset) +static inline void lm3s_interrupt(uint32_t base, uint32_t pin, uint32_t cfgset) { int inttype = (cfgset & GPIO_INT_MASK) >> GPIO_INT_SHIFT; - uint32 regval; - uint32 isset; - uint32 isclr; - uint32 ibeset; - uint32 ibeclr; - uint32 iveset; - uint32 iveclr; + uint32_t regval; + uint32_t isset; + uint32_t isclr; + uint32_t ibeset; + uint32_t ibeclr; + uint32_t iveset; + uint32_t iveclr; /* Mask and clear the GPIO interrupt * @@ -681,15 +682,15 @@ static inline void lm3s_interrupt(uint32 base, uint32 pin, uint32 cfgset) * ****************************************************************************/ -int lm3s_configgpio(uint32 cfgset) +int lm3s_configgpio(uint32_t cfgset) { irqstate_t flags; unsigned int func; unsigned int port; unsigned int pinno; - uint32 pin; - uint32 base; - uint32 regval; + uint32_t pin; + uint32_t base; + uint32_t regval; /* Decode the basics */ @@ -762,11 +763,11 @@ int lm3s_configgpio(uint32 cfgset) * ****************************************************************************/ -void lm3s_gpiowrite(uint32 pinset, boolean value) +void lm3s_gpiowrite(uint32_t pinset, bool value) { unsigned int port; unsigned int pinno; - uint32 base; + uint32_t base; /* Decode the basics */ @@ -789,7 +790,7 @@ void lm3s_gpiowrite(uint32 pinset, boolean value) * "... All bits are cleared by a reset." */ - putreg32((uint32)value << pinno, base + LM3S_GPIO_DATA_OFFSET + (1 << (pinno + 2))); + putreg32((uint32_t)value << pinno, base + LM3S_GPIO_DATA_OFFSET + (1 << (pinno + 2))); } /**************************************************************************** @@ -800,11 +801,11 @@ void lm3s_gpiowrite(uint32 pinset, boolean value) * ****************************************************************************/ -boolean lm3s_gpioread(uint32 pinset, boolean value) +bool lm3s_gpioread(uint32_t pinset, bool value) { unsigned int port; unsigned int pinno; - uint32 base; + uint32_t base; /* Decode the basics */ diff --git a/arch/arm/src/lm3s/lm3s_gpio.h b/arch/arm/src/lm3s/lm3s_gpio.h index 7424d74e33..886e58e78d 100644 --- a/arch/arm/src/lm3s/lm3s_gpio.h +++ b/arch/arm/src/lm3s/lm3s_gpio.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* GPIO Register Offsets ************************************************************/ diff --git a/arch/arm/src/lm3s/lm3s_gpioirq.c b/arch/arm/src/lm3s/lm3s_gpioirq.c index 590e0d7539..3d0ebf472e 100644 --- a/arch/arm/src/lm3s/lm3s_gpioirq.c +++ b/arch/arm/src/lm3s/lm3s_gpioirq.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include -#include +#include #include #include #include @@ -53,7 +53,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -68,7 +68,7 @@ static FAR xcpt_t g_gpioirqvector[NR_GPIO_IRQS]; * be we support disabling interrupt support for arbitrary ports */ -static const uint32 g_gpiobase[] = +static const uint32_t g_gpiobase[] = { #ifndef CONFIG_LM3S_DISABLE_GPIOA_IRQS LM3S_GPIOA_BASE, @@ -113,7 +113,7 @@ static const uint32 g_gpiobase[] = * ****************************************************************************/ -static inline uint32 lm3s_gpiobaseaddress(unsigned int port) +static inline uint32_t lm3s_gpiobaseaddress(unsigned int port) { return g_gpiobase[port >> 3]; } @@ -126,9 +126,9 @@ static inline uint32 lm3s_gpiobaseaddress(unsigned int port) * ****************************************************************************/ -static int lm3s_gpiohandler(uint32 regbase, int irqbase, void *context) +static int lm3s_gpiohandler(uint32_t regbase, int irqbase, void *context) { - uint32 mis; + uint32_t mis; int irq; int pin; @@ -322,8 +322,8 @@ void gpio_irqenable(int irq) { irqstate_t flags; int gpioirq = irq - NR_IRQS; - uint32 base; - uint32 regval; + uint32_t base; + uint32_t regval; int pin; int ret = ERROR; @@ -363,8 +363,8 @@ void gpio_irqdisable(int irq) { irqstate_t flags; int gpioirq = irq - NR_IRQS; - uint32 base; - uint32 regval; + uint32_t base; + uint32_t regval; int pin; int ret = ERROR; diff --git a/arch/arm/src/lm3s/lm3s_i2c.h b/arch/arm/src/lm3s/lm3s_i2c.h index 167b157963..f306328e35 100644 --- a/arch/arm/src/lm3s/lm3s_i2c.h +++ b/arch/arm/src/lm3s/lm3s_i2c.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* I2C Register Offsets *************************************************************/ diff --git a/arch/arm/src/lm3s/lm3s_internal.h b/arch/arm/src/lm3s/lm3s_internal.h index 29ce8f5a39..2548e6c5b7 100644 --- a/arch/arm/src/lm3s/lm3s_internal.h +++ b/arch/arm/src/lm3s/lm3s_internal.h @@ -41,13 +41,14 @@ ************************************************************************************/ #include -#include +#include +#include #include "up_internal.h" #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* The LM3S6918 only supports 8 priority levels. The hardware priority mechanism @@ -236,7 +237,7 @@ EXTERN void up_lowsetup(void); * ****************************************************************************/ -EXTERN void lm3s_clockconfig(uint32 newrcc, uint32 newrcc2); +EXTERN void lm3s_clockconfig(uint32_t newrcc, uint32_t newrcc2); /**************************************************************************** * Name: up_clockconfig @@ -257,7 +258,7 @@ EXTERN void up_clockconfig(void); * ****************************************************************************/ -EXTERN int lm3s_configgpio(uint32 cfgset); +EXTERN int lm3s_configgpio(uint32_t cfgset); /**************************************************************************** * Name: lm3s_gpiowrite @@ -267,7 +268,7 @@ EXTERN int lm3s_configgpio(uint32 cfgset); * ****************************************************************************/ -EXTERN void lm3s_gpiowrite(uint32 pinset, boolean value); +EXTERN void lm3s_gpiowrite(uint32_t pinset, bool value); /**************************************************************************** * Name: lm3s_gpioread @@ -277,7 +278,7 @@ EXTERN void lm3s_gpiowrite(uint32 pinset, boolean value); * ****************************************************************************/ -EXTERN boolean lm3s_gpioread(uint32 pinset, boolean value); +EXTERN bool lm3s_gpioread(uint32_t pinset, bool value); /**************************************************************************** * Function: lm3s_dumpgpio @@ -287,7 +288,7 @@ EXTERN boolean lm3s_gpioread(uint32 pinset, boolean value); * ****************************************************************************/ -EXTERN int lm3s_dumpgpio(uint32 pinset, const char *msg); +EXTERN int lm3s_dumpgpio(uint32_t pinset, const char *msg); /**************************************************************************** * Name: gpio_irqinitialize @@ -345,8 +346,8 @@ EXTERN int lm3s_ethinitialize(int intf); struct spi_dev_s; enum spi_dev_e; -EXTERN void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected); -EXTERN ubyte lm3s_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +EXTERN void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +EXTERN uint8_t lm3s_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/lm3s/lm3s_irq.c b/arch/arm/src/lm3s/lm3s_irq.c index 63744581a2..160d769121 100644 --- a/arch/arm/src/lm3s/lm3s_irq.c +++ b/arch/arm/src/lm3s/lm3s_irq.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -54,7 +54,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Enable NVIC debug features that are probably only desireable during @@ -75,7 +75,7 @@ * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data @@ -205,7 +205,7 @@ static int lm3s_reserved(int irq, FAR void *context) * ****************************************************************************/ -static int lm3s_irqinfo(int irq, uint32 *regaddr, uint32 *bit) +static int lm3s_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit) { DEBUGASSERT(irq >= LM3S_IRQ_NMI && irq < NR_IRQS); @@ -363,9 +363,9 @@ void up_irqinitialize(void) void up_disable_irq(int irq) { - uint32 regaddr; - uint32 regval; - uint32 bit; + uint32_t regaddr; + uint32_t regval; + uint32_t bit; if (lm3s_irqinfo(irq, ®addr, &bit) == 0) { @@ -388,9 +388,9 @@ void up_disable_irq(int irq) void up_enable_irq(int irq) { - uint32 regaddr; - uint32 regval; - uint32 bit; + uint32_t regaddr; + uint32_t regval; + uint32_t bit; if (lm3s_irqinfo(irq, ®addr, &bit) == 0) { @@ -430,8 +430,8 @@ void up_maskack_irq(int irq) #ifdef CONFIG_ARCH_IRQPRIO int up_prioritize_irq(int irq, int priority) { - uint32 regaddr; - uint32 regval; + uint32_t regaddr; + uint32_t regval; int shift; DEBUGASSERT(irq >= LM3S_IRQ_MPU && irq < NR_IRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); diff --git a/arch/arm/src/lm3s/lm3s_lowputc.c b/arch/arm/src/lm3s/lm3s_lowputc.c index 8ab1d1a476..aa7f5466a4 100644 --- a/arch/arm/src/lm3s/lm3s_lowputc.c +++ b/arch/arm/src/lm3s/lm3s_lowputc.c @@ -38,7 +38,7 @@ **************************************************************************/ #include -#include +#include #include "up_internal.h" #include "up_arch.h" @@ -47,7 +47,7 @@ #include "lm3s_internal.h" /************************************************************************** - * Private Definitions + * Pre-processor Definitions **************************************************************************/ /* Configuration **********************************************************/ @@ -204,7 +204,7 @@ void up_lowputc(char ch) /* Then send the character */ - putreg32((uint32)ch, LM3S_CONSOLE_BASE+LM3S_UART_DR_OFFSET); + putreg32((uint32_t)ch, LM3S_CONSOLE_BASE+LM3S_UART_DR_OFFSET); #endif } @@ -220,9 +220,9 @@ void up_lowputc(char ch) void up_lowsetup(void) { - uint32 regval; + uint32_t regval; #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) - uint32 ctl; + uint32_t ctl; #endif /* Enable the selected UARTs and configure GPIO pins to need by the diff --git a/arch/arm/src/lm3s/lm3s_memorymap.h b/arch/arm/src/lm3s/lm3s_memorymap.h index 0b4401069e..c3ffab27df 100644 --- a/arch/arm/src/lm3s/lm3s_memorymap.h +++ b/arch/arm/src/lm3s/lm3s_memorymap.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Memory map ***********************************************************************/ diff --git a/arch/arm/src/lm3s/lm3s_serial.c b/arch/arm/src/lm3s/lm3s_serial.c index 3c4247da5b..f8cde80e7a 100644 --- a/arch/arm/src/lm3s/lm3s_serial.c +++ b/arch/arm/src/lm3s/lm3s_serial.c @@ -38,8 +38,10 @@ ****************************************************************************/ #include -#include +#include +#include +#include #include #include #include @@ -57,7 +59,7 @@ #include "os_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Some sanity checks *******************************************************/ @@ -132,32 +134,32 @@ struct up_dev_s { - uint32 uartbase; /* Base address of UART registers */ - uint32 baud; /* Configured baud */ - uint32 im; /* Saved IM value */ - ubyte irq; /* IRQ associated with this UART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - boolean stopbits2; /* TRUE: Configure with 2 stop bits instead of 1 */ + uint32_t uartbase; /* Base address of UART registers */ + uint32_t baud; /* Configured baud */ + uint32_t im; /* Saved IM value */ + uint8_t irq; /* IRQ associated with this UART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -258,7 +260,7 @@ static uart_dev_t g_uart1port = * Name: up_serialin ****************************************************************************/ -static inline uint32 up_serialin(struct up_dev_s *priv, int offset) +static inline uint32_t up_serialin(struct up_dev_s *priv, int offset) { return getreg32(priv->uartbase + offset); } @@ -267,7 +269,7 @@ static inline uint32 up_serialin(struct up_dev_s *priv, int offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, int offset, uint32 value) +static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value) { putreg32(value, priv->uartbase + offset); } @@ -276,7 +278,7 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32 value) * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, uint32 *im) +static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *im) { /* Return the current interrupt mask value */ @@ -295,7 +297,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint32 *im) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, uint32 im) +static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t im) { priv->im = im; up_serialout(priv, LM3S_UART_IM_OFFSET, im); @@ -343,13 +345,13 @@ static inline void up_waittxnotfull(struct up_dev_s *priv) static int up_setup(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 lcrh; - uint32 ctl; + uint32_t lcrh; + uint32_t ctl; #ifndef CONFIG_SUPPRESS_UART_CONFIG - uint32 den; - uint32 brdi; - uint32 remainder; - uint32 divfrac; + uint32_t den; + uint32_t brdi; + uint32_t remainder; + uint32_t divfrac; /* Note: The logic here depends on the fact that that the UART module * was enabled and the GPIOs were configured in up_lowsetup(). @@ -568,9 +570,9 @@ static int up_interrupt(int irq, void *context) { struct uart_dev_s *dev = NULL; struct up_dev_s *priv; - uint32 mis; + uint32_t mis; int passes; - boolean handled; + bool handled; #ifndef CONFIG_UART0_DISABLE if (g_uart0priv.irq == irq) @@ -595,10 +597,10 @@ static int up_interrupt(int irq, void *context) * until we have been looping for a long time. */ - handled = TRUE; + handled = true; for (passes = 0; passes < 256 && handled; passes++) { - handled = FALSE; + handled = false; /* Get the masked UART status and clear the pending interrupts. */ @@ -612,7 +614,7 @@ static int up_interrupt(int irq, void *context) /* Rx buffer not empty ... process incoming bytes */ uart_recvchars(dev); - handled = TRUE; + handled = true; } /* Handle outgoing, transmit bytes */ @@ -622,7 +624,7 @@ static int up_interrupt(int irq, void *context) /* Tx FIFO not full ... process outgoing bytes */ uart_xmitchars(dev); - handled = TRUE; + handled = true; } } return OK; @@ -678,10 +680,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 rxd; + uint32_t rxd; /* Get the Rx byte + 4 bits of error information. Return those in status */ @@ -701,7 +703,7 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -725,11 +727,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LM3S_UART_FR_OFFSET) & UART_FR_RXFE) == 0); @@ -746,7 +748,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32)ch); + up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32_t)ch); } /**************************************************************************** @@ -757,7 +759,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; irqstate_t flags; @@ -798,11 +800,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LM3S_UART_FR_OFFSET) & UART_FR_TXFF) == 0); @@ -812,11 +814,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LM3S_UART_FR_OFFSET) & UART_FR_TXFE) != 0); @@ -852,7 +854,7 @@ void up_earlyserialinit(void) /* Configuration whichever one is the console */ #ifdef HAVE_CONSOLE - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); #endif } @@ -894,11 +896,11 @@ int up_putc(int ch) { #ifdef HAVE_CONSOLE struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint32 im; + uint32_t im; up_disableuartint(priv, &im); up_waittxnotfull(priv); - up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32)ch); + up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32_t)ch); /* Check for LF */ @@ -907,7 +909,7 @@ int up_putc(int ch) /* Add CR */ up_waittxnotfull(priv); - up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32)'\r'); + up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32_t)'\r'); } up_waittxnotfull(priv); diff --git a/arch/arm/src/lm3s/lm3s_ssi.c b/arch/arm/src/lm3s/lm3s_ssi.c index 2821dc87ea..980164ba90 100755 --- a/arch/arm/src/lm3s/lm3s_ssi.c +++ b/arch/arm/src/lm3s/lm3s_ssi.c @@ -38,8 +38,10 @@ ****************************************************************************/ #include -#include +#include +#include +#include #include #include #include @@ -57,7 +59,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Enables debug output from this file (needs CONFIG_DEBUG with @@ -150,8 +152,8 @@ struct lm3s_ssidev_s /* These following are the source and destination buffers of the transfer. * they are retained in this structure so that they will be accessible - * from an interrupt handler. The actual type of the buffer is ubyte is - * nbits <=8 and uint16 is nbits >8. + * from an interrupt handler. The actual type of the buffer is uint8_t is + * nbits <=8 and uint16_t is nbits >8. */ void *txbuffer; /* Source buffer */ @@ -168,19 +170,19 @@ struct lm3s_ssidev_s void (*rxword)(struct lm3s_ssidev_s *priv); #if NSSI_ENABLED > 1 - uint32 base; /* SSI register base address */ + uint32_t base; /* SSI register base address */ #endif - uint32 frequency; /* Current desired SCLK frequency */ - uint32 actual; /* Current actual SCLK frequency */ + uint32_t frequency; /* Current desired SCLK frequency */ + uint32_t actual; /* Current actual SCLK frequency */ - int ntxwords; /* Number of words left to transfer on the Tx FIFO */ - int nrxwords; /* Number of words received on the Rx FIFO */ - int nwords; /* Number of words to be exchanged */ + int ntxwords; /* Number of words left to transfer on the Tx FIFO */ + int nrxwords; /* Number of words received on the Rx FIFO */ + int nwords; /* Number of words to be exchanged */ - ubyte mode; /* Current mode */ - ubyte nbits; /* Current number of bits per word */ + uint8_t mode; /* Current mode */ + uint8_t nbits; /* Current number of bits per word */ #if !defined(CONFIG_SSI_POLLWAIT) && NSSI_ENABLED > 1 - ubyte irq; /* SSI IRQ number */ + uint8_t irq; /* SSI IRQ number */ #endif }; @@ -190,57 +192,64 @@ struct lm3s_ssidev_s /* SSI register access */ -static inline uint32 ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset); -static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, uint32 value); +static inline uint32_t ssi_getreg(struct lm3s_ssidev_s *priv, + unsigned int offset); +static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, + uint32_t value); /* Misc helpers */ -static uint32 ssi_disable(struct lm3s_ssidev_s *priv); -static void ssi_enable(struct lm3s_ssidev_s *priv, uint32 enable); +static uint32_t ssi_disable(struct lm3s_ssidev_s *priv); +static void ssi_enable(struct lm3s_ssidev_s *priv, uint32_t enable); static void ssi_semtake(sem_t *sem); #define ssi_semgive(s) sem_post(s); /* SSI data transfer */ -static void ssi_txnull(struct lm3s_ssidev_s *priv); -static void ssi_txuint16(struct lm3s_ssidev_s *priv); -static void ssi_txubyte(struct lm3s_ssidev_s *priv); -static void ssi_rxnull(struct lm3s_ssidev_s *priv); -static void ssi_rxuint16(struct lm3s_ssidev_s *priv); -static void ssi_rxubyte(struct lm3s_ssidev_s *priv); -static inline boolean ssi_txfifofull(struct lm3s_ssidev_s *priv); -static inline boolean ssi_rxfifoempty(struct lm3s_ssidev_s *priv); +static void ssi_txnull(struct lm3s_ssidev_s *priv); +static void ssi_txuint16(struct lm3s_ssidev_s *priv); +static void ssi_txuint8(struct lm3s_ssidev_s *priv); +static void ssi_rxnull(struct lm3s_ssidev_s *priv); +static void ssi_rxuint16(struct lm3s_ssidev_s *priv); +static void ssi_rxuint8(struct lm3s_ssidev_s *priv); +static inline bool ssi_txfifofull(struct lm3s_ssidev_s *priv); +static inline bool ssi_rxfifoempty(struct lm3s_ssidev_s *priv); #if CONFIG_SSI_TXLIMIT == 1 && defined(CONFIG_SSI_POLLWAIT) static inline int ssi_performtx(struct lm3s_ssidev_s *priv); #else -static int ssi_performtx(struct lm3s_ssidev_s *priv); +static int ssi_performtx(struct lm3s_ssidev_s *priv); #endif static inline void ssi_performrx(struct lm3s_ssidev_s *priv); -static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, - void *rxbuffer, unsigned int nwords); +static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, + void *rxbuffer, unsigned int nwords); /* Interrupt handling */ #ifndef CONFIG_SSI_POLLWAIT static inline struct lm3s_ssidev_s *ssi_mapirq(int irq); -static int ssi_interrupt(int irq, void *context); +static int ssi_interrupt(int irq, void *context); #endif /* SPI methods */ -static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32 frequency); -static uint32 ssi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency); -static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode); -static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); -static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits); -static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits); -static uint16 ssi_send(FAR struct spi_dev_s *dev, uint16 wd); +static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, + uint32_t frequency); +static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, + uint32_t frequency); +static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, + enum spi_mode_e mode); +static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); +static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits); +static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits); +static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd); #ifdef CONFIG_SPI_EXCHANGE -static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, + FAR void *rxbuffer, size_t nwords); #else -static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords); -static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords); +static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, + size_t nwords); +static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, + size_t nwords); #endif /**************************************************************************** @@ -317,7 +326,7 @@ static struct lm3s_ssidev_s g_ssidev[] = * ****************************************************************************/ -static inline uint32 ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset) +static inline uint32_t ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset) { #if NSSI_ENABLED > 1 return getreg32(priv->base + offset); @@ -342,7 +351,7 @@ static inline uint32 ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset) * ****************************************************************************/ -static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, uint32 value) +static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, uint32_t value) { #if NSSI_ENABLED > 1 putreg32(value, priv->base + offset); @@ -366,10 +375,10 @@ static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, u * ****************************************************************************/ -static uint32 ssi_disable(struct lm3s_ssidev_s *priv) +static uint32_t ssi_disable(struct lm3s_ssidev_s *priv) { - uint32 retval; - uint32 regval; + uint32_t retval; + uint32_t regval; retval = ssi_getreg(priv, LM3S_SSI_CR1_OFFSET); regval = (retval & ~SSI_CR1_SSE); @@ -392,9 +401,9 @@ static uint32 ssi_disable(struct lm3s_ssidev_s *priv) * ****************************************************************************/ -static void ssi_enable(struct lm3s_ssidev_s *priv, uint32 enable) +static void ssi_enable(struct lm3s_ssidev_s *priv, uint32_t enable) { - uint32 regval = ssi_getreg(priv, LM3S_SSI_CR1_OFFSET); + uint32_t regval = ssi_getreg(priv, LM3S_SSI_CR1_OFFSET); regval &= ~SSI_CR1_SSE; regval |= (enable & SSI_CR1_SSE); ssi_putreg(priv, LM3S_SSI_CR1_OFFSET, regval); @@ -427,10 +436,10 @@ static void ssi_semtake(sem_t *sem) } /**************************************************************************** - * Name: ssi_txnull, ssi_txuint16, and ssi_txubyte + * Name: ssi_txnull, ssi_txuint16, and ssi_txuint8 * * Description: - * Transfer all ones, a ubyte, or uint16 to Tx FIFO and update the txbuffer + * Transfer all ones, a uint8_t, or uint16_t to Tx FIFO and update the txbuffer * pointer appropriately. The selected function dependes on (1) if there * is a source txbuffer provided, and (2) if the number of bits per * word is <=8 or >8. @@ -451,25 +460,25 @@ static void ssi_txnull(struct lm3s_ssidev_s *priv) static void ssi_txuint16(struct lm3s_ssidev_s *priv) { - uint16 *ptr = (uint16*)priv->txbuffer; + uint16_t *ptr = (uint16_t*)priv->txbuffer; ssivdbg("TX: %p->%04x\n", ptr, *ptr); - ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32)(*ptr++)); + ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32_t)(*ptr++)); priv->txbuffer = (void*)ptr; } -static void ssi_txubyte(struct lm3s_ssidev_s *priv) +static void ssi_txuint8(struct lm3s_ssidev_s *priv) { - ubyte *ptr = (ubyte*)priv->txbuffer; + uint8_t *ptr = (uint8_t*)priv->txbuffer; ssivdbg("TX: %p->%02x\n", ptr, *ptr); - ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32)(*ptr++)); + ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32_t)(*ptr++)); priv->txbuffer = (void*)ptr; } /**************************************************************************** - * Name: ssi_rxnull, ssi_rxuint16, and ssi_rxubyte + * Name: ssi_rxnull, ssi_rxuint16, and ssi_rxuint8 * * Description: - * Discard input, save a ubyte, or or save a uint16 from Tx FIFO in the + * Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the * user rxvbuffer and update the rxbuffer pointer appropriately. The * selected function dependes on (1) if there is a desination rxbuffer * provided, and (2) if the number of bits per word is <=8 or >8. @@ -485,7 +494,7 @@ static void ssi_txubyte(struct lm3s_ssidev_s *priv) static void ssi_rxnull(struct lm3s_ssidev_s *priv) { #if defined(SSI_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) - uint32 regval = ssi_getreg(priv, LM3S_SSI_DR_OFFSET); + uint32_t regval = ssi_getreg(priv, LM3S_SSI_DR_OFFSET); ssivdbg("RX: discard %04x\n", regval); #else (void)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); @@ -494,16 +503,16 @@ static void ssi_rxnull(struct lm3s_ssidev_s *priv) static void ssi_rxuint16(struct lm3s_ssidev_s *priv) { - uint16 *ptr = (uint16*)priv->rxbuffer; - *ptr = (uint16)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); + uint16_t *ptr = (uint16_t*)priv->rxbuffer; + *ptr = (uint16_t)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); ssivdbg("RX: %p<-%04x\n", ptr, *ptr); priv->rxbuffer = (void*)(++ptr); } -static void ssi_rxubyte(struct lm3s_ssidev_s *priv) +static void ssi_rxuint8(struct lm3s_ssidev_s *priv) { - ubyte *ptr = (ubyte*)priv->rxbuffer; - *ptr = (ubyte)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); + uint8_t *ptr = (uint8_t*)priv->rxbuffer; + *ptr = (uint8_t)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); ssivdbg("RX: %p<-%02x\n", ptr, *ptr); priv->rxbuffer = (void*)(++ptr); } @@ -512,17 +521,17 @@ static void ssi_rxubyte(struct lm3s_ssidev_s *priv) * Name: ssi_txfifofull * * Description: - * Return TRUE if the Tx FIFO is full + * Return true if the Tx FIFO is full * * Input Parameters: * priv - Device-specific state data * * Returned Value: - * TRUE: Not full + * true: Not full * ****************************************************************************/ -static inline boolean ssi_txfifofull(struct lm3s_ssidev_s *priv) +static inline bool ssi_txfifofull(struct lm3s_ssidev_s *priv) { return (ssi_getreg(priv, LM3S_SSI_SR_OFFSET) & SSI_SR_TNF) == 0; } @@ -531,17 +540,17 @@ static inline boolean ssi_txfifofull(struct lm3s_ssidev_s *priv) * Name: ssi_rxfifoempty * * Description: - * Return TRUE if the Rx FIFO is empty + * Return true if the Rx FIFO is empty * * Input Parameters: * priv - Device-specific state data * * Returned Value: - * TRUE: Not empty + * true: Not empty * ****************************************************************************/ -static inline boolean ssi_rxfifoempty(struct lm3s_ssidev_s *priv) +static inline bool ssi_rxfifoempty(struct lm3s_ssidev_s *priv) { return (ssi_getreg(priv, LM3S_SSI_SR_OFFSET) & SSI_SR_RNE) == 0; } @@ -583,7 +592,7 @@ static inline int ssi_performtx(struct lm3s_ssidev_s *priv) static int ssi_performtx(struct lm3s_ssidev_s *priv) { #ifndef CONFIG_SSI_POLLWAIT - uint32 regval; + uint32_t regval; #endif int ntxd = 0; /* Number of words written to Tx FIFO */ @@ -666,7 +675,7 @@ static int ssi_performtx(struct lm3s_ssidev_s *priv) static inline void ssi_performrx(struct lm3s_ssidev_s *priv) { #ifndef CONFIG_SSI_POLLWAIT - uint32 regval; + uint32_t regval; #endif /* Loop while data is available in the Rx FIFO */ @@ -728,9 +737,9 @@ static inline void ssi_performrx(struct lm3s_ssidev_s *priv) * txbuffer - The buffer of data to send to the device (may be NULL). * rxbuffer - The buffer to receive data from the device (may be NULL). * nwords - The total number of words to be exchanged. If the interface - * uses <= 8 bits per word, then this is the number of ubytes; + * uses <= 8 bits per word, then this is the number of uint8_t's; * if the interface uses >8 bits per word, then this is the - * number of uint16's + * number of uint16_t's * * Returned Value: * 0: success, <0:Negated error number on failure @@ -750,11 +759,11 @@ static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, /* Set up to perform the transfer */ - priv->txbuffer = (ubyte*)txbuffer; /* Source buffer */ - priv->rxbuffer = (ubyte*)rxbuffer; /* Destination buffer */ - priv->ntxwords = nwords; /* Number of words left to send */ - priv->nrxwords = 0; /* Number of words received */ - priv->nwords = nwords; /* Total number of exchanges */ + priv->txbuffer = (uint8_t*)txbuffer; /* Source buffer */ + priv->rxbuffer = (uint8_t*)rxbuffer; /* Destination buffer */ + priv->ntxwords = nwords; /* Number of words left to send */ + priv->nrxwords = 0; /* Number of words received */ + priv->nwords = nwords; /* Total number of exchanges */ /* Set up the low-level data transfer function pointers */ @@ -765,8 +774,8 @@ static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, } else { - priv->txword = ssi_txubyte; - priv->rxword = ssi_rxubyte; + priv->txword = ssi_txuint8; + priv->rxword = ssi_rxuint8; } if (!txbuffer) @@ -893,9 +902,9 @@ static inline struct lm3s_ssidev_s *ssi_mapirq(int irq) * txbuffer - The buffer of data to send to the device (may be NULL). * rxbuffer - The buffer to receive data from the device (may be NULL). * nwords - The total number of words to be exchanged. If the interface - * uses <= 8 bits per word, then this is the number of ubytes; + * uses <= 8 bits per word, then this is the number of uint8_t's; * if the interface uses >8 bits per word, then this is the - * number of uint16's + * number of uint16_t's * * Returned Value: * 0: success, <0:Negated error number on failure @@ -906,7 +915,7 @@ static inline struct lm3s_ssidev_s *ssi_mapirq(int irq) static int ssi_interrupt(int irq, void *context) { struct lm3s_ssidev_s *priv = ssi_mapirq(irq); - uint32 regval; + uint32_t regval; int ntxd; DEBUGASSERT(priv != NULL); @@ -974,12 +983,12 @@ static int ssi_interrupt(int irq, void *context) * ****************************************************************************/ -static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32 frequency) +static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32_t frequency) { - uint32 maxdvsr; - uint32 cpsdvsr; - uint32 regval; - uint32 scr; + uint32_t maxdvsr; + uint32_t cpsdvsr; + uint32_t regval; + uint32_t scr; ssidbg("frequency: %d\n", frequency); if (priv && frequency != priv->frequency) @@ -1055,10 +1064,10 @@ static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32 frequenc } } -static uint32 ssi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) +static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s *)dev; - uint32 enable; + uint32_t enable; /* NOTE that the SSI must be disabled when setting any configuration registers. */ @@ -1087,8 +1096,8 @@ static uint32 ssi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode) { - uint32 modebits; - uint32 regval; + uint32_t modebits; + uint32_t regval; ssidbg("mode: %d\n", mode); if (priv && mode != priv->mode) @@ -1130,7 +1139,7 @@ static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s *)dev; - uint32 enable; + uint32_t enable; /* NOTE that the SSI must be disabled when setting any configuration registers. */ @@ -1158,7 +1167,7 @@ static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits) { - uint32 regval; + uint32_t regval; ssidbg("nbits: %d\n", nbits); if (priv && nbits != priv->nbits && nbits >=4 && nbits <= 16) @@ -1176,7 +1185,7 @@ static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits) static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s *)dev; - uint32 enable; + uint32_t enable; /* NOTE that the SSI must be disabled when setting any configuration registers. */ @@ -1203,10 +1212,10 @@ static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits) * ****************************************************************************/ -static uint16 ssi_send(FAR struct spi_dev_s *dev, uint16 wd) +static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s*)dev; - uint16 response = 0; + uint16_t response = 0; (void)ssi_transfer(priv, &wd, &response, 1); return response; @@ -1225,7 +1234,7 @@ static uint16 ssi_send(FAR struct spi_dev_s *dev, uint16 wd) * nwords - the length of data that to be exchanged in units of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1253,7 +1262,7 @@ static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, * nwords - the length of data to send from the buffer in number of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1280,7 +1289,7 @@ static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size * nwords - the length of data that can be received in the buffer in number * of words. The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1325,7 +1334,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) { struct lm3s_ssidev_s *priv; irqstate_t flags; - ubyte regval; + uint8_t regval; ssidbg("port: %d\n", port); diff --git a/arch/arm/src/lm3s/lm3s_start.c b/arch/arm/src/lm3s/lm3s_start.c index 272cb8210e..272ebec173 100644 --- a/arch/arm/src/lm3s/lm3s_start.c +++ b/arch/arm/src/lm3s/lm3s_start.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -51,7 +51,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -96,8 +96,8 @@ extern void lm3s_vectors(void); void __start(void) { - const uint32 *src; - uint32 *dest; + const uint32_t *src; + uint32_t *dest; /* Configure the uart so that we can get debug output as soon as possible */ diff --git a/arch/arm/src/lm3s/lm3s_syscontrol.c b/arch/arm/src/lm3s/lm3s_syscontrol.c index 464cabd1c6..f7a9528c1f 100644 --- a/arch/arm/src/lm3s/lm3s_syscontrol.c +++ b/arch/arm/src/lm3s/lm3s_syscontrol.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -52,7 +52,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ #define RCC_OSCMASK (SYSCON_RCC_IOSCDIS|SYSCON_RCC_MOSCDIS) @@ -86,7 +86,7 @@ * ****************************************************************************/ -static inline void lm3s_delay(uint32 delay) +static inline void lm3s_delay(uint32_t delay) { __asm__ __volatile__("1:\n" "\tsubs %0, #1\n" @@ -104,19 +104,19 @@ static inline void lm3s_delay(uint32 delay) * ****************************************************************************/ -static inline void lm3s_oscdelay(uint32 rcc, uint32 rcc2) +static inline void lm3s_oscdelay(uint32_t rcc, uint32_t rcc2) { /* Wait for the oscillator to stabilize. A smaller delay is used if the * current clock rate is very slow. */ - uint32 delay = FAST_OSCDELAY; + uint32_t delay = FAST_OSCDELAY; /* Are we currently using RCC2? */ if ((rcc2 & SYSCON_RCC2_USERCC2) != 0) { - uint32 rcc2src = rcc2 & SYSCON_RCC2_OSCSRC2_MASK; + uint32_t rcc2src = rcc2 & SYSCON_RCC2_OSCSRC2_MASK; if ((rcc2src == SYSCON_RCC2_OSCSRC2_30KHZ) || (rcc2src == SYSCON_RCC2_OSCSRC2_32KHZ)) { @@ -128,7 +128,7 @@ static inline void lm3s_oscdelay(uint32 rcc, uint32 rcc2) else { - uint32 rccsrc = rcc & SYSCON_RCC_OSCSRC_MASK; + uint32_t rccsrc = rcc & SYSCON_RCC_OSCSRC_MASK; if (rccsrc == SYSCON_RCC_OSCSRC_30KHZ) { delay = SLOW_OSCDELAY; @@ -150,7 +150,7 @@ static inline void lm3s_oscdelay(uint32 rcc, uint32 rcc2) static inline void lm3s_plllock(void) { - uint32 delay; + uint32_t delay; /* Loop until the lock is achieved or until a timeout occurs */ @@ -183,10 +183,10 @@ static inline void lm3s_plllock(void) * ****************************************************************************/ -void lm3s_clockconfig(uint32 newrcc, uint32 newrcc2) +void lm3s_clockconfig(uint32_t newrcc, uint32_t newrcc2) { - uint32 rcc; - uint32 rcc2; + uint32_t rcc; + uint32_t rcc2; /* Get the current values of the RCC and RCC2 registers */ diff --git a/arch/arm/src/lm3s/lm3s_syscontrol.h b/arch/arm/src/lm3s/lm3s_syscontrol.h index 885698dd33..13a2819abf 100644 --- a/arch/arm/src/lm3s/lm3s_syscontrol.h +++ b/arch/arm/src/lm3s/lm3s_syscontrol.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* System Control Register Offsets **************************************************/ diff --git a/arch/arm/src/lm3s/lm3s_timerisr.c b/arch/arm/src/lm3s/lm3s_timerisr.c index 714d68c7d3..ad5aa279de 100644 --- a/arch/arm/src/lm3s/lm3s_timerisr.c +++ b/arch/arm/src/lm3s/lm3s_timerisr.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include #include @@ -53,7 +54,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* The desired timer interrupt frequency is provided by the definition @@ -96,7 +97,7 @@ * ****************************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { /* Process timer interrupt */ @@ -115,7 +116,7 @@ int up_timerisr(int irq, uint32 *regs) void up_timerinit(void) { - uint32 regval; + uint32_t regval; /* Set the SysTick interrupt to the default priority */ diff --git a/arch/arm/src/lm3s/lm3s_uart.h b/arch/arm/src/lm3s/lm3s_uart.h index d027e17dc4..f807f0a2a9 100644 --- a/arch/arm/src/lm3s/lm3s_uart.h +++ b/arch/arm/src/lm3s/lm3s_uart.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* UART register offsets ************************************************************/ diff --git a/arch/arm/src/lpc214x/lpc214x_decodeirq.c b/arch/arm/src/lpc214x/lpc214x_decodeirq.c index faa47a4ec5..55b891bd3d 100644 --- a/arch/arm/src/lpc214x/lpc214x_decodeirq.c +++ b/arch/arm/src/lpc214x/lpc214x_decodeirq.c @@ -38,7 +38,8 @@ ********************************************************************************/ #include -#include + +#include #include #include #include @@ -68,7 +69,7 @@ /* This array maps 4 bits into the bit number of the lowest bit that it set */ #ifndef CONFIG_SUPPRESS_INTERRUPTS -static uint8 g_nibblemap[16] = { 0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0 }; +static uint8_t g_nibblemap[16] = { 0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0 }; #endif /******************************************************************************** @@ -103,9 +104,9 @@ static uint8 g_nibblemap[16] = { 0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0 ********************************************************************************/ #ifndef CONFIG_VECTORED_INTERRUPTS -void up_decodeirq(uint32 *regs) +void up_decodeirq(uint32_t *regs) #else -static void lpc214x_decodeirq( uint32 *regs) +static void lpc214x_decodeirq( uint32_t *regs) #endif { #ifdef CONFIG_SUPPRESS_INTERRUPTS @@ -118,7 +119,7 @@ static void lpc214x_decodeirq( uint32 *regs) * non-zero bit in the interrupt status register. */ - uint32 pending = vic_getreg(LPC214X_VIC_IRQSTATUS_OFFSET) & 0x007fffff; + uint32_t pending = vic_getreg(LPC214X_VIC_IRQSTATUS_OFFSET) & 0x007fffff; unsigned int nibble; unsigned int irq_base; unsigned int irq = NR_IRQS; @@ -160,7 +161,7 @@ static void lpc214x_decodeirq( uint32 *regs) } #ifdef CONFIG_VECTORED_INTERRUPTS -void up_decodeirq(uint32 *regs) +void up_decodeirq(uint32_t *regs) { vic_vector_t vector = (vic_vector_t)vic_getreg(LPC214X_VIC_VECTADDR_OFFSET); vector(regs); diff --git a/arch/arm/src/lpc214x/lpc214x_irq.c b/arch/arm/src/lpc214x/lpc214x_irq.c index 04668536aa..3f5d267f2e 100644 --- a/arch/arm/src/lpc214x/lpc214x_irq.c +++ b/arch/arm/src/lpc214x/lpc214x_irq.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include @@ -56,7 +57,7 @@ * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data @@ -91,7 +92,7 @@ void up_irqinitialize(void) /* Set the default vector */ - vic_putreg((uint32)up_decodeirq, LPC214X_VIC_DEFVECTADDR_OFFSET); + vic_putreg((uint32_t)up_decodeirq, LPC214X_VIC_DEFVECTADDR_OFFSET); /* Disable all vectored interrupts */ @@ -157,7 +158,7 @@ void up_enable_irq(int irq) * Interrupt Enable register. */ - uint32 val = vic_getreg(LPC214X_VIC_INTENABLE_OFFSET); + uint32_t val = vic_getreg(LPC214X_VIC_INTENABLE_OFFSET); vic_putreg(val | (1 << irq), LPC214X_VIC_INTENABLE_OFFSET); irqrestore(flags); } @@ -186,7 +187,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler) /* Save the vector address */ - vic_putreg((uint32)handler, LPC214X_VIC_VECTADDR0_OFFSET + offset); + vic_putreg((uint32_t)handler, LPC214X_VIC_VECTADDR0_OFFSET + offset); /* Enable the vectored interrupt */ diff --git a/arch/arm/src/lpc214x/lpc214x_serial.c b/arch/arm/src/lpc214x/lpc214x_serial.c index 74f8538300..f18af4fe06 100644 --- a/arch/arm/src/lpc214x/lpc214x_serial.c +++ b/arch/arm/src/lpc214x/lpc214x_serial.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc214x/lpc214x_serial.c * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,7 +38,10 @@ ****************************************************************************/ #include + #include +#include +#include #include #include #include @@ -68,32 +71,32 @@ struct up_dev_s { - uint32 uartbase; /* Base address of UART registers */ - uint32 baud; /* Configured baud */ - ubyte ier; /* Saved IER value */ - ubyte irq; /* IRQ associated with this UART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - boolean stopbits2; /* TRUE: Configure with 2 stop bits instead of 1 */ + uint32_t uartbase; /* Base address of UART registers */ + uint32_t baud; /* Configured baud */ + uint8_t ier; /* Saved IER value */ + uint8_t irq; /* IRQ associated with this UART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -200,7 +203,7 @@ static uart_dev_t g_uart1port = * Name: up_serialin ****************************************************************************/ -static inline ubyte up_serialin(struct up_dev_s *priv, int offset) +static inline uint8_t up_serialin(struct up_dev_s *priv, int offset) { return getreg8(priv->uartbase + offset); } @@ -209,7 +212,7 @@ static inline ubyte up_serialin(struct up_dev_s *priv, int offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, int offset, ubyte value) +static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value) { putreg8(value, priv->uartbase + offset); } @@ -218,7 +221,7 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, ubyte value) * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, ubyte *ier) +static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *ier) { if (ier) { @@ -233,7 +236,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, ubyte *ier) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, ubyte ier) +static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier) { priv->ier |= ier & LPC214X_IER_ALLIE; up_serialout(priv, LPC214X_UART_IER_OFFSET, priv->ier); @@ -263,9 +266,9 @@ static inline void up_waittxready(struct up_dev_s *priv) * Name: up_enablebreaks ****************************************************************************/ -static inline void up_enablebreaks(struct up_dev_s *priv, boolean enable) +static inline void up_enablebreaks(struct up_dev_s *priv, bool enable) { - ubyte lcr = up_serialin(priv, LPC214X_UART_LCR_OFFSET); + uint8_t lcr = up_serialin(priv, LPC214X_UART_LCR_OFFSET); if (enable) { lcr |= LPC214X_LCR_BREAK_ENABLE; @@ -291,8 +294,8 @@ static int up_setup(struct uart_dev_s *dev) { #ifndef CONFIG_SUPPRESS_LPC214X_UART_CONFIG struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint16 baud; - ubyte lcr; + uint16_t baud; + uint8_t lcr; /* Clear fifos */ @@ -451,7 +454,7 @@ static int up_interrupt(int irq, void *context) { struct uart_dev_s *dev = NULL; struct up_dev_s *priv; - ubyte status; + uint8_t status; int passes; if (g_uart1priv.irq == irq) @@ -583,7 +586,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { irqstate_t flags = irqsave(); - up_enablebreaks(priv, TRUE); + up_enablebreaks(priv, true); irqrestore(flags); } break; @@ -592,7 +595,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) { irqstate_t flags; flags = irqsave(); - up_enablebreaks(priv, FALSE); + up_enablebreaks(priv, false); irqrestore(flags); } break; @@ -616,10 +619,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - ubyte rbr; + uint8_t rbr; *status = up_serialin(priv, LPC214X_UART_LSR_OFFSET); rbr = up_serialin(priv, LPC214X_UART_RBR_OFFSET); @@ -634,7 +637,7 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -654,11 +657,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LPC214X_UART_LSR_OFFSET) & LPC214X_LSR_RDR) != 0); @@ -675,7 +678,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, LPC214X_UART_THR_OFFSET, (ubyte)ch); + up_serialout(priv, LPC214X_UART_THR_OFFSET, (uint8_t)ch); } /**************************************************************************** @@ -686,7 +689,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -706,11 +709,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LPC214X_UART_LSR_OFFSET) & LPC214X_LSR_THRE) != 0); @@ -720,11 +723,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LPC214X_UART_LSR_OFFSET) & LPC214X_LSR_THRE) != 0); @@ -748,7 +751,7 @@ void up_earlyserialinit(void) { /* Enable UART0 and 1 */ - uint32 pinsel = getreg32(LPC214X_PINSEL0); + uint32_t pinsel = getreg32(LPC214X_PINSEL0); pinsel &= ~(LPC214X_UART0_PINMASK|LPC214X_UART1_PINMASK); pinsel |= (LPC214X_UART0_PINSEL|LPC214X_UART1_PINSEL); putreg32(pinsel, LPC214X_PINSEL0); @@ -760,7 +763,7 @@ void up_earlyserialinit(void) /* Configuration whichever one is the console */ - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); } @@ -791,11 +794,11 @@ void up_serialinit(void) int up_putc(int ch) { struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - ubyte ier; + uint8_t ier; up_disableuartint(priv, &ier); up_waittxready(priv); - up_serialout(priv, LPC214X_UART_THR_OFFSET, (ubyte)ch); + up_serialout(priv, LPC214X_UART_THR_OFFSET, (uint8_t)ch); /* Check for LF */ diff --git a/arch/arm/src/lpc214x/lpc214x_timerisr.c b/arch/arm/src/lpc214x/lpc214x_timerisr.c index 1c6b9c69af..c75b5421e0 100644 --- a/arch/arm/src/lpc214x/lpc214x_timerisr.c +++ b/arch/arm/src/lpc214x/lpc214x_timerisr.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc214x/lpc214x_timerisr.c * - * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include #include @@ -91,9 +92,9 @@ ****************************************************************************/ #ifdef CONFIG_VECTORED_INTERRUPTS -int up_timerisr(uint32 *regs) +int up_timerisr(uint32_t *regs) #else -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) #endif { /* Process timer interrupt */ @@ -123,7 +124,7 @@ int up_timerisr(int irq, uint32 *regs) void up_timerinit(void) { - uint16 mcr; + uint16_t mcr; /* Clear all match and capture event interrupts */ diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.c b/arch/arm/src/lpc214x/lpc214x_usbdev.c index 2bee48e667..0149465d53 100644 --- a/arch/arm/src/lpc214x/lpc214x_usbdev.c +++ b/arch/arm/src/lpc214x/lpc214x_usbdev.c @@ -38,8 +38,10 @@ *******************************************************************************/ #include -#include +#include +#include +#include #include #include #include @@ -212,8 +214,8 @@ * assocated DMA buffer. */ -#define USB_UDCA (uint32*)LPC214X_USBDEV_RAMBASE) -#define USB_USCASIZE (LPC214X_NPHYSENDPOINTS*sizeof(uint32)) +#define USB_UDCA (uint32_t*)LPC214X_USBDEV_RAMBASE) +#define USB_USCASIZE (LPC214X_NPHYSENDPOINTS*sizeof(uint32_t)) /* Each descriptor must be aligned to a 128 address boundary */ @@ -224,9 +226,9 @@ #define USB_DDESC ((struct lpc214x_dmadesc_s*)(LPC214X_USBDEV_RAMBASE+USB_USCASIZE)) #ifdef CONFIG_USBDEV_ISOCHRONOUS -# define USB_DDESCSIZE (5*sizeof(uint32)) +# define USB_DDESCSIZE (5*sizeof(uint32_t)) #else -# define USB_DDESCSIZE (4*sizeof(uint32)) +# define USB_DDESCSIZE (4*sizeof(uint32_t)) #endif /* Endpoints ******************************************************************/ @@ -241,8 +243,8 @@ #define LPC214X_EPPHYIN(epphy) (((epphy)&1)!=0) #define LPC214X_EPPHYOUT(epphy) (((epphy)&1)==0) -#define LPC214X_EPPHYIN2LOG(epphy) (((ubyte)(epphy)>>1)|USB_DIR_IN) -#define LPC214X_EPPHYOUT2LOG(epphy) (((ubyte)(epphy)>>1)|USB_DIR_OUT) +#define LPC214X_EPPHYIN2LOG(epphy) (((uint8_t)(epphy)>>1)|USB_DIR_IN) +#define LPC214X_EPPHYOUT2LOG(epphy) (((uint8_t)(epphy)>>1)|USB_DIR_OUT) /* Each endpoint has somewhat different characteristics */ @@ -306,11 +308,11 @@ struct lpc214x_ep_s struct lpc214x_usbdev_s *dev; /* Reference to private driver data */ struct lpc214x_req_s *head; /* Request list for this endpoint */ struct lpc214x_req_s *tail; - ubyte epphy; /* Physical EP address */ - ubyte stalled:1; /* 1: Endpoint is stalled */ - ubyte halted:1; /* 1: Endpoint feature halted */ - ubyte txbusy:1; /* 1: TX endpoint FIFO full */ - ubyte txnullpkt:1; /* Null packet needed at end of transfer */ + uint8_t epphy; /* Physical EP address */ + uint8_t stalled:1; /* 1: Endpoint is stalled */ + uint8_t halted:1; /* 1: Endpoint feature halted */ + uint8_t txbusy:1; /* 1: TX endpoint FIFO full */ + uint8_t txnullpkt:1; /* Null packet needed at end of transfer */ }; /* This represents a DMA descriptor */ @@ -318,14 +320,14 @@ struct lpc214x_ep_s #ifdef CONFIG_LPC214X_USBDEV_DMA struct lpc214x_dmadesc_s { - uint32 nextdesc; /* Address of the next DMA descripto in RAM */ - uint32 config; /* Misc. bit encoded configuration information */ - uint32 start; /* DMA start address */ - uint32 status; /* Misc. bit encoded status inforamation */ + uint32_t nextdesc; /* Address of the next DMA descripto in RAM */ + uint32_t config; /* Misc. bit encoded configuration information */ + uint32_t start; /* DMA start address */ + uint32_t status; /* Misc. bit encoded status inforamation */ #ifdef CONFIG_USBDEV_ISOCHRONOUS - uint32 size; /* Isochronous packet size address */ + uint32_t size; /* Isochronous packet size address */ #endif - ubyte buffer[USB_DDSIZE-USB_DDESCSIZE]; + uint8_t buffer[USB_DDSIZE-USB_DDESCSIZE]; }; #endif @@ -346,18 +348,18 @@ struct lpc214x_usbdev_s /* LPC214X-specific fields */ - ubyte devstatus; /* Last response to device status command */ - ubyte ep0state; /* State of certain EP0 operations */ - ubyte paddr; /* Address assigned by SETADDRESS */ - ubyte stalled:1; /* 1: Protocol stalled */ - ubyte selfpowered:1; /* 1: Device is self powered */ - ubyte paddrset:1; /* 1: Peripheral addr has been set */ - ubyte attached:1; /* 1: Host attached */ - ubyte rxpending:1; /* 1: RX pending */ - uint32 softprio; /* Bitset of high priority interrupts */ - uint32 epavail; /* Bitset of available endpoints */ + uint8_t devstatus; /* Last response to device status command */ + uint8_t ep0state; /* State of certain EP0 operations */ + uint8_t paddr; /* Address assigned by SETADDRESS */ + uint8_t stalled:1; /* 1: Protocol stalled */ + uint8_t selfpowered:1; /* 1: Device is self powered */ + uint8_t paddrset:1; /* 1: Peripheral addr has been set */ + uint8_t attached:1; /* 1: Host attached */ + uint8_t rxpending:1; /* 1: RX pending */ + uint32_t softprio; /* Bitset of high priority interrupts */ + uint32_t epavail; /* Bitset of available endpoints */ #ifdef CONFIG_LPC214X_USBDEV_FRAME_INTERRUPT - uint32 sof; /* Last start-of-frame */ + uint32_t sof; /* Last start-of-frame */ #endif /* Allocated DMA descriptor */ @@ -378,8 +380,8 @@ struct lpc214x_usbdev_s /* Register operations ********************************************************/ #if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint32 lpc214x_getreg(uint32 addr); -static void lpc214x_putreg(uint32 val, uint32 addr); +static uint32_t lpc214x_getreg(uint32_t addr); +static void lpc214x_putreg(uint32_t val, uint32_t addr); #else # define lpc214x_getreg(addr) getreg32(addr) # define lpc214x_putreg(val,addr) putreg32(val,addr) @@ -387,7 +389,7 @@ static void lpc214x_putreg(uint32 val, uint32 addr); /* Command operations **********************************************************/ -static uint32 lpc214x_usbcmd(uint16 cmd, ubyte data); +static uint32_t lpc214x_usbcmd(uint16_t cmd, uint8_t data); /* Request queue operations ****************************************************/ @@ -397,11 +399,11 @@ static void lpc214x_rqenqueue(FAR struct lpc214x_ep_s *privep, /* Low level data transfers and request operations *****************************/ -static void lpc214x_epwrite(ubyte epphy, const ubyte *data, uint32 nbytes); -static int lpc214x_epread(ubyte epphy, ubyte *data, uint32 nbytes); +static void lpc214x_epwrite(uint8_t epphy, const uint8_t *data, uint32_t nbytes); +static int lpc214x_epread(uint8_t epphy, uint8_t *data, uint32_t nbytes); static inline void lpc214x_abortrequest(struct lpc214x_ep_s *privep, - struct lpc214x_req_s *privreq, sint16 result); -static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, sint16 result); + struct lpc214x_req_s *privreq, int16_t result); +static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, int16_t result); static int lpc214x_wrrequest(struct lpc214x_ep_s *privep); static int lpc214x_rdrequest(struct lpc214x_ep_s *privep); static void lpc214x_cancelrequests(struct lpc214x_ep_s *privep); @@ -409,13 +411,13 @@ static void lpc214x_cancelrequests(struct lpc214x_ep_s *privep); /* Interrupt handling **********************************************************/ static struct lpc214x_ep_s *lpc214x_epfindbyaddr(struct lpc214x_usbdev_s *priv, - uint16 eplog); -static void lpc214x_eprealize(struct lpc214x_ep_s *privep, boolean prio, - uint32 packetsize); -static ubyte lpc214x_epclrinterrupt(ubyte epphy); + uint16_t eplog); +static void lpc214x_eprealize(struct lpc214x_ep_s *privep, bool prio, + uint32_t packetsize); +static uint8_t lpc214x_epclrinterrupt(uint8_t epphy); static inline void lpc214x_ep0configure(struct lpc214x_usbdev_s *priv); #ifdef CONFIG_LPC214X_USBDEV_DMA -static inline void lpc214x_dmareset(uint32 enable); +static inline void lpc214x_dmareset(uint32_t enable); #endif static void lpc214x_usbreset(struct lpc214x_usbdev_s *priv); static void lpc214x_dispatchrequest(struct lpc214x_usbdev_s *priv, @@ -426,41 +428,41 @@ static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv); static int lpc214x_usbinterrupt(int irq, FAR void *context); #ifdef CONFIG_LPC214X_USBDEV_DMA -static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, ubyte epphy, - uint32 epmaxsize, uint32 nbytes, uint32 *isocpacket, - boolean isochronous); -static void lpc214x_dmarestart(ubyte epphy, uint32 descndx); -static void lpc214x_dmadisable(ubyte epphy); +static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, uint8_t epphy, + uint32_t epmaxsize, uint32_t nbytes, uint32_t *isocpacket, + bool isochronous); +static void lpc214x_dmarestart(uint8_t epphy, uint32_t descndx); +static void lpc214x_dmadisable(uint8_t epphy); #endif /* CONFIG_LPC214X_USBDEV_DMA */ /* Endpoint operations *********************************************************/ static int lpc214x_epconfigure(FAR struct usbdev_ep_s *ep, - const struct usb_epdesc_s *desc, boolean last); + const struct usb_epdesc_s *desc, bool last); static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep); static FAR struct usbdev_req_s *lpc214x_epallocreq(FAR struct usbdev_ep_s *ep); static void lpc214x_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *); #ifdef CONFIG_LPC214X_USBDEV_DMA static FAR void *lpc214x_epallocbuffer(FAR struct usbdev_ep_s *ep, - uint16 nbytes); + uint16_t nbytes); static void lpc214x_epfreebuffer(FAR struct usbdev_ep_s *ep, void *buf); #endif static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *req); static int lpc214x_epcancel(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *req); -static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, boolean resume); +static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, bool resume); /* USB device controller operations ********************************************/ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, - ubyte epno, boolean in, ubyte eptype); + uint8_t epno, bool in, uint8_t eptype); static void lpc214x_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep); static int lpc214x_getframe(struct usbdev_s *dev); static int lpc214x_wakeup(struct usbdev_s *dev); -static int lpc214x_selfpowered(struct usbdev_s *dev, boolean selfpowered); -static int lpc214x_pullup(struct usbdev_s *dev, boolean enable); +static int lpc214x_selfpowered(struct usbdev_s *dev, bool selfpowered); +static int lpc214x_pullup(struct usbdev_s *dev, bool enable); /******************************************************************************* * Private Data @@ -514,15 +516,15 @@ static const struct usbdev_ops_s g_devops = *******************************************************************************/ #if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint32 lpc214x_getreg(uint32 addr) +static uint32_t lpc214x_getreg(uint32_t addr) { - static uint32 prevaddr = 0; - static uint32 preval = 0; - static uint32 count = 0; + static uint32_t prevaddr = 0; + static uint32_t preval = 0; + static uint32_t count = 0; /* Read the value from the register */ - uint32 val = getreg32(addr); + uint32_t val = getreg32(addr); /* Is this the same value that we read from the same registe last time? Are * we polling the register? If so, suppress some of the output. @@ -576,7 +578,7 @@ static uint32 lpc214x_getreg(uint32 addr) *******************************************************************************/ #if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static void lpc214x_putreg(uint32 val, uint32 addr) +static void lpc214x_putreg(uint32_t val, uint32_t addr) { /* Show the register value being written */ @@ -596,10 +598,10 @@ static void lpc214x_putreg(uint32 val, uint32 addr) * *******************************************************************************/ -static uint32 lpc214x_usbcmd(uint16 cmd, ubyte data) +static uint32_t lpc214x_usbcmd(uint16_t cmd, uint8_t data) { irqstate_t flags; - uint32 tmp = 0; + uint32_t tmp = 0; /* Disable interrupt and clear CDFULL and CCEMPTY interrupt status */ @@ -782,10 +784,10 @@ static void lpc214x_rqenqueue(FAR struct lpc214x_ep_s *privep, * *******************************************************************************/ -static void lpc214x_epwrite(ubyte epphy, const ubyte *data, uint32 nbytes) +static void lpc214x_epwrite(uint8_t epphy, const uint8_t *data, uint32_t nbytes) { - uint32 value; - boolean aligned = (((uint32)data & 3) == 0); + uint32_t value; + bool aligned = (((uint32_t)data & 3) == 0); /* Set the write enable bit for this physical EP address. Bits 2-5 are * the logical endpoint number (0-15) @@ -808,12 +810,12 @@ static void lpc214x_epwrite(ubyte epphy, const ubyte *data, uint32 nbytes) { if (aligned) { - value = *(uint32*)data; + value = *(uint32_t*)data; } else { - value = (uint32)data[0] | ((uint32)data[1] << 8) | - ((uint32)data[2] << 16) | ((uint32)data[3] << 24); + value = (uint32_t)data[0] | ((uint32_t)data[1] << 8) | + ((uint32_t)data[2] << 16) | ((uint32_t)data[3] << 24); } lpc214x_putreg(value, LPC214X_USBDEV_TXDATA); @@ -843,12 +845,12 @@ static void lpc214x_epwrite(ubyte epphy, const ubyte *data, uint32 nbytes) * *******************************************************************************/ -static int lpc214x_epread(ubyte epphy, ubyte *data, uint32 nbytes) +static int lpc214x_epread(uint8_t epphy, uint8_t *data, uint32_t nbytes) { - uint32 pktlen; - uint32 result; - uint32 value; - ubyte aligned = 0; + uint32_t pktlen; + uint32_t result; + uint32_t value; + uint8_t aligned = 0; /* If data is NULL, then we are being asked to read but discard the data. * For most cases, the resulting buffer will be aligned and we will be @@ -857,7 +859,7 @@ static int lpc214x_epread(ubyte epphy, ubyte *data, uint32 nbytes) if (data) { - if (((uint32)data & 3) == 0) + if (((uint32_t)data & 3) == 0) { aligned = 1; } @@ -889,15 +891,15 @@ static int lpc214x_epread(ubyte epphy, ubyte *data, uint32 nbytes) value = lpc214x_getreg(LPC214X_USBDEV_RXDATA); if (aligned == 1) { - *(uint32*)data = value; + *(uint32_t*)data = value; data += 4; } else if (aligned == 2) { - *data++ = (ubyte)value; - *data++ = (ubyte)(value >> 8); - *data++ = (ubyte)(value >> 16); - *data++ = (ubyte)(value >> 24); + *data++ = (uint8_t)value; + *data++ = (uint8_t)(value >> 8); + *data++ = (uint8_t)(value >> 16); + *data++ = (uint8_t)(value >> 24); } } @@ -931,9 +933,9 @@ static int lpc214x_epread(ubyte epphy, ubyte *data, uint32 nbytes) static inline void lpc214x_abortrequest(struct lpc214x_ep_s *privep, struct lpc214x_req_s *privreq, - sint16 result) + int16_t result) { - usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_REQABORTED), (uint16)privep->epphy); + usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_REQABORTED), (uint16_t)privep->epphy); /* Save the result in the request structure */ @@ -952,7 +954,7 @@ static inline void lpc214x_abortrequest(struct lpc214x_ep_s *privep, * *******************************************************************************/ -static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, sint16 result) +static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, int16_t result) { struct lpc214x_req_s *privreq; int stalled = privep->stalled; @@ -1001,7 +1003,7 @@ static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, sint16 result) static int lpc214x_wrrequest(struct lpc214x_ep_s *privep) { struct lpc214x_req_s *privreq; - ubyte *buf; + uint8_t *buf; int nbytes; int bytesleft; @@ -1111,7 +1113,7 @@ static int lpc214x_wrrequest(struct lpc214x_ep_s *privep) static int lpc214x_rdrequest(struct lpc214x_ep_s *privep) { struct lpc214x_req_s *privreq; - ubyte *buf; + uint8_t *buf; int nbytesread; /* Check the request from the head of the endpoint request queue */ @@ -1189,7 +1191,7 @@ static void lpc214x_cancelrequests(struct lpc214x_ep_s *privep) *******************************************************************************/ static struct lpc214x_ep_s *lpc214x_epfindbyaddr(struct lpc214x_usbdev_s *priv, - uint16 eplog) + uint16_t eplog) { struct lpc214x_ep_s *privep; int i; @@ -1230,11 +1232,11 @@ static struct lpc214x_ep_s *lpc214x_epfindbyaddr(struct lpc214x_usbdev_s *priv, * *******************************************************************************/ -static void lpc214x_eprealize(struct lpc214x_ep_s *privep, boolean prio, uint32 packetsize) +static void lpc214x_eprealize(struct lpc214x_ep_s *privep, bool prio, uint32_t packetsize) { struct lpc214x_usbdev_s *priv = privep->dev; - uint32 mask; - uint32 reg; + uint32_t mask; + uint32_t reg; /* Initialize endpoint software priority */ @@ -1280,7 +1282,7 @@ static void lpc214x_eprealize(struct lpc214x_ep_s *privep, boolean prio, uint32 * *******************************************************************************/ -static ubyte lpc214x_epclrinterrupt(ubyte epphy) +static uint8_t lpc214x_epclrinterrupt(uint8_t epphy) { /* Clear the endpoint interrupt */ @@ -1305,7 +1307,7 @@ static ubyte lpc214x_epclrinterrupt(ubyte epphy) static inline void lpc214x_ep0configure(struct lpc214x_usbdev_s *priv) { - uint32 inten; + uint32_t inten; /* EndPoint 0 initialization */ @@ -1327,7 +1329,7 @@ static inline void lpc214x_ep0configure(struct lpc214x_usbdev_s *priv) *******************************************************************************/ #ifdef CONFIG_LPC214X_USBDEV_DMA -static inline void lpc214x_dmareset(uint32 enable) +static inline void lpc214x_dmareset(uint32_t enable) { int i; @@ -1364,7 +1366,7 @@ static inline void lpc214x_dmareset(uint32 enable) /* Set USB UDCA Head register */ - lpc214x_putreg((uint32)USB_UDCA, LPC214X_USBDEV_UDCAH); + lpc214x_putreg((uint32_t)USB_UDCA, LPC214X_USBDEV_UDCAH); /* Invalidate all DMA descriptors */ @@ -1474,10 +1476,10 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv) struct lpc214x_ep_s *privep; struct lpc214x_req_s *privreq = lpc214x_rqpeek(ep0); struct usb_ctrlreq_s ctrl; - uint16 value; - uint16 index; - uint16 len; - ubyte response[2]; + uint16_t value; + uint16_t index; + uint16_t len; + uint8_t response[2]; int ret; /* Starting a control request? */ @@ -1492,7 +1494,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv) while (!lpc214x_rqempty(ep0)) { - sint16 result = OK; + int16_t result = OK; if (privreq->req.xfrd != privreq->req.len) { result = -EPROTO; @@ -1509,7 +1511,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv) /* Read EP0 data */ - ret = lpc214x_epread(LPC214X_EP0_OUT, (ubyte*)&ctrl, USB_SIZEOF_CTRLREQ); + ret = lpc214x_epread(LPC214X_EP0_OUT, (uint8_t*)&ctrl, USB_SIZEOF_CTRLREQ); if (ret <= 0) { return; @@ -1642,7 +1644,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv) (privep = lpc214x_epfindbyaddr(priv, index)) != NULL) { privep->halted = 0; - ret = lpc214x_epstall(&privep->ep, TRUE); + ret = lpc214x_epstall(&privep->ep, true); lpc214x_epwrite(LPC214X_EP0_IN, NULL, 0); priv->ep0state = LPC214X_EP0STATUSIN; } @@ -1835,8 +1837,8 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv) if (priv->stalled) { usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_EP0SETUPSTALLED), priv->ep0state); - lpc214x_epstall(&ep0->ep, FALSE); - lpc214x_epstall(&ep0->ep, FALSE); + lpc214x_epstall(&ep0->ep, false); + lpc214x_epstall(&ep0->ep, false); } } @@ -1853,7 +1855,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv) static inline void lpc214x_ep0dataoutinterrupt(struct lpc214x_usbdev_s *priv) { struct lpc214x_ep_s *ep0; - uint32 pktlen; + uint32_t pktlen; /* Copy new setup packet into setup buffer */ @@ -1898,8 +1900,8 @@ static inline void lpc214x_ep0dataoutinterrupt(struct lpc214x_usbdev_s *priv) { usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_EP0OUTSTALLED), priv->ep0state); ep0 = &priv->eplist[LPC214X_EP0_OUT]; - lpc214x_epstall(&ep0->ep, FALSE); - lpc214x_epstall(&ep0->ep, FALSE); + lpc214x_epstall(&ep0->ep, false); + lpc214x_epstall(&ep0->ep, false); } return; } @@ -1936,7 +1938,7 @@ static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv) * default phase, and begins the address phase (still not fully configured) */ - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EP0INSETADDRESS), (uint16)priv->paddr); + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EP0INSETADDRESS), (uint16_t)priv->paddr); lpc214x_usbcmd(CMD_USB_DEV_CONFIG, 0); if (priv->paddr) { @@ -1965,8 +1967,8 @@ static inline void lpc214x_ep0dataininterrupt(struct lpc214x_usbdev_s *priv) { usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_EP0INSTALLED), priv->ep0state); ep0 = &priv->eplist[LPC214X_EP0_IN]; - lpc214x_epstall(&ep0->ep, FALSE); - lpc214x_epstall(&ep0->ep, FALSE); + lpc214x_epstall(&ep0->ep, false); + lpc214x_epstall(&ep0->ep, false); } } @@ -1983,15 +1985,15 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) struct lpc214x_usbdev_s *priv = &g_usbdev; struct lpc214x_ep_s *privep ; - uint32 devintstatus; /* Sampled state of the device interrupt status register */ - uint32 epintstatus; /* Sampled state of the endpoint interrupt status register */ + uint32_t devintstatus; /* Sampled state of the device interrupt status register */ + uint32_t epintstatus; /* Sampled state of the endpoint interrupt status register */ #ifdef CONFIG_LPC214X_USBDEV_DMA - uint32 dmaintstatus; /* Sampled state of dma interrupt status register */ + uint32_t dmaintstatus; /* Sampled state of dma interrupt status register */ #endif - uint32 softprio; /* Current priority interrupt bitset */ - uint32 pending; /* Pending subset of priority interrupt bitset */ - ubyte epphy; /* Physical endpoint number being processed */ - int i; + uint32_t softprio; /* Current priority interrupt bitset */ + uint32_t pending; /* Pending subset of priority interrupt bitset */ + uint8_t epphy; /* Physical endpoint number being processed */ + int i; usbtrace(TRACE_INTENTRY(LPC214X_TRACEINTID_USB), 0); @@ -2025,7 +2027,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) if ((devintstatus & USBDEV_DEVINT_EPRINT)) { - ubyte errcode; + uint8_t errcode; /* Clear the error interrupt */ @@ -2033,8 +2035,8 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) /* And show what error occurred */ - errcode = (ubyte)lpc214x_usbcmd(CMD_USB_DEV_READERRORSTATUS, 0) & 0x0f; - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPRINT), (uint16)errcode); + errcode = (uint8_t)lpc214x_usbcmd(CMD_USB_DEV_READERRORSTATUS, 0) & 0x0f; + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPRINT), (uint16_t)errcode); } #endif @@ -2050,7 +2052,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) /* Then read the start of frame value */ - priv->sof = (uint16)lpc214x_usbcmd(CMD_USB_DEV_READFRAMENO, 0); + priv->sof = (uint16_t)lpc214x_usbcmd(CMD_USB_DEV_READFRAMENO, 0); } #endif @@ -2064,15 +2066,15 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) /* Get device status */ - g_usbdev.devstatus = (ubyte)lpc214x_usbcmd(CMD_USB_DEV_GETSTATUS, 0); - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_DEVSTAT), (uint16)g_usbdev.devstatus); + g_usbdev.devstatus = (uint8_t)lpc214x_usbcmd(CMD_USB_DEV_GETSTATUS, 0); + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_DEVSTAT), (uint16_t)g_usbdev.devstatus); /* Device connection status */ if (DEVSTATUS_CONNCHG(g_usbdev.devstatus)) { usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_CONNECTCHG), - (uint16)g_usbdev.devstatus); + (uint16_t)g_usbdev.devstatus); if (DEVSTATUS_CONNECT(g_usbdev.devstatus)) { /* Host is connected */ @@ -2082,7 +2084,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) /* We have a transition from unattached to attached */ usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_CONNECTED), - (uint16)g_usbdev.devstatus); + (uint16_t)g_usbdev.devstatus); priv->usbdev.speed = USB_SPEED_UNKNOWN; lpc214x_usbcmd(CMD_USB_DEV_CONFIG, 0); priv->attached = 1; @@ -2094,7 +2096,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) else if (priv->attached) { usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_DISCONNECTED), - (uint16)g_usbdev.devstatus); + (uint16_t)g_usbdev.devstatus); priv->usbdev.speed = USB_SPEED_UNKNOWN; lpc214x_usbcmd(CMD_USB_DEV_CONFIG, 0); priv->attached = 0; @@ -2107,7 +2109,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) if (DEVSTATUS_SUSPCHG(g_usbdev.devstatus)) { usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_SUSPENDCHG), - (uint16)g_usbdev.devstatus); + (uint16_t)g_usbdev.devstatus); } /* Device reset */ @@ -2115,7 +2117,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) if (DEVSTATUS_RESET(g_usbdev.devstatus)) { usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_DEVRESET), - (uint16)g_usbdev.devstatus); + (uint16_t)g_usbdev.devstatus); lpc214x_usbreset(priv); } } @@ -2157,10 +2159,10 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) { /* Clear the endpoint interrupt */ - uint32 result = lpc214x_epclrinterrupt(LPC214X_CTRLEP_OUT); + uint32_t result = lpc214x_epclrinterrupt(LPC214X_CTRLEP_OUT); if (result & USBDEV_EPSETUPPACKET) { - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EP0SETUP), (uint16)result); + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EP0SETUP), (uint16_t)result); lpc214x_ep0setup(priv); } else @@ -2209,7 +2211,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) { /* IN: device-to-host */ - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPOUT), (uint16)epphy); + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPOUT), (uint16_t)epphy); if (priv->usbdev.speed == USB_SPEED_UNKNOWN) { priv->usbdev.speed = USB_SPEED_FULL; @@ -2225,7 +2227,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) { /* OUT: host-to-device */ - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPIN), (uint16)epphy); + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPIN), (uint16_t)epphy); /* Read host data into the current read request */ @@ -2254,7 +2256,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) { /* First Software High priority and then low priority */ - uint32 tmp; + uint32_t tmp; /* Collect the DMA interrupt sources */ @@ -2299,7 +2301,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) { if ((pending & 1) != 0) { - usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPDMA), (uint16)epphy); + usbtrace(TRACE_INTDECODE(LPC214X_TRACEINTID_EPDMA), (uint16_t)epphy); #warning DO WHAT? } } @@ -2319,12 +2321,12 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context) *******************************************************************************/ #ifdef CONFIG_LPC214X_USBDEV_DMA -static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, ubyte epphy, - uint32 epmaxsize, uint32 nbytes, uint32 *isocpacket, - boolean isochronous); +static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, uint8_t epphy, + uint32_t epmaxsize, uint32_t nbytes, uint32_t *isocpacket, + bool isochronous); { struct lpc214x_dmadesc_s *dmadesc = priv; - uint32 reg; + uint32_t reg; #ifdef CONFIG_DEBUG if (!priv || epphy < 2) @@ -2366,11 +2368,11 @@ static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, ubyte epphy, } #endif - dmadesc->start = (uint32)&dmadesc->buffer; + dmadesc->start = (uint32_t)&dmadesc->buffer; dmadesc->status = 0; #ifdef CONFIG_USBDEV_ISOCHRONOUS - dmadesc->size = (uint32)packet; + dmadesc->size = (uint32_t)packet; #endif /* Enable DMA tranfer for this endpoint */ @@ -2407,9 +2409,9 @@ static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, ubyte epphy, *******************************************************************************/ #ifdef CONFIG_LPC214X_USBDEV_DMA -static void lpc214x_dmarestart(ubyte epphy, uint32 descndx) +static void lpc214x_dmarestart(uint8_t epphy, uint32_t descndx) { - uint32 reg; + uint32_t reg; /* Clear DMA descriptor status */ @@ -2421,7 +2423,7 @@ static void lpc214x_dmarestart(ubyte epphy, uint32 descndx) /* Check the state of IN/OUT EP buffer */ - uint32 reg = lpc214x_usbcmd(CMD_USB_EP_SELECT | epphy, 0); + uint32_t reg = lpc214x_usbcmd(CMD_USB_EP_SELECT | epphy, 0); if ((LPC214X_EPPHYIN(epphy) && (reg & 0x60) == 0) || (LPC214X_EPPHYIN(epphy) && (reg & 0x60) == 0x60)) { @@ -2442,7 +2444,7 @@ static void lpc214x_dmarestart(ubyte epphy, uint32 descndx) *******************************************************************************/ #ifdef CONFIG_LPC214X_USBDEV_DMA -static void lpc214x_dmadisable(ubyte epphy) +static void lpc214x_dmadisable(uint8_t epphy) { EPDMADIS = 1 << epphy; } @@ -2461,7 +2463,7 @@ static void lpc214x_dmadisable(ubyte epphy) * Input Parameters: * ep - the struct usbdev_ep_s instance obtained from allocep() * desc - A struct usb_epdesc_s instance describing the endpoint - * last - TRUE if this this last endpoint to be configured. Some hardware + * last - true if this this last endpoint to be configured. Some hardware * needs to take special action when all of the endpoints have been * configured. * @@ -2469,10 +2471,10 @@ static void lpc214x_dmadisable(ubyte epphy) static int lpc214x_epconfigure(FAR struct usbdev_ep_s *ep, FAR const struct usb_epdesc_s *desc, - boolean last) + bool last) { FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep; - uint32 inten; + uint32_t inten; usbtrace(TRACE_EPCONFIGURE, privep->epphy); DEBUGASSERT(desc->addr == ep->eplog); @@ -2521,8 +2523,8 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep) { FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep; irqstate_t flags; - uint32 mask = (1 << privep->epphy); - uint32 reg; + uint32_t mask = (1 << privep->epphy); + uint32_t reg; #ifdef CONFIG_DEBUG if (!ep) @@ -2619,7 +2621,7 @@ static void lpc214x_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_ *******************************************************************************/ #ifdef CONFIG_LPC214X_USBDEV_DMA -static FAR void *lpc214x_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16 nbytes) +static FAR void *lpc214x_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t nbytes) { FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep; int descndx; @@ -2788,7 +2790,7 @@ static int lpc214x_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * *******************************************************************************/ -static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, boolean resume) +static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, bool resume) { FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep; irqstate_t flags; @@ -2823,21 +2825,21 @@ static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, boolean resume) * eplog - 7-bit logical endpoint number (direction bit ignored). Zero means * that any endpoint matching the other requirements will suffice. The * assigned endpoint can be found in the eplog field. - * in - TRUE: IN (device-to-host) endpoint requested + * in - true: IN (device-to-host) endpoint requested * eptype - Endpoint type. One of {USB_EP_ATTR_XFER_ISOC, USB_EP_ATTR_XFER_BULK, * USB_EP_ATTR_XFER_INT} * *******************************************************************************/ -static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, ubyte eplog, - boolean in, ubyte eptype) +static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t eplog, + bool in, uint8_t eptype) { FAR struct lpc214x_usbdev_s *priv = (FAR struct lpc214x_usbdev_s *)dev; - uint32 epset = LPC214X_EPALLSET & ~LPC214X_EPCTRLSET; + uint32_t epset = LPC214X_EPALLSET & ~LPC214X_EPCTRLSET; irqstate_t flags; int epndx = 0; - usbtrace(TRACE_DEVALLOCEP, (uint16)eplog); + usbtrace(TRACE_DEVALLOCEP, (uint16_t)eplog); /* Ignore any direction bits in the logical address */ @@ -2856,7 +2858,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, ubyte e if (eplog >= LPC214X_NLOGENDPOINTS) { - usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_BADEPNO), (uint16)eplog); + usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_BADEPNO), (uint16_t)eplog); return NULL; } @@ -2897,7 +2899,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, ubyte e case USB_EP_ATTR_XFER_CONTROL: /* Control endpoint -- not a valid choice */ default: - usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_BADEPTYPE), (uint16)eptype); + usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_BADEPTYPE), (uint16_t)eptype); return NULL; } @@ -2915,7 +2917,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, ubyte e for (epndx = 2; epndx < LPC214X_NPHYSENDPOINTS; epndx++) { - uint32 bit = 1 << epndx; + uint32_t bit = 1 << epndx; if ((epset & bit) != 0) { /* Mark the IN/OUT endpoint no longer available */ @@ -2933,7 +2935,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, ubyte e irqrestore(flags); } - usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_NOEP), (uint16)eplog); + usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_NOEP), (uint16_t)eplog); return NULL; } @@ -2951,7 +2953,7 @@ static void lpc214x_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep; irqstate_t flags; - usbtrace(TRACE_DEVFREEEP, (uint16)privep->epphy); + usbtrace(TRACE_DEVFREEEP, (uint16_t)privep->epphy); if (priv && privep) { @@ -2978,7 +2980,7 @@ static int lpc214x_getframe(struct usbdev_s *dev) /* Return last valid value of SOF read by the interrupt handler */ - usbtrace(TRACE_DEVGETFRAME, (uint16)priv->sof); + usbtrace(TRACE_DEVGETFRAME, (uint16_t)priv->sof); return priv->sof; #else /* Return the last frame number detected by the hardware */ @@ -2998,10 +3000,10 @@ static int lpc214x_getframe(struct usbdev_s *dev) static int lpc214x_wakeup(struct usbdev_s *dev) { - ubyte arg = USBDEV_DEVSTATUS_SUSPEND; + uint8_t arg = USBDEV_DEVSTATUS_SUSPEND; irqstate_t flags; - usbtrace(TRACE_DEVWAKEUP, (uint16)g_usbdev.devstatus); + usbtrace(TRACE_DEVWAKEUP, (uint16_t)g_usbdev.devstatus); flags = irqsave(); if (DEVSTATUS_CONNECT(g_usbdev.devstatus)) @@ -3022,11 +3024,11 @@ static int lpc214x_wakeup(struct usbdev_s *dev) * *******************************************************************************/ -static int lpc214x_selfpowered(struct usbdev_s *dev, boolean selfpowered) +static int lpc214x_selfpowered(struct usbdev_s *dev, bool selfpowered) { FAR struct lpc214x_usbdev_s *priv = (FAR struct lpc214x_usbdev_s *)dev; - usbtrace(TRACE_DEVSELFPOWERED, (uint16)selfpowered); + usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered); #ifdef CONFIG_DEBUG if (!dev) @@ -3048,9 +3050,9 @@ static int lpc214x_selfpowered(struct usbdev_s *dev, boolean selfpowered) * *******************************************************************************/ -static int lpc214x_pullup(struct usbdev_s *dev, boolean enable) +static int lpc214x_pullup(struct usbdev_s *dev, bool enable) { - usbtrace(TRACE_DEVPULLUP, (uint16)enable); + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); /* The USBDEV_DEVSTATUS_CONNECT bit in the CMD_USB_DEV_SETSTATUS command * controls the LPC214x SoftConnect_N output pin that is used for SoftConnect. @@ -3082,7 +3084,7 @@ static int lpc214x_pullup(struct usbdev_s *dev, boolean enable) void up_usbinitialize(void) { struct lpc214x_usbdev_s *priv = &g_usbdev; - uint32 reg; + uint32_t reg; int i; usbtrace(TRACE_DEVINIT, 0); @@ -3102,7 +3104,7 @@ void up_usbinitialize(void) for (i = 0; i < LPC214X_NPHYSENDPOINTS; i++) { - uint32 bit = 1 << i; + uint32_t bit = 1 << i; /* Set endpoint operations, reference to driver structure (not * really necessary because there is only one controller), and @@ -3157,7 +3159,7 @@ void up_usbinitialize(void) if (irq_attach(LPC214X_USB_IRQ, lpc214x_usbinterrupt) != 0) { usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_IRQREGISTRATION), - (uint16)LPC214X_USB_IRQ); + (uint16_t)LPC214X_USB_IRQ); goto errout; } @@ -3170,7 +3172,7 @@ void up_usbinitialize(void) /* Disconnect device */ - lpc214x_pullup(&priv->usbdev, FALSE); + lpc214x_pullup(&priv->usbdev, false); /* Enable EP0 for OUT (host-to-device) */ @@ -3197,7 +3199,7 @@ errout: void up_usbuninitialize(void) { struct lpc214x_usbdev_s *priv = &g_usbdev; - uint32 reg; + uint32_t reg; irqstate_t flags; usbtrace(TRACE_DEVUNINIT, 0); @@ -3211,7 +3213,7 @@ void up_usbuninitialize(void) /* Disconnect device */ flags = irqsave(); - lpc214x_pullup(&priv->usbdev, FALSE); + lpc214x_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; lpc214x_usbcmd(CMD_USB_DEV_CONFIG, 0); @@ -3267,7 +3269,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) ret = CLASS_BIND(driver, &g_usbdev.usbdev); if (ret) { - usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_BINDFAILED), (uint16)-ret); + usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_BINDFAILED), (uint16_t)-ret); g_usbdev.driver = NULL; } else diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.h b/arch/arm/src/lpc214x/lpc214x_usbdev.h index 9ed2550a85..67774f1fb0 100644 --- a/arch/arm/src/lpc214x/lpc214x_usbdev.h +++ b/arch/arm/src/lpc214x/lpc214x_usbdev.h @@ -1,7 +1,7 @@ /******************************************************************************* * arch/arm/src/lpc214x/lpc214x_usbdev.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,7 +41,6 @@ *******************************************************************************/ #include -#include /******************************************************************************* * Definitions diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h index 9256521fb7..f6430b2c15 100755 --- a/arch/arm/src/stm32/chip.h +++ b/arch/arm/src/stm32/chip.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Get customizations for each supported chip (only the STM32F103Z right now) */ diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h index a9860bebc5..b79b48c03f 100755 --- a/arch/arm/src/stm32/stm32_adc.h +++ b/arch/arm/src/stm32/stm32_adc.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_bkp.h b/arch/arm/src/stm32/stm32_bkp.h index 299ef48c81..fd69240e40 100644 --- a/arch/arm/src/stm32/stm32_bkp.h +++ b/arch/arm/src/stm32/stm32_bkp.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ #if defined(CONFIG_STM32_HIGHDENSITY) || defined(CONFIG_STM32_CONNECTIVITYLINE) diff --git a/arch/arm/src/stm32/stm32_can.h b/arch/arm/src/stm32/stm32_can.h index a35d8f9969..9d8ca9454c 100644 --- a/arch/arm/src/stm32/stm32_can.h +++ b/arch/arm/src/stm32/stm32_can.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* 3 TX mailboxes */ diff --git a/arch/arm/src/stm32/stm32_dgbmcu.h b/arch/arm/src/stm32/stm32_dgbmcu.h index 7757452f20..650b4b346e 100644 --- a/arch/arm/src/stm32/stm32_dgbmcu.h +++ b/arch/arm/src/stm32/stm32_dgbmcu.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Addresses ***************************************************************/ diff --git a/arch/arm/src/stm32/stm32_dma.c b/arch/arm/src/stm32/stm32_dma.c index 4599baada1..3050820d11 100755 --- a/arch/arm/src/stm32/stm32_dma.c +++ b/arch/arm/src/stm32/stm32_dma.c @@ -38,8 +38,9 @@ ****************************************************************************/ #include -#include +#include +#include #include #include #include @@ -83,10 +84,10 @@ struct stm32_dma_s { - ubyte chan; /* DMA channel number (0-6) */ - ubyte irq; /* DMA channel IRQ number */ + uint8_t chan; /* DMA channel number (0-6) */ + uint8_t irq; /* DMA channel IRQ number */ sem_t sem; /* Used to wait for DMA channel to become available */ - uint32 base; /* DMA register channel base address */ + uint32_t base; /* DMA register channel base address */ dma_callback_t callback; /* Callback invoked when the DMA completes */ void *arg; /* Argument passed to callback function */ }; @@ -181,28 +182,28 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] = /* Get non-channel register from DMA1 or DMA2 */ -static inline uint32 dmabase_getreg(struct stm32_dma_s *dmach, uint32 offset) +static inline uint32_t dmabase_getreg(struct stm32_dma_s *dmach, uint32_t offset) { return getreg32(DMA_BASE(dmach->base) + offset); } /* Write to non-channel register in DMA1 or DMA2 */ -static inline void dmabase_putreg(struct stm32_dma_s *dmach, uint32 offset, uint32 value) +static inline void dmabase_putreg(struct stm32_dma_s *dmach, uint32_t offset, uint32_t value) { putreg32(value, DMA_BASE(dmach->base) + offset); } /* Get channel register from DMA1 or DMA2 */ -static inline uint32 dmachan_getreg(struct stm32_dma_s *dmach, uint32 offset) +static inline uint32_t dmachan_getreg(struct stm32_dma_s *dmach, uint32_t offset) { return getreg32(dmach->base + offset); } /* Write to channel register in DMA1 or DMA2 */ -static inline void dmachan_putreg(struct stm32_dma_s *dmach, uint32 offset, uint32 value) +static inline void dmachan_putreg(struct stm32_dma_s *dmach, uint32_t offset, uint32_t value) { putreg32(value, dmach->base + offset); } @@ -244,7 +245,7 @@ static inline void stm32_dmagive(FAR struct stm32_dma_s *dmach) static void stm32_dmachandisable(struct stm32_dma_s *dmach) { - uint32 regval; + uint32_t regval; /* Disable all interrupts at the DMA controller */ @@ -272,7 +273,7 @@ static void stm32_dmachandisable(struct stm32_dma_s *dmach) static int stm32_dmainterrupt(int irq, void *context) { struct stm32_dma_s *dmach; - uint32 isr; + uint32_t isr; int chndx; /* Get the channel structure from the interrupt number */ @@ -447,10 +448,10 @@ void stm32_dmafree(DMA_HANDLE handle) * ****************************************************************************/ -void stm32_dmasetup(DMA_HANDLE handle, uint32 paddr, uint32 maddr, size_t ntransfers, uint32 ccr) +void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t ntransfers, uint32_t ccr) { struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle; - uint32 regval; + uint32_t regval; /* Set the peripheral register address in the DMA_CPARx register. The data * will be moved from/to this address to/from the memory after the @@ -498,11 +499,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32 paddr, uint32 maddr, size_t ntrans * ****************************************************************************/ -void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg, boolean half) +void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg, bool half) { struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle; int irq; - uint32 ccr; + uint32_t ccr; DEBUGASSERT(handle != NULL); @@ -592,7 +593,7 @@ void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs, const char *msg) { struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle; - uint32 dmabase = DMA_BASE(dmach->base); + uint32_t dmabase = DMA_BASE(dmach->base); dmadbg("DMA Registers: %s\n", msg); dmadbg(" ISRC[%08x]: %08x\n", dmabase + STM32_DMA_ISR_OFFSET, regs->isr); diff --git a/arch/arm/src/stm32/stm32_exti.h b/arch/arm/src/stm32/stm32_exti.h index c4e7947c16..b0e0329c25 100644 --- a/arch/arm/src/stm32/stm32_exti.h +++ b/arch/arm/src/stm32/stm32_exti.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ #ifdef CONFIG_STM32_CONNECTIVITYLINE diff --git a/arch/arm/src/stm32/stm32_flash.h b/arch/arm/src/stm32/stm32_flash.h index 8b22ae90b8..414641aa1c 100755 --- a/arch/arm/src/stm32/stm32_flash.h +++ b/arch/arm/src/stm32/stm32_flash.h @@ -41,12 +41,12 @@ ************************************************************************************/ #include -#include + #include "chip.h" #include "stm32_memorymap.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_fsmc.h b/arch/arm/src/stm32/stm32_fsmc.h index 86b8df8bd6..ff0bba2efd 100644 --- a/arch/arm/src/stm32/stm32_fsmc.h +++ b/arch/arm/src/stm32/stm32_fsmc.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c index 10bf482cb1..d10c9328b0 100755 --- a/arch/arm/src/stm32/stm32_gpio.c +++ b/arch/arm/src/stm32/stm32_gpio.c @@ -38,7 +38,9 @@ ****************************************************************************/ #include -#include + +#include +#include #include #include @@ -59,7 +61,7 @@ * Private Data ****************************************************************************/ -static const uint32 g_gpiobase[STM32_NGPIO_PORTS] = +static const uint32_t g_gpiobase[STM32_NGPIO_PORTS] = { #if STM32_NGPIO_PORTS > 0 STM32_GPIOA_BASE, @@ -104,17 +106,17 @@ static const char g_portchar[8] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' }; * ****************************************************************************/ -int stm32_configgpio(uint32 cfgset) +int stm32_configgpio(uint32_t cfgset) { - uint32 base; - uint32 cr; - uint32 regval; - uint32 regaddr; + uint32_t base; + uint32_t cr; + uint32_t regval; + uint32_t regaddr; unsigned int port; unsigned int pin; unsigned int pos; unsigned int modecnf; - boolean input; + bool input; /* Verify that this hardware supports the select GPIO port */ @@ -215,7 +217,7 @@ int stm32_configgpio(uint32 cfgset) regval = getreg32(regaddr); shift = AFIO_EXTICR_EXTI_SHIFT(pin); regval &= ~(AFIO_EXTICR_PORT_MASK << shift); - regval |= (((uint32)port) << shift); + regval |= (((uint32_t)port) << shift); putreg32(regval, regaddr); } @@ -259,10 +261,10 @@ int stm32_configgpio(uint32 cfgset) * ****************************************************************************/ -void stm32_gpiowrite(uint32 pinset, boolean value) +void stm32_gpiowrite(uint32_t pinset, bool value) { - uint32 base; - uint32 offset; + uint32_t base; + uint32_t offset; unsigned int port; unsigned int pin; @@ -299,9 +301,9 @@ void stm32_gpiowrite(uint32 pinset, boolean value) * ****************************************************************************/ -boolean stm32_gpioread(uint32 pinset) +bool stm32_gpioread(uint32_t pinset) { - uint32 base; + uint32_t base; unsigned int port; unsigned int pin; @@ -329,10 +331,10 @@ boolean stm32_gpioread(uint32 pinset) ****************************************************************************/ #ifdef CONFIG_DEBUG -int stm32_dumpgpio(uint32 pinset, const char *msg) +int stm32_dumpgpio(uint32_t pinset, const char *msg) { irqstate_t flags; - uint32 base; + uint32_t base; unsigned int port; unsigned int pin; diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h index c18d31557e..43377fce5b 100644 --- a/arch/arm/src/stm32/stm32_gpio.h +++ b/arch/arm/src/stm32/stm32_gpio.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ #define STM32_NGPIO_PORTS ((STM32_NGPIO + 15) >> 4) diff --git a/arch/arm/src/stm32/stm32_i2c.h b/arch/arm/src/stm32/stm32_i2c.h index a37aaeeedd..5df00d675e 100755 --- a/arch/arm/src/stm32/stm32_i2c.h +++ b/arch/arm/src/stm32/stm32_i2c.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_internal.h b/arch/arm/src/stm32/stm32_internal.h index bedec385c3..d7e40ba63e 100755 --- a/arch/arm/src/stm32/stm32_internal.h +++ b/arch/arm/src/stm32/stm32_internal.h @@ -41,7 +41,10 @@ ************************************************************************************/ #include + #include +#include +#include #include "up_internal.h" #include "chip.h" @@ -176,16 +179,16 @@ ************************************************************************************/ typedef FAR void *DMA_HANDLE; -typedef void (*dma_callback_t)(DMA_HANDLE handle, ubyte isr, void *arg); +typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t isr, void *arg); #ifdef CONFIG_DEBUG_DMA struct stm32_dmaregs_s { - uint32 isr; - uint32 ccr; - uint32 cndtr; - uint32 cpar; - uint32 cmar; + uint32_t isr; + uint32_t ccr; + uint32_t cndtr; + uint32_t cpar; + uint32_t cmar; }; #endif @@ -214,7 +217,7 @@ extern "C" { * and we will need to set the NVIC vector location to this alternative location. */ -extern uint32 stm32_vectors[]; /* See stm32_vectors.S */ +extern uint32_t stm32_vectors[]; /* See stm32_vectors.S */ /************************************************************************************ * Public Function Prototypes @@ -248,7 +251,7 @@ EXTERN void stm32_clockconfig(void); * ************************************************************************************/ -EXTERN int stm32_configgpio(uint32 cfgset); +EXTERN int stm32_configgpio(uint32_t cfgset); /************************************************************************************ * Name: stm32_gpiowrite @@ -258,7 +261,7 @@ EXTERN int stm32_configgpio(uint32 cfgset); * ************************************************************************************/ -EXTERN void stm32_gpiowrite(uint32 pinset, boolean value); +EXTERN void stm32_gpiowrite(uint32_t pinset, bool value); /************************************************************************************ * Name: stm32_gpioread @@ -268,7 +271,7 @@ EXTERN void stm32_gpiowrite(uint32 pinset, boolean value); * ************************************************************************************/ -EXTERN boolean stm32_gpioread(uint32 pinset); +EXTERN bool stm32_gpioread(uint32_t pinset); /************************************************************************************ * Function: stm32_dumpgpio @@ -279,7 +282,7 @@ EXTERN boolean stm32_gpioread(uint32 pinset); ************************************************************************************/ #ifdef CONFIG_DEBUG -EXTERN int stm32_dumpgpio(uint32 pinset, const char *msg); +EXTERN int stm32_dumpgpio(uint32_t pinset, const char *msg); #else # define stm32_dumpgpio(p,m) #endif @@ -347,8 +350,8 @@ EXTERN void stm32_dmafree(DMA_HANDLE handle); * ****************************************************************************/ -EXTERN void stm32_dmasetup(DMA_HANDLE handle, uint32 paddr, uint32 maddr, - size_t ntransfers, uint32 ccr); +EXTERN void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, + size_t ntransfers, uint32_t ccr); /**************************************************************************** * Name: stm32_dmastart @@ -363,7 +366,7 @@ EXTERN void stm32_dmasetup(DMA_HANDLE handle, uint32 paddr, uint32 maddr, ****************************************************************************/ EXTERN void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, - void *arg, boolean half); + void *arg, bool half); /**************************************************************************** * Name: stm32_dmastop @@ -465,12 +468,12 @@ EXTERN int stm32_ethinitialize(int intf); struct spi_dev_s; enum spi_dev_e; -EXTERN void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected); -EXTERN ubyte stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); -EXTERN void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected); -EXTERN ubyte stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); -EXTERN void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected); -EXTERN ubyte stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +EXTERN void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +EXTERN uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +EXTERN void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +EXTERN uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +EXTERN void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +EXTERN uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); /************************************************************************************ * Name: stm32_usbpullup @@ -485,7 +488,7 @@ EXTERN ubyte stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); ************************************************************************************/ struct usbdev_s; -EXTERN int stm32_usbpullup(FAR struct usbdev_s *dev, boolean enable); +EXTERN int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable); /************************************************************************************ * Name: stm32_usbsuspend @@ -499,7 +502,7 @@ EXTERN int stm32_usbpullup(FAR struct usbdev_s *dev, boolean enable); ************************************************************************************/ struct usbdev_s; -EXTERN void stm32_usbsuspend(FAR struct usbdev_s *dev, boolean resume); +EXTERN void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume); /**************************************************************************** * Name: sdio_initialize @@ -528,7 +531,7 @@ EXTERN FAR struct sdio_dev_s *sdio_initialize(int slotno); * * Input Parameters: * dev - An instance of the SDIO driver device state structure. - * cardinslot - TRUE is a card has been detected in the slot; FALSE if a + * cardinslot - true is a card has been detected in the slot; false if a * card has been removed from the slot. Only transitions * (inserted->removed or removed->inserted should be reported) * @@ -537,7 +540,7 @@ EXTERN FAR struct sdio_dev_s *sdio_initialize(int slotno); * ****************************************************************************/ -EXTERN void sdio_mediachange(FAR struct sdio_dev_s *dev, boolean cardinslot); +EXTERN void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot); /**************************************************************************** * Name: sdio_wrprotect @@ -548,14 +551,14 @@ EXTERN void sdio_mediachange(FAR struct sdio_dev_s *dev, boolean cardinslot); * * Input Parameters: * dev - An instance of the SDIO driver device state structure. - * wrprotect - TRUE is a card is writeprotected. + * wrprotect - true is a card is writeprotected. * * Returned Values: * None * ****************************************************************************/ -EXTERN void sdio_wrprotect(FAR struct sdio_dev_s *dev, boolean wrprotect); +EXTERN void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index 7ba4480791..802679479a 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -75,7 +75,7 @@ * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data @@ -211,7 +211,7 @@ static int stm32_reserved(int irq, FAR void *context) * ****************************************************************************/ -static int stm32_irqinfo(int irq, uint32 *regaddr, uint32 *bit) +static int stm32_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit) { DEBUGASSERT(irq >= STM32_IRQ_NMI && irq < NR_IRQS); @@ -293,7 +293,7 @@ void up_irqinitialize(void) */ #ifdef CONFIG_STM32_DFU - putreg32((uint32)stm32_vectors, NVIC_VECTAB); + putreg32((uint32_t)stm32_vectors, NVIC_VECTAB); #endif /* Set all interrrupts (and exceptions) to the default priority */ @@ -378,9 +378,9 @@ void up_irqinitialize(void) void up_disable_irq(int irq) { - uint32 regaddr; - uint32 regval; - uint32 bit; + uint32_t regaddr; + uint32_t regval; + uint32_t bit; if (stm32_irqinfo(irq, ®addr, &bit) == 0) { @@ -403,9 +403,9 @@ void up_disable_irq(int irq) void up_enable_irq(int irq) { - uint32 regaddr; - uint32 regval; - uint32 bit; + uint32_t regaddr; + uint32_t regval; + uint32_t bit; if (stm32_irqinfo(irq, ®addr, &bit) == 0) { @@ -445,8 +445,8 @@ void up_maskack_irq(int irq) #ifdef CONFIG_ARCH_IRQPRIO int up_prioritize_irq(int irq, int priority) { - uint32 regaddr; - uint32 regval; + uint32_t regaddr; + uint32_t regval; int shift; DEBUGASSERT(irq >= STM32_IRQ_MPU && irq < NR_IRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c index 2ba0f65a97..93e6b747f5 100644 --- a/arch/arm/src/stm32/stm32_lowputc.c +++ b/arch/arm/src/stm32/stm32_lowputc.c @@ -38,8 +38,8 @@ **************************************************************************/ #include -#include +#include #include #include "up_internal.h" @@ -224,7 +224,7 @@ void up_lowputc(char ch) /* Then send the character */ - putreg32((uint32)ch, STM32_CONSOLE_BASE + STM32_USART_DR_OFFSET); + putreg32((uint32_t)ch, STM32_CONSOLE_BASE + STM32_USART_DR_OFFSET); #endif } @@ -241,9 +241,9 @@ void up_lowputc(char ch) void stm32_lowsetup(void) { #if defined(CONFIG_STM32_USART1) || defined(CONFIG_STM32_USART2) || defined(CONFIG_STM32_USART3) - uint32 mapr; + uint32_t mapr; #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_USART_CONFIG) - uint32 cr; + uint32_t cr; #endif /* Enable the selected USARTs and configure GPIO pins need byed the diff --git a/arch/arm/src/stm32/stm32_memorymap.h b/arch/arm/src/stm32/stm32_memorymap.h index d07c91a2f2..09b91185f4 100755 --- a/arch/arm/src/stm32/stm32_memorymap.h +++ b/arch/arm/src/stm32/stm32_memorymap.h @@ -41,19 +41,19 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* FLASH and SRAM *******************************************************************/ #define STM32_FLASH_BASE 0x08000000 /* 0x08000000 - Up to 512Kb */ #define STM32_SRAM_BASE 0x20000000 /* 0x20000000 - 64Kb SRAM */ -#define STM32_SRAMBB_BASE 0x22000000 -#define STM32_PERIPH_BASE 0x40000000 +#define STM32_SRAMBB_BASE 0x22000000 +#define STM32_PERIPH_BASE 0x40000000 /* Register Base Address ************************************************************/ @@ -123,15 +123,15 @@ #define STM32_CRC_BASE 0x40028000 /* 0x40023000 - 0x400233ff: RC */ /* 0x40023400 - 0x40027fff: Reserved */ #define STM32_ETHERNET_BASE 0x40028000 /* 0x40028000 - 0x40029fff: Ethernet */ - /* 0x40030000 - 0x4fffffff: Reserved */ - -/* Peripheral BB base */ - -#define STM32_PERIPHBB_BASE 0x42000000 - -/* Flexible SRAM controller (FSMC) */ + /* 0x40030000 - 0x4fffffff: Reserved */ -#define STM32_FSMC_BASE 0xa0000000 +/* Peripheral BB base */ + +#define STM32_PERIPHBB_BASE 0x42000000 + +/* Flexible SRAM controller (FSMC) */ + +#define STM32_FSMC_BASE 0xa0000000 /* Other registers -- see cortexm3/nvic.h for standard Cortex-M3 registers in this * address range diff --git a/arch/arm/src/stm32/stm32_pwr.h b/arch/arm/src/stm32/stm32_pwr.h index 4b9964b090..bf2b733c3f 100644 --- a/arch/arm/src/stm32/stm32_pwr.h +++ b/arch/arm/src/stm32/stm32_pwr.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c index 543542309b..22c67d1204 100755 --- a/arch/arm/src/stm32/stm32_rcc.c +++ b/arch/arm/src/stm32/stm32_rcc.c @@ -38,8 +38,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -69,7 +69,7 @@ static inline void rcc_reset(void) { - uint32 regval; + uint32_t regval; putreg32(0, STM32_RCC_APB2RSTR); /* Disable APB2 Peripheral Reset */ putreg32(0, STM32_RCC_APB1RSTR); /* Disable APB1 Peripheral Reset */ @@ -102,7 +102,7 @@ static inline void rcc_reset(void) static inline void rcc_enableahb(void) { - uint32 regval; + uint32_t regval; /* Always enable FLITF clock and SRAM clock */ @@ -143,7 +143,7 @@ static inline void rcc_enableahb(void) static inline void rcc_enableapb1(void) { - uint32 regval; + uint32_t regval; #if CONFIG_STM32_USB /* USB clock divider. This bit must be valid before enabling the USB @@ -286,7 +286,7 @@ static inline void rcc_enableapb1(void) static inline void rcc_enableapb2(void) { - uint32 regval; + uint32_t regval; /* Set the appropriate bits in the APB2ENR register to enabled the * selected APB2 peripherals. @@ -379,8 +379,8 @@ static inline void rcc_enableapb2(void) void stm32_clockconfig(void) { - uint32 regval; - volatile sint32 timeout; + uint32_t regval; + volatile int32_t timeout; /* Make sure that we are starting in the reset state */ diff --git a/arch/arm/src/stm32/stm32_rcc.h b/arch/arm/src/stm32/stm32_rcc.h index eacb655225..c690033ee9 100755 --- a/arch/arm/src/stm32/stm32_rcc.h +++ b/arch/arm/src/stm32/stm32_rcc.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_rtc.h b/arch/arm/src/stm32/stm32_rtc.h index cd448277c8..4ebff07a96 100644 --- a/arch/arm/src/stm32/stm32_rtc.h +++ b/arch/arm/src/stm32/stm32_rtc.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c index b23da9a05e..8500ae6612 100644 --- a/arch/arm/src/stm32/stm32_sdio.c +++ b/arch/arm/src/stm32/stm32_sdio.c @@ -38,8 +38,9 @@ ****************************************************************************/ #include -#include +#include +#include #include #include #include @@ -203,13 +204,13 @@ struct stm32_dev_s sem_t waitsem; /* Implements event waiting */ sdio_eventset_t waitevents; /* Set of events to be waited for */ - uint32 waitmask; /* Interrupt enables for event waiting */ + uint32_t waitmask; /* Interrupt enables for event waiting */ volatile sdio_eventset_t wkupevent; /* The event that caused the wakeup */ WDOG_ID waitwdog; /* Watchdog that handles event timeouts */ /* Callback support */ - ubyte cdstatus; /* Card status */ + uint8_t cdstatus; /* Card status */ sdio_eventset_t cbevents; /* Set of events to be cause callbacks */ worker_t callback; /* Registered callback function */ void *cbarg; /* Registered callback argument */ @@ -217,15 +218,15 @@ struct stm32_dev_s /* Interrupt mode data transfer support */ - uint32 *buffer; /* Address of current R/W buffer */ + uint32_t *buffer; /* Address of current R/W buffer */ size_t remaining; /* Number of bytes remaining in the transfer */ - uint32 xfrmask; /* Interrupt enables for data transfer */ + uint32_t xfrmask; /* Interrupt enables for data transfer */ /* DMA data transfer support */ - boolean widebus; /* Required for DMA support */ + bool widebus; /* Required for DMA support */ #ifdef CONFIG_SDIO_DMA - boolean dmamode; /* TRUE: DMA mode transfer */ + bool dmamode; /* true: DMA mode transfer */ DMA_HANDLE dma; /* Handle for DMA channel */ #endif }; @@ -235,15 +236,15 @@ struct stm32_dev_s #ifdef CONFIG_SDIO_XFRDEBUG struct stm32_sdioregs_s { - ubyte power; - uint16 clkcr; - uint16 dctrl; - uint32 dtimer; - uint32 dlen; - uint32 dcount; - uint32 sta; - uint32 mask; - uint32 fifocnt; + uint8_t power; + uint16_t clkcr; + uint16_t dctrl; + uint32_t dtimer; + uint32_t dlen; + uint32_t dcount; + uint32_t sta; + uint32_t mask; + uint32_t fifocnt; }; struct stm32_sampleregs_s @@ -261,107 +262,107 @@ struct stm32_sampleregs_s /* Low-level helpers ********************************************************/ -static void stm32_takesem(struct stm32_dev_s *priv); -#define stm32_givesem(priv) (sem_post(&priv->waitsem)) -static inline void stm32_setclkcr(uint32 clkcr); -static void stm32_configwaitints(struct stm32_dev_s *priv, uint32 waitmask, - sdio_eventset_t waitevents, sdio_eventset_t wkupevents); -static void stm32_configxfrints(struct stm32_dev_s *priv, uint32 xfrmask); -static void stm32_setpwrctrl(uint32 pwrctrl); -static inline uint32 stm32_getpwrctrl(void); +static void stm32_takesem(struct stm32_dev_s *priv); +#define stm32_givesem(priv) (sem_post(&priv->waitsem)) +static inline void stm32_setclkcr(uint32_t clkcr); +static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, + sdio_eventset_t waitevents, sdio_eventset_t wkupevents); +static void stm32_configxfrints(struct stm32_dev_s *priv, uint32_t xfrmask); +static void stm32_setpwrctrl(uint32_t pwrctrl); +static inline uint32_t stm32_getpwrctrl(void); /* DMA Helpers **************************************************************/ #ifdef CONFIG_SDIO_XFRDEBUG -static void stm32_sampleinit(void); -static void stm32_sdiosample(struct stm32_sdioregs_s *regs); -static void stm32_sample(struct stm32_dev_s *priv, int index); -static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg); -static void stm32_dumpsample(struct stm32_dev_s *priv, - struct stm32_sampleregs_s *regs, const char *msg); -static void stm32_dumpsamples(struct stm32_dev_s *priv); +static void stm32_sampleinit(void); +static void stm32_sdiosample(struct stm32_sdioregs_s *regs); +static void stm32_sample(struct stm32_dev_s *priv, int index); +static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg); +static void stm32_dumpsample(struct stm32_dev_s *priv, + struct stm32_sampleregs_s *regs, const char *msg); +static void stm32_dumpsamples(struct stm32_dev_s *priv); #else -# define stm32_sampleinit() -# define stm32_sample(priv,index) -# define stm32_dumpsamples(priv) +# define stm32_sampleinit() +# define stm32_sample(priv,index) +# define stm32_dumpsamples(priv) #endif #ifdef CONFIG_SDIO_DMA -static void stm32_dmacallback(DMA_HANDLE handle, ubyte isr, void *arg); +static void stm32_dmacallback(DMA_HANDLE handle, uint8_t isr, void *arg); #endif /* Data Transfer Helpers ****************************************************/ -static ubyte stm32_log2(uint16 value); -static void stm32_dataconfig(uint32 timeout, uint32 dlen, uint32 dctrl); -static void stm32_datadisable(void); -static void stm32_sendfifo(struct stm32_dev_s *priv); -static void stm32_recvfifo(struct stm32_dev_s *priv); -static void stm32_eventtimeout(int argc, uint32 arg); -static void stm32_endwait(struct stm32_dev_s *priv, sdio_eventset_t wkupevent); -static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupevent); +static uint8_t stm32_log2(uint16_t value); +static void stm32_dataconfig(uint32_t timeout, uint32_t dlen, uint32_t dctrl); +static void stm32_datadisable(void); +static void stm32_sendfifo(struct stm32_dev_s *priv); +static void stm32_recvfifo(struct stm32_dev_s *priv); +static void stm32_eventtimeout(int argc, uint32_t arg); +static void stm32_endwait(struct stm32_dev_s *priv, sdio_eventset_t wkupevent); +static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupevent); /* Interrupt Handling *******************************************************/ -static int stm32_interrupt(int irq, void *context); +static int stm32_interrupt(int irq, void *context); /* SDIO interface methods ***************************************************/ /* Initialization/setup */ -static void stm32_reset(FAR struct sdio_dev_s *dev); -static ubyte stm32_status(FAR struct sdio_dev_s *dev); -static void stm32_widebus(FAR struct sdio_dev_s *dev, boolean enable); -static void stm32_clock(FAR struct sdio_dev_s *dev, +static void stm32_reset(FAR struct sdio_dev_s *dev); +static uint8_t stm32_status(FAR struct sdio_dev_s *dev); +static void stm32_widebus(FAR struct sdio_dev_s *dev, bool enable); +static void stm32_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate); -static int stm32_attach(FAR struct sdio_dev_s *dev); +static int stm32_attach(FAR struct sdio_dev_s *dev); /* Command/Status/Data Transfer */ -static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32 cmd, - uint32 arg); -static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, - size_t nbytes); -static int stm32_sendsetup(FAR struct sdio_dev_s *dev, - FAR const ubyte *buffer, uint32 nbytes); -static int stm32_cancel(FAR struct sdio_dev_s *dev); +static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, + uint32_t arg); +static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, + size_t nbytes); +static int stm32_sendsetup(FAR struct sdio_dev_s *dev, + FAR const uint8_t *buffer, uint32_t nbytes); +static int stm32_cancel(FAR struct sdio_dev_s *dev); -static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32 cmd); -static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32 cmd, - uint32 *rshort); -static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32 cmd, - uint32 rlong[4]); -static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32 cmd, - uint32 *rshort); -static int stm32_recvnotimpl(FAR struct sdio_dev_s *dev, uint32 cmd, - uint32 *rnotimpl); +static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd); +static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rshort); +static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, + uint32_t rlong[4]); +static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rshort); +static int stm32_recvnotimpl(FAR struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rnotimpl); /* EVENT handler */ -static void stm32_waitenable(FAR struct sdio_dev_s *dev, - sdio_eventset_t eventset); +static void stm32_waitenable(FAR struct sdio_dev_s *dev, + sdio_eventset_t eventset); static sdio_eventset_t - stm32_eventwait(FAR struct sdio_dev_s *dev, uint32 timeout); -static void stm32_callbackenable(FAR struct sdio_dev_s *dev, - sdio_eventset_t eventset); -static int stm32_registercallback(FAR struct sdio_dev_s *dev, - worker_t callback, void *arg); + stm32_eventwait(FAR struct sdio_dev_s *dev, uint32_t timeout); +static void stm32_callbackenable(FAR struct sdio_dev_s *dev, + sdio_eventset_t eventset); +static int stm32_registercallback(FAR struct sdio_dev_s *dev, + worker_t callback, void *arg); /* DMA */ #ifdef CONFIG_SDIO_DMA -static boolean stm32_dmasupported(FAR struct sdio_dev_s *dev); -static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, - FAR ubyte *buffer, size_t buflen); -static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, - FAR const ubyte *buffer, size_t buflen); +static bool stm32_dmasupported(FAR struct sdio_dev_s *dev); +static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, + FAR uint8_t *buffer, size_t buflen); +static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, + FAR const uint8_t *buffer, size_t buflen); #endif /* Initialization/uninitialization/reset ************************************/ -static void stm32_callback(void *arg); -static void stm32_default(void); +static void stm32_callback(void *arg); +static void stm32_default(void); /**************************************************************************** * Private Data @@ -460,9 +461,9 @@ static void stm32_takesem(struct stm32_dev_s *priv) * ****************************************************************************/ -static inline void stm32_setclkcr(uint32 clkcr) +static inline void stm32_setclkcr(uint32_t clkcr) { - uint32 regval = getreg32(STM32_SDIO_CLKCR); + uint32_t regval = getreg32(STM32_SDIO_CLKCR); /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ @@ -495,7 +496,7 @@ static inline void stm32_setclkcr(uint32 clkcr) * ****************************************************************************/ -static void stm32_configwaitints(struct stm32_dev_s *priv, uint32 waitmask, +static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, sdio_eventset_t waitevents, sdio_eventset_t wkupevent) { @@ -528,7 +529,7 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32 waitmask, * ****************************************************************************/ -static void stm32_configxfrints(struct stm32_dev_s *priv, uint32 xfrmask) +static void stm32_configxfrints(struct stm32_dev_s *priv, uint32_t xfrmask) { irqstate_t flags; flags = irqsave(); @@ -552,9 +553,9 @@ static void stm32_configxfrints(struct stm32_dev_s *priv, uint32 xfrmask) * ****************************************************************************/ -static void stm32_setpwrctrl(uint32 pwrctrl) +static void stm32_setpwrctrl(uint32_t pwrctrl) { - uint32 regval; + uint32_t regval; regval = getreg32(STM32_SDIO_POWER); regval &= ~SDIO_POWER_PWRCTRL_MASK; @@ -578,7 +579,7 @@ static void stm32_setpwrctrl(uint32 pwrctrl) * ****************************************************************************/ -static inline uint32 stm32_getpwrctrl(void) +static inline uint32_t stm32_getpwrctrl(void) { return getreg32(STM32_SDIO_POWER) & SDIO_POWER_PWRCTRL_MASK; } @@ -613,9 +614,9 @@ static void stm32_sampleinit(void) #ifdef CONFIG_SDIO_XFRDEBUG static void stm32_sdiosample(struct stm32_sdioregs_s *regs) { - regs->power = (ubyte)getreg32(STM32_SDIO_POWER); - regs->clkcr = (uint16)getreg32(STM32_SDIO_CLKCR); - regs->dctrl = (uint16)getreg32(STM32_SDIO_DCTRL); + regs->power = (uint8_t)getreg32(STM32_SDIO_POWER); + regs->clkcr = (uint16_t)getreg32(STM32_SDIO_CLKCR); + regs->dctrl = (uint16_t)getreg32(STM32_SDIO_DCTRL); regs->dtimer = getreg32(STM32_SDIO_DTIMER); regs->dlen = getreg32(STM32_SDIO_DLEN); regs->dcount = getreg32(STM32_SDIO_DCOUNT); @@ -731,7 +732,7 @@ static void stm32_dumpsamples(struct stm32_dev_s *priv) ****************************************************************************/ #ifdef CONFIG_SDIO_DMA -static void stm32_dmacallback(DMA_HANDLE handle, ubyte isr, void *arg) +static void stm32_dmacallback(DMA_HANDLE handle, uint8_t isr, void *arg) { /* FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)arg; */ @@ -761,9 +762,9 @@ static void stm32_dmacallback(DMA_HANDLE handle, ubyte isr, void *arg) * ****************************************************************************/ -static ubyte stm32_log2(uint16 value) +static uint8_t stm32_log2(uint16_t value) { - ubyte log2 = 0; + uint8_t log2 = 0; /* 0000 0000 0000 0001 -> return 0, * 0000 0000 0000 001x -> return 1, @@ -790,9 +791,9 @@ static ubyte stm32_log2(uint16 value) * ****************************************************************************/ -static void stm32_dataconfig(uint32 timeout, uint32 dlen, uint32 dctrl) +static void stm32_dataconfig(uint32_t timeout, uint32_t dlen, uint32_t dctrl) { - uint32 regval = 0; + uint32_t regval = 0; /* Enable data path */ @@ -821,7 +822,7 @@ static void stm32_dataconfig(uint32 timeout, uint32 dlen, uint32 dctrl) static void stm32_datadisable(void) { - uint32 regval; + uint32_t regval; /* Disable the data path */ @@ -854,8 +855,8 @@ static void stm32_sendfifo(struct stm32_dev_s *priv) { union { - uint32 w; - ubyte b[2]; + uint32_t w; + uint8_t b[2]; } data; /* Loop while there is more data to be sent and the RX FIFO is not full */ @@ -865,12 +866,12 @@ static void stm32_sendfifo(struct stm32_dev_s *priv) { /* Is there a full word remaining in the user buffer? */ - if (priv->remaining >= sizeof(uint32)) + if (priv->remaining >= sizeof(uint32_t)) { /* Yes, transfer the word to the TX FIFO */ data.w = *priv->buffer++; - priv->remaining -= sizeof(uint32); + priv->remaining -= sizeof(uint32_t); } else { @@ -878,7 +879,7 @@ static void stm32_sendfifo(struct stm32_dev_s *priv) * padding with zero as necessary to extend to a full word. */ - ubyte *ptr = (ubyte *)priv->remaining; + uint8_t *ptr = (uint8_t *)priv->remaining; int i; data.w = 0; @@ -916,8 +917,8 @@ static void stm32_recvfifo(struct stm32_dev_s *priv) { union { - uint32 w; - ubyte b[2]; + uint32_t w; + uint8_t b[2]; } data; /* Loop while there is space to store the data and there is more @@ -930,18 +931,18 @@ static void stm32_recvfifo(struct stm32_dev_s *priv) /* Read the next word from the RX FIFO */ data.w = getreg32(STM32_SDIO_FIFO); - if (priv->remaining >= sizeof(uint32)) + if (priv->remaining >= sizeof(uint32_t)) { /* Transfer the whole word to the user buffer */ *priv->buffer++ = data.w; - priv->remaining -= sizeof(uint32); + priv->remaining -= sizeof(uint32_t); } else { /* Transfer any trailing fractional word */ - ubyte *ptr = (ubyte*)priv->buffer; + uint8_t *ptr = (uint8_t*)priv->buffer; int i; for (i = 0; i < priv->remaining; i++) @@ -965,7 +966,7 @@ static void stm32_recvfifo(struct stm32_dev_s *priv) * * Input Parameters: * argc - The number of arguments (should be 1) - * arg - The argument (state structure reference cast to uint32) + * arg - The argument (state structure reference cast to uint32_t) * * Returned Value: * None @@ -975,7 +976,7 @@ static void stm32_recvfifo(struct stm32_dev_s *priv) * ****************************************************************************/ -static void stm32_eventtimeout(int argc, uint32 arg) +static void stm32_eventtimeout(int argc, uint32_t arg) { struct stm32_dev_s *priv = (struct stm32_dev_s *)arg; @@ -1109,8 +1110,8 @@ static void stm32_endtransfer(struct stm32_dev_s *priv, sdio_eventset_t wkupeven static int stm32_interrupt(int irq, void *context) { struct stm32_dev_s *priv = &g_sdiodev; - uint32 enabled; - uint32 pending; + uint32_t enabled; + uint32_t pending; /* Loop while there are pending interrupts. Check the SDIO status * register. Mask out all bits that don't correspond to enabled @@ -1315,9 +1316,9 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) /* DMA data transfer support */ - priv->widebus = FALSE; /* Required for DMA support */ + priv->widebus = false; /* Required for DMA support */ #ifdef CONFIG_SDIO_DMA - priv->dmamode = FALSE; /* TRUE: DMA mode transfer */ + priv->dmamode = false; /* true: DMA mode transfer */ #endif /* Configure the SDIO peripheral */ @@ -1346,7 +1347,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) * ****************************************************************************/ -static ubyte stm32_status(FAR struct sdio_dev_s *dev) +static uint8_t stm32_status(FAR struct sdio_dev_s *dev) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; return priv->cdstatus; @@ -1362,14 +1363,14 @@ static ubyte stm32_status(FAR struct sdio_dev_s *dev) * * Input Parameters: * dev - An instance of the SDIO device interface - * wide - TRUE: wide bus (4-bit) bus mode enabled + * wide - true: wide bus (4-bit) bus mode enabled * * Returned Value: * None * ****************************************************************************/ -static void stm32_widebus(FAR struct sdio_dev_s *dev, boolean wide) +static void stm32_widebus(FAR struct sdio_dev_s *dev, bool wide) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; priv->widebus = wide; @@ -1392,8 +1393,8 @@ static void stm32_widebus(FAR struct sdio_dev_s *dev, boolean wide) static void stm32_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate) { - uint32 clckr; - uint32 enable = 1; + uint32_t clckr; + uint32_t enable = 1; switch (rate) { @@ -1489,10 +1490,10 @@ static int stm32_attach(FAR struct sdio_dev_s *dev) * ****************************************************************************/ -static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 arg) +static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg) { - uint32 regval; - uint32 cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT; + uint32_t regval; + uint32_t cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT; /* Set the SDIO Argument value */ @@ -1561,14 +1562,14 @@ static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 arg) * ****************************************************************************/ -static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, +static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, size_t nbytes) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; - uint32 dblocksize; + uint32_t dblocksize; DEBUGASSERT(priv != NULL && buffer != NULL && nbytes > 0); - DEBUGASSERT(((uint32)buffer & 3) == 0); + DEBUGASSERT(((uint32_t)buffer & 3) == 0); /* Reset the DPSM configuration */ @@ -1578,10 +1579,10 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, /* Save the destination buffer information for use by the interrupt handler */ - priv->buffer = (uint32*)buffer; + priv->buffer = (uint32_t*)buffer; priv->remaining = nbytes; #ifdef CONFIG_SDIO_DMA - priv->dmamode = FALSE; + priv->dmamode = false; #endif /* Then set up the SDIO data path */ @@ -1615,14 +1616,14 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, * ****************************************************************************/ -static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const ubyte *buffer, +static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer, size_t nbytes) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; - uint32 dblocksize; + uint32_t dblocksize; DEBUGASSERT(priv != NULL && buffer != NULL && nbytes > 0); - DEBUGASSERT(((uint32)buffer & 3) == 0); + DEBUGASSERT(((uint32_t)buffer & 3) == 0); /* Reset the DPSM configuration */ @@ -1632,10 +1633,10 @@ static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const ubyte *buffer, /* Save the source buffer information for use by the interrupt handler */ - priv->buffer = (uint32*)buffer; + priv->buffer = (uint32_t*)buffer; priv->remaining = nbytes; #ifdef CONFIG_SDIO_DMA - priv->dmamode = FALSE; + priv->dmamode = false; #endif /* Then set up the SDIO data path */ @@ -1721,10 +1722,10 @@ static int stm32_cancel(FAR struct sdio_dev_s *dev) * ****************************************************************************/ -static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32 cmd) +static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd) { - sint32 timeout; - uint32 events; + int32_t timeout; + uint32_t events; switch (cmd & MMCSD_RESPONSE_MASK) { @@ -1794,12 +1795,12 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32 cmd) * ****************************************************************************/ -static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 *rshort) +static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort) { #ifdef CONFIG_DEBUG - uint32 respcmd; + uint32_t respcmd; #endif - uint32 regval; + uint32_t regval; int ret = OK; /* R1 Command response (48-bit) @@ -1863,7 +1864,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 *rs /* Check response received is of desired command */ respcmd = getreg32(STM32_SDIO_RESPCMD); - if ((ubyte)(respcmd & SDIO_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK)) + if ((uint8_t)(respcmd & SDIO_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK)) { fdbg("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd); ret = -EINVAL; @@ -1879,9 +1880,9 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 *rs return ret; } -static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 rlong[4]) +static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlong[4]) { - uint32 regval; + uint32_t regval; int ret = OK; /* R2 CID, CSD register (136-bit) @@ -1932,9 +1933,9 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 rlong[4 return ret; } -static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 *rshort) +static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort) { - uint32 regval; + uint32_t regval; int ret = OK; /* R3 OCR (48-bit) @@ -1982,7 +1983,7 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 *rshor /* MMC responses not supported */ -static int stm32_recvnotimpl(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 *rnotimpl) +static int stm32_recvnotimpl(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rnotimpl) { putreg32(SDIO_RESPDONE_ICR|SDIO_CMDDONE_ICR, STM32_SDIO_ICR); return -ENOSYS; @@ -2016,7 +2017,7 @@ static void stm32_waitenable(FAR struct sdio_dev_s *dev, sdio_eventset_t eventset) { struct stm32_dev_s *priv = (struct stm32_dev_s*)dev; - uint32 waitmask; + uint32_t waitmask; DEBUGASSERT(priv != NULL); @@ -2072,7 +2073,7 @@ static void stm32_waitenable(FAR struct sdio_dev_s *dev, ****************************************************************************/ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev, - uint32 timeout) + uint32_t timeout) { struct stm32_dev_s *priv = (struct stm32_dev_s*)dev; sdio_eventset_t wkupevent = 0; @@ -2103,7 +2104,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev, delay = (timeout + (MSEC_PER_TICK-1)) / MSEC_PER_TICK; ret = wd_start(priv->waitwdog, delay, (wdentry_t)stm32_eventtimeout, - 1, (uint32)priv); + 1, (uint32_t)priv); if (ret != OK) { fdbg("ERROR: wd_start failed: %d\n", ret); @@ -2221,20 +2222,20 @@ static int stm32_registercallback(FAR struct sdio_dev_s *dev, * Name: stm32_dmasupported * * Description: - * Return TRUE if the hardware can support DMA + * Return true if the hardware can support DMA * * Input Parameters: * dev - An instance of the SDIO device interface * * Returned Value: - * TRUE if DMA is supported. + * true if DMA is supported. * ****************************************************************************/ #ifdef CONFIG_SDIO_DMA -static boolean stm32_dmasupported(FAR struct sdio_dev_s *dev) +static bool stm32_dmasupported(FAR struct sdio_dev_s *dev) { - return TRUE; + return true; } #endif @@ -2258,15 +2259,15 @@ static boolean stm32_dmasupported(FAR struct sdio_dev_s *dev) ****************************************************************************/ #ifdef CONFIG_SDIO_DMA -static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, +static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, size_t buflen) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; - uint32 dblocksize; + uint32_t dblocksize; int ret = -EINVAL; DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0); - DEBUGASSERT(((uint32)buffer & 3) == 0); + DEBUGASSERT(((uint32_t)buffer & 3) == 0); /* Reset the DPSM configuration */ @@ -2281,9 +2282,9 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, /* Save the destination buffer information for use by the interrupt handler */ - priv->buffer = (uint32*)buffer; + priv->buffer = (uint32_t*)buffer; priv->remaining = buflen; - priv->dmamode = TRUE; + priv->dmamode = true; /* Then set up the SDIO data path */ @@ -2295,13 +2296,13 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, stm32_configxfrints(priv, SDIO_DMARECV_MASK); putreg32(1, SDIO_DCTRL_DMAEN_BB); - stm32_dmasetup(priv->dma, STM32_SDIO_FIFO, (uint32)buffer, + stm32_dmasetup(priv->dma, STM32_SDIO_FIFO, (uint32_t)buffer, (buflen + 3) >> 2, SDIO_RXDMA32_CONFIG); /* Start the DMA */ stm32_sample(priv, SAMPLENDX_BEFORE_ENABLE); - stm32_dmastart(priv->dma, stm32_dmacallback, priv, FALSE); + stm32_dmastart(priv->dma, stm32_dmacallback, priv, false); stm32_sample(priv, SAMPLENDX_AFTER_SETUP); ret = OK; } @@ -2330,14 +2331,14 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR ubyte *buffer, #ifdef CONFIG_SDIO_DMA static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, - FAR const ubyte *buffer, size_t buflen) + FAR const uint8_t *buffer, size_t buflen) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; - uint32 dblocksize; + uint32_t dblocksize; int ret = -EINVAL; DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0); - DEBUGASSERT(((uint32)buffer & 3) == 0); + DEBUGASSERT(((uint32_t)buffer & 3) == 0); /* Reset the DPSM configuration */ @@ -2352,9 +2353,9 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, /* Save the source buffer information for use by the interrupt handler */ - priv->buffer = (uint32*)buffer; + priv->buffer = (uint32_t*)buffer; priv->remaining = buflen; - priv->dmamode = TRUE; + priv->dmamode = true; /* Then set up the SDIO data path */ @@ -2363,7 +2364,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, /* Configure the TX DMA */ - stm32_dmasetup(priv->dma, STM32_SDIO_FIFO, (uint32)buffer, + stm32_dmasetup(priv->dma, STM32_SDIO_FIFO, (uint32_t)buffer, (buflen + 3) >> 2, SDIO_TXDMA32_CONFIG); stm32_sample(priv, SAMPLENDX_BEFORE_ENABLE); @@ -2371,7 +2372,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev, /* Start the DMA */ - stm32_dmastart(priv->dma, stm32_dmacallback, priv, FALSE); + stm32_dmastart(priv->dma, stm32_dmacallback, priv, false); stm32_sample(priv, SAMPLENDX_AFTER_SETUP); /* Enable TX interrrupts */ @@ -2551,7 +2552,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno) * * Input Parameters: * dev - An instance of the SDIO driver device state structure. - * cardinslot - TRUE is a card has been detected in the slot; FALSE if a + * cardinslot - true is a card has been detected in the slot; false if a * card has been removed from the slot. Only transitions * (inserted->removed or removed->inserted should be reported) * @@ -2560,10 +2561,10 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno) * ****************************************************************************/ -void sdio_mediachange(FAR struct sdio_dev_s *dev, boolean cardinslot) +void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; - ubyte cdstatus; + uint8_t cdstatus; irqstate_t flags; /* Update card status */ @@ -2598,14 +2599,14 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, boolean cardinslot) * * Input Parameters: * dev - An instance of the SDIO driver device state structure. - * wrprotect - TRUE is a card is writeprotected. + * wrprotect - true is a card is writeprotected. * * Returned Values: * None * ****************************************************************************/ -void sdio_wrprotect(FAR struct sdio_dev_s *dev, boolean wrprotect) +void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; irqstate_t flags; diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index c94f08b03b..2ff783b0a1 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -38,8 +38,10 @@ ****************************************************************************/ #include -#include +#include +#include +#include #include #include #include @@ -161,33 +163,33 @@ struct up_dev_s { - uint32 usartbase; /* Base address of USART registers */ - uint32 apbclock; /* PCLK 1 or 2 frequency */ - uint32 baud; /* Configured baud */ - uint16 ie; /* Saved interrupt mask bits value */ - uint16 sr; /* Saved status bits */ - ubyte irq; /* IRQ associated with this USART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - boolean stopbits2; /* TRUE: Configure with 2 stop bits instead of 1 */ + uint32_t usartbase; /* Base address of USART registers */ + uint32_t apbclock; /* PCLK 1 or 2 frequency */ + uint32_t baud; /* Configured baud */ + uint16_t ie; /* Saved interrupt mask bits value */ + uint16_t sr; /* Saved status bits */ + uint8_t irq; /* IRQ associated with this USART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -325,7 +327,7 @@ static uart_dev_t g_usart3port = * Name: up_serialin ****************************************************************************/ -static inline uint32 up_serialin(struct up_dev_s *priv, int offset) +static inline uint32_t up_serialin(struct up_dev_s *priv, int offset) { return getreg32(priv->usartbase + offset); } @@ -334,7 +336,7 @@ static inline uint32 up_serialin(struct up_dev_s *priv, int offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, int offset, uint32 value) +static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value) { putreg16(value, priv->usartbase + offset); } @@ -343,9 +345,9 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32 value) * Name: up_restoreusartint ****************************************************************************/ -static void up_restoreusartint(struct up_dev_s *priv, uint16 ie) +static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) { - uint32 cr; + uint32_t cr; /* Save the interrupt mask */ @@ -368,12 +370,12 @@ static void up_restoreusartint(struct up_dev_s *priv, uint16 ie) * Name: up_disableusartint ****************************************************************************/ -static inline void up_disableusartint(struct up_dev_s *priv, uint16 *ie) +static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) { if (ie) { - uint32 cr1; - uint32 cr3; + uint32_t cr1; + uint32_t cr3; /* USART interrupts: * @@ -422,11 +424,11 @@ static int up_setup(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; #ifdef CONFIG_SUPPRESS_USART_CONFIG - uint32 uartdiv32; - uint32 mantissa; - uint32 fraction; - uint32 brr; - uint32 regval; + uint32_t uartdiv32; + uint32_t mantissa; + uint32_t fraction; + uint32_t brr; + uint32_t regval; /* Note: The logic here depends on the fact that that the USART module * was enabled and the pins were configured in stm32_lowsetup(). @@ -535,7 +537,7 @@ static int up_setup(struct uart_dev_s *dev) static void up_shutdown(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 regval; + uint32_t regval; /* Disable all interrupts */ @@ -616,7 +618,7 @@ static int up_interrupt(int irq, void *context) struct uart_dev_s *dev = NULL; struct up_dev_s *priv; int passes; - boolean handled; + bool handled; #ifdef CONFIG_STM32_USART1 if (g_usart1priv.irq == irq) @@ -648,10 +650,10 @@ static int up_interrupt(int irq, void *context) * until we have been looping for a long time. */ - handled = TRUE; + handled = true; for (passes = 0; passes < 256 && handled; passes++) { - handled = FALSE; + handled = false; /* Get the masked USART status and clear the pending interrupts. */ @@ -686,7 +688,7 @@ static int up_interrupt(int irq, void *context) /* Received data ready... process incoming bytes */ uart_recvchars(dev); - handled = TRUE; + handled = true; } /* Handle outgoing, transmit bytes */ @@ -696,7 +698,7 @@ static int up_interrupt(int irq, void *context) /* Transmit data regiser empty ... process outgoing bytes */ uart_xmitchars(dev); - handled = TRUE; + handled = true; } } return OK; @@ -739,7 +741,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */ { irqstate_t flags = irqsave(); - uint32 cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET); + uint32_t cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET); up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN); irqrestore(flags); } @@ -749,7 +751,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) { irqstate_t flags; flags = irqsave(); - uint32 cr1 = up_serialin(priv, STM32_USART_CR2_OFFSET); + uint32_t cr1 = up_serialin(priv, STM32_USART_CR2_OFFSET); up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN); irqrestore(flags); } @@ -774,10 +776,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 dr; + uint32_t dr; /* Get the Rx byte */ @@ -801,10 +803,10 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint16 ie; + uint16_t ie; /* USART receive interrupts: * @@ -850,11 +852,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive register is not empty + * Return true if the receive register is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, STM32_USART_SR_OFFSET) & USART_SR_RXNE) != 0); @@ -871,7 +873,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, STM32_USART_DR_OFFSET, (uint32)ch); + up_serialout(priv, STM32_USART_DR_OFFSET, (uint32_t)ch); } /**************************************************************************** @@ -882,7 +884,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; irqstate_t flags; @@ -924,11 +926,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit data register is empty + * Return true if the tranmsit data register is empty * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, STM32_USART_SR_OFFSET) & USART_SR_TXE) != 0); @@ -967,7 +969,7 @@ void up_earlyserialinit(void) /* Configuration whichever one is the console */ #ifdef HAVE_CONSOLE - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); #endif } @@ -1012,7 +1014,7 @@ int up_putc(int ch) { #ifdef HAVE_CONSOLE struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint16 ie; + uint16_t ie; up_disableusartint(priv, &ie); diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index 2ca8989c8b..bdea7da379 100755 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -53,7 +53,7 @@ * mmcsd_spislotinitialize(), for example, will bind the SPI driver to * the SPI MMC/SD driver). * - ************************************************************************************/ + ****************************************************c********************************/ /************************************************************************************ * Included Files @@ -61,6 +61,9 @@ #include +#include +#include +#include #include #include #include @@ -114,20 +117,20 @@ struct stm32_spidev_s { struct spi_dev_s spidev; /* Externally visible part of the SPI interface */ - uint32 spibase; /* SPIn base address */ - uint32 spiclock; /* Clocking for the SPI module */ - uint32 frequency; /* Requested clock frequency */ - uint32 actual; /* Actual clock frequency */ - ubyte nbits; /* Width of work in bits (8 or 16) */ - ubyte mode; /* Mode 0,1,2,3 */ + uint32_t spibase; /* SPIn base address */ + uint32_t spiclock; /* Clocking for the SPI module */ + uint32_t frequency; /* Requested clock frequency */ + uint32_t actual; /* Actual clock frequency */ + uint8_t nbits; /* Width of work in bits (8 or 16) */ + uint8_t mode; /* Mode 0,1,2,3 */ #ifdef CONFIG_STM32_SPI_INTERRUPTS - ubyte spiirq; /* SPI IRQ number */ + uint8_t spiirq; /* SPI IRQ number */ #endif #ifdef CONFIG_STM32_SPI_DMA - volatile ubyte rxresult; /* Result of the RX DMA */ - volatile ubyte txresult; /* Result of the RX DMA */ - ubyte rxch; /* The RX DMA channel number */ - ubyte txch; /* The TX DMA channel number */ + volatile uint8_t rxresult; /* Result of the RX DMA */ + volatile uint8_t txresult; /* Result of the RX DMA */ + uint8_t rxch; /* The RX DMA channel number */ + uint8_t txch; /* The TX DMA channel number */ DMA_HANDLE rxdma; /* DMA channel handle for RX transfers */ DMA_HANDLE txdma; /* DMA channel handle for TX transfers */ sem_t rxsem; /* Wait for RX DMA to complete */ @@ -142,49 +145,49 @@ struct stm32_spidev_s /* Helpers */ -static inline uint16 spi_getreg(FAR struct stm32_spidev_s *priv, ubyte offset); -static inline void spi_putreg(FAR struct stm32_spidev_s *priv, ubyte offset, - uint16 value); -static inline uint16 spi_readword(FAR struct stm32_spidev_s *priv); -static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16 byte); -static inline boolean spi_16bitmode(FAR struct stm32_spidev_s *priv); +static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset); +static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset, + uint16_t value); +static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv); +static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t byte); +static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv); /* DMA support */ #ifdef CONFIG_STM32_SPI_DMA -static void spi_dmarxwait(FAR struct stm32_spidev_s *priv); -static void spi_dmatxwait(FAR struct stm32_spidev_s *priv); -static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv); -static inline void spi_dmatxwakeup(FAR struct stm32_spidev_s *priv); -static void spi_dmarxcallback(DMA_HANDLE handle, ubyte isr, void *arg); -static void spi_dmatxcallback(DMA_HANDLE handle, ubyte isr, void *arg); -static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, - FAR void *rxbuffer, FAR void *rxdummy, size_t nwords); -static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, - FAR const void *txbuffer, FAR const void *txdummy, size_t nwords); -static inline void spi_dmarxstart(FAR struct stm32_spidev_s *priv); -static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv); +static void spi_dmarxwait(FAR struct stm32_spidev_s *priv); +static void spi_dmatxwait(FAR struct stm32_spidev_s *priv); +static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv); +static inline void spi_dmatxwakeup(FAR struct stm32_spidev_s *priv); +static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg); +static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg); +static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, + FAR void *rxbuffer, FAR void *rxdummy, size_t nwords); +static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, + FAR const void *txbuffer, FAR const void *txdummy, size_t nwords); +static inline void spi_dmarxstart(FAR struct stm32_spidev_s *priv); +static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv); #endif /* SPI methods */ -static int spi_lock(FAR struct spi_dev_s *dev, boolean lock); -static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency); -static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); -static void spi_setbits(FAR struct spi_dev_s *dev, int nbits); -static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd); -static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static int spi_lock(FAR struct spi_dev_s *dev, bool lock); +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency); +static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); +static void spi_setbits(FAR struct spi_dev_s *dev, int nbits); +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd); +static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, + FAR void *rxbuffer, size_t nwords); #ifndef CONFIG_SPI_EXCHANGE -static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, - size_t nwords); -static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, - size_t nwords); +static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, + size_t nwords); +static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, + size_t nwords); #endif /* Initialization */ -static void spi_portinitialize(FAR struct stm32_spidev_s *priv); +static void spi_portinitialize(FAR struct stm32_spidev_s *priv); /************************************************************************************ * Private Data @@ -315,7 +318,7 @@ static struct stm32_spidev_s g_spi3dev = * ************************************************************************************/ -static inline uint16 spi_getreg(FAR struct stm32_spidev_s *priv, ubyte offset) +static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset) { return getreg16(priv->spibase + offset); } @@ -336,7 +339,7 @@ static inline uint16 spi_getreg(FAR struct stm32_spidev_s *priv, ubyte offset) * ************************************************************************************/ -static inline void spi_putreg(FAR struct stm32_spidev_s *priv, ubyte offset, uint16 value) +static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset, uint16_t value) { putreg16(value, priv->spibase + offset); } @@ -355,7 +358,7 @@ static inline void spi_putreg(FAR struct stm32_spidev_s *priv, ubyte offset, uin * ************************************************************************************/ -static inline uint16 spi_readword(FAR struct stm32_spidev_s *priv) +static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv) { /* Wait until the receive buffer is not empty */ @@ -381,7 +384,7 @@ static inline uint16 spi_readword(FAR struct stm32_spidev_s *priv) * ************************************************************************************/ -static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16 word) +static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word) { /* Wait until the transmit buffer is empty */ @@ -402,11 +405,11 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16 word) * priv - Device-specific state data * * Returned Value: - * TRUE: 16-bit mode, FALSE: 8-bit mode + * true: 16-bit mode, false: 8-bit mode * ************************************************************************************/ -static inline boolean spi_16bitmode(FAR struct stm32_spidev_s *priv) +static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv) { return ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_DFF) != 0); } @@ -487,7 +490,7 @@ static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv) ************************************************************************************/ #ifdef CONFIG_STM32_SPI_DMA -static void spi_dmarxcallback(DMA_HANDLE handle, ubyte isr, void *arg) +static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)arg; priv->rxresult = isr | 0x080; /* OR'ed with 0x80 to assure non-zero */ @@ -504,7 +507,7 @@ static void spi_dmarxcallback(DMA_HANDLE handle, ubyte isr, void *arg) ************************************************************************************/ #ifdef CONFIG_STM32_SPI_DMA -static void spi_dmatxcallback(DMA_HANDLE handle, ubyte isr, void *arg) +static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)arg; priv->txresult = isr | 0x080; /* OR'ed with 0x80 to assure non-zero */ @@ -524,7 +527,7 @@ static void spi_dmatxcallback(DMA_HANDLE handle, ubyte isr, void *arg) static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer, FAR void *rxdummy, size_t nwords) { - uint32 ccr; + uint32_t ccr; /* 8- or 16-bit mode? */ @@ -559,7 +562,7 @@ static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer, /* Configure the RX DMA */ - stm32_dmasetup(priv->rxdma, priv->spibase + STM32_SPI_DR_OFFSET, (uint32)rxbuffer, nwords, ccr); + stm32_dmasetup(priv->rxdma, priv->spibase + STM32_SPI_DR_OFFSET, (uint32_t)rxbuffer, nwords, ccr); } #endif @@ -575,7 +578,7 @@ static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer, static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbuffer, FAR const void *txdummy, size_t nwords) { - uint32 ccr; + uint32_t ccr; /* 8- or 16-bit mode? */ @@ -610,7 +613,7 @@ static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbu /* Setup the TX DMA */ - stm32_dmasetup(priv->txdma, priv->spibase + STM32_SPI_DR_OFFSET,(uint32)txbuffer, nwords, ccr); + stm32_dmasetup(priv->txdma, priv->spibase + STM32_SPI_DR_OFFSET,(uint32_t)txbuffer, nwords, ccr); } #endif @@ -625,7 +628,7 @@ static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbu #ifdef CONFIG_STM32_SPI_DMA static inline void spi_dmarxstart(FAR struct stm32_spidev_s *priv) { - stm32_dmastart(priv->rxdma, spi_dmarxcallback, priv, FALSE); + stm32_dmastart(priv->rxdma, spi_dmarxcallback, priv, false); } #endif @@ -640,7 +643,7 @@ static inline void spi_dmarxstart(FAR struct stm32_spidev_s *priv) #ifdef CONFIG_STM32_SPI_DMA static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv) { - stm32_dmastart(priv->txdma, spi_dmatxcallback, priv, FALSE); + stm32_dmastart(priv->txdma, spi_dmatxcallback, priv, false); } #endif @@ -660,9 +663,9 @@ static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv) * ************************************************************************************/ -static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16 setbits, uint16 clrbits) +static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits) { - uint16 cr1; + uint16_t cr1; cr1 = spi_getreg(priv, STM32_SPI_CR1_OFFSET); cr1 &= ~clrbits; cr1 |= setbits; @@ -683,14 +686,14 @@ static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16 setbits, uint1 * * Input Parameters: * dev - Device-specific state data - * lock - TRUE: Lock spi bus, FALSE: unlock SPI bus + * lock - true: Lock spi bus, false: unlock SPI bus * * Returned Value: * None * ****************************************************************************/ -static int spi_lock(FAR struct spi_dev_s *dev, boolean lock) +static int spi_lock(FAR struct spi_dev_s *dev, bool lock) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; @@ -729,11 +732,11 @@ static int spi_lock(FAR struct spi_dev_s *dev, boolean lock) * ************************************************************************************/ -static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) +static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; - uint16 setbits; - uint32 actual; + uint16_t setbits; + uint32_t actual; /* Has the frequency changed? */ @@ -823,8 +826,8 @@ static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; - uint16 setbits; - uint16 clrbits; + uint16_t setbits; + uint16_t clrbits; /* Has the mode changed? */ @@ -881,8 +884,8 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; - uint16 setbits; - uint16 clrbits; + uint16_t setbits; + uint16_t clrbits; /* Has the number of bits changed? */ @@ -927,7 +930,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) * ************************************************************************************/ -static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd) +static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; @@ -950,7 +953,7 @@ static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd) * nwords - the length of data to be exchaned in units of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -970,9 +973,9 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, { /* 16-bit mode */ - const uint16 *src = (const uint16*)txbuffer;; - uint16 *dest = (uint16*)rxbuffer; - uint16 word; + const uint16_t *src = (const uint16_t*)txbuffer;; + uint16_t *dest = (uint16_t*)rxbuffer; + uint16_t word; while (nwords-- > 0) { @@ -1003,9 +1006,9 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, { /* 8-bit mode */ - const ubyte *src = (const ubyte*)txbuffer;; - ubyte *dest = (ubyte*)rxbuffer; - ubyte word; + const uint8_t *src = (const uint8_t*)txbuffer;; + uint8_t *dest = (uint8_t*)rxbuffer; + uint8_t word; while (nwords-- > 0) { @@ -1022,7 +1025,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, /* Exchange one word */ - word = (ubyte)spi_send(dev, (uint16)word); + word = (uint8_t)spi_send(dev, (uint16_t)word); /* Is there a buffer to receive the return value? */ @@ -1048,7 +1051,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, * nwords - the length of data to be exchaned in units of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1060,8 +1063,8 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, FAR void *rxbuffer, size_t nwords) { FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; - uint16 rxdummy = 0xffff; - uint16 txdummy; + uint16_t rxdummy = 0xffff; + uint16_t txdummy; DEBUGASSERT(priv && priv->spibase); @@ -1094,7 +1097,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, * nwords - the length of data to send from the buffer in number of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1120,7 +1123,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si * nwords - the length of data that can be received in the buffer in number * of words. The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1150,8 +1153,8 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t static void spi_portinitialize(FAR struct stm32_spidev_s *priv) { - uint16 setbits; - uint16 clrbits; + uint16_t setbits; + uint16_t clrbits; /* Configure CR1. Default configuration: * Mode 0: CPHA=0 and CPOL=0 @@ -1234,7 +1237,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) #ifdef CONFIG_STM32_SPI1 if (port == 0) { - uint32 mapr; + uint32_t mapr; /* Select SPI1 */ diff --git a/arch/arm/src/stm32/stm32_spi.h b/arch/arm/src/stm32/stm32_spi.h index 21d95d01dd..2d4721745d 100755 --- a/arch/arm/src/stm32/stm32_spi.h +++ b/arch/arm/src/stm32/stm32_spi.h @@ -1,158 +1,158 @@ -/************************************************************************************ - * arch/arm/src/stm32/stm32_spi.h - * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_STC_STM32_STM32_SPI_H -#define __ARCH_ARM_STC_STM32_STM32_SPI_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include -#include +/************************************************************************************ + * arch/arm/src/stm32/stm32_spi.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_STC_STM32_STM32_SPI_H +#define __ARCH_ARM_STC_STM32_STM32_SPI_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + #include "chip.h" - -/************************************************************************************ - * Definitions - ************************************************************************************/ - -/* Register Offsets *****************************************************************/ - -#define STM32_SPI_CR1_OFFSET 0x0000 /* SPI Control Register 1 (16-bit) */ -#define STM32_SPI_CR2_OFFSET 0x0004 /* SPI control register 2 (16-bit) */ -#define STM32_SPI_SR_OFFSET 0x0008 /* SPI status register (16-bit) */ -#define STM32_SPI_DR_OFFSET 0x000c /* SPI data register (16-bit) */ -#define STM32_SPI_CRCPR_OFFSET 0x0010 /* SPI CRC polynomial register (16-bit) */ -#define STM32_SPI_RXCRCR_OFFSET 0x0014 /* SPI Rx CRC register (16-bit) */ -#define STM32_SPI_TXCRCR_OFFSET 0x0018 /* SPI Tx CRC register (16-bit) */ - -/* Register Addresses ***************************************************************/ - -#if STM32_NSPI > 0 -# define STM32_SPI1_CR1 (STM32_SPI1_BASE+STM32_SPI_CR1_OFFSET) -# define STM32_SPI1_CR2 (STM32_SPI1_BASE+STM32_SPI_CR2_OFFSET) -# define STM32_SPI1_SR (STM32_SPI1_BASE+STM32_SPI_SR_OFFSET) -# define STM32_SPI1_DR (STM32_SPI1_BASE+STM32_SPI_DR_OFFSET) -# define STM32_SPI1_CRCPR (STM32_SPI1_BASE+STM32_SPI_CRCPR_OFFSET) -# define STM32_SPI1_RXCRCR (STM32_SPI1_BASE+STM32_SPI_RXCRCR_OFFSET) -# define STM32_SPI1_TXCRCR (STM32_SPI1_BASE+STM32_SPI_TXCRCR_OFFSET) -#endif - -#if STM32_NSPI > 1 -# define STM32_SPI2_CR1 (STM32_SPI2_BASE+STM32_SPI_CR1_OFFSET) -# define STM32_SPI2_CR2 (STM32_SPI2_BASE+STM32_SPI_CR2_OFFSET) -# define STM32_SPI2_SR (STM32_SPI2_BASE+STM32_SPI_SR_OFFSET) -# define STM32_SPI2_DR (STM32_SPI2_BASE+STM32_SPI_DR_OFFSET) -# define STM32_SPI2_CRCPR (STM32_SPI2_BASE+STM32_SPI_CRCPR_OFFSET) -# define STM32_SPI2_RXCRCR (STM32_SPI2_BASE+STM32_SPI_RXCRCR_OFFSET) -# define STM32_SPI2_TXCRCR (STM32_SPI2_BASE+STM32_SPI_TXCRCR_OFFSET) -#endif - -/* Register Bitfield Definitions ****************************************************/ - -/* SPI Control Register 1 */ - -#define SPI_CR1_CPHA (1 << 0) /* Bit 0: Clock Phase */ -#define SPI_CR1_CPOL (1 << 1) /* Bit 1: Clock Polarity */ -#define SPI_CR1_MSTR (1 << 2) /* Bit 2: Master Selection */ -#define SPI_CR1_BR_SHIFT (3) /* Bits 5:3 Baud Rate Control */ -#define SPI_CR1_BR_MASK (7 << SPI_CR1_BR_SHIFT) -# define SPI_CR1_FPCLCKd2 (0 << SPI_CR1_BR_SHIFT) /* 000: fPCLK/2 */ -# define SPI_CR1_FPCLCKd4 (1 << SPI_CR1_BR_SHIFT) /* 001: fPCLK/4 */ -# define SPI_CR1_FPCLCKd8 (2 << SPI_CR1_BR_SHIFT) /* 010: fPCLK/8 */ -# define SPI_CR1_FPCLCKd16 (3 << SPI_CR1_BR_SHIFT) /* 011: fPCLK/16 */ -# define SPI_CR1_FPCLCKd32 (4 << SPI_CR1_BR_SHIFT) /* 100: fPCLK/32 */ -# define SPI_CR1_FPCLCKd64 (5 << SPI_CR1_BR_SHIFT) /* 101: fPCLK/64 */ -# define SPI_CR1_FPCLCKd128 (6 << SPI_CR1_BR_SHIFT) /* 110: fPCLK/128 */ -# define SPI_CR1_FPCLCKd256 (7 << SPI_CR1_BR_SHIFT) /* 111: fPCLK/256 */ -#define SPI_CR1_SPE (1 << 6) /* Bit 6: SPI Enable */ -#define SPI_CR1_LSBFIRST (1 << 7) /* Bit 7: Frame Format */ -#define SPI_CR1_SSI (1 << 8) /* Bit 8: Internal slave select */ -#define SPI_CR1_SSM (1 << 9) /* Bit 9: Software slave management */ -#define SPI_CR1_RXONLY (1 << 10) /* Bit 10: Receive only */ -#define SPI_CR1_DFF (1 << 11) /* Bit 11: Data Frame Format */ -#define SPI_CR1_CRCNEXT (1 << 12) /* Bit 12: Transmit CRC next */ -#define SPI_CR1_CRCEN (1 << 13) /* Bit 13: Hardware CRC calculation enable */ -#define SPI_CR1_BIDIOE (1 << 14) /* Bit 14: Output enable in bidirectional mode */ -#define SPI_CR1_BIDIMODE (1 << 15) /* Bit 15: Bidirectional data mode enable */ - -/* SPI Control Register 2 */ - -#define SPI_CR2_RXDMAEN (1 << 0) /* Bit 0: Rx Buffer DMA Enable */ -#define SPI_CR2_TXDMAEN (1 << 1) /* Bit 1: Tx Buffer DMA Enable */ -#define SPI_CR2_SSOE (1 << 2) /* Bit 2: SS Output Enable */ -#define SPI_CR2_ERRIE (1 << 5) /* Bit 5: Error interrupt enable */ -#define SPI_CR2_RXNEIE (1 << 6) /* Bit 6: RX buffer not empty interrupt enable */ -#define SPI_CR2_TXEIE (1 << 7) /* Bit 7: Tx buffer empty interrupt enable */ - -/* SPI status register */ - -#define SPI_SR_RXNE (1 << 0) /* Bit 0: Receive buffer not empty */ -#define SPI_SR_TXE (1 << 1) /* Bit 1: Transmit buffer empty */ -#define SPI_SR_CRCERR (1 << 4) /* Bit 4: CRC error flag */ -#define SPI_SR_MODF (1 << 5) /* Bit 5: Mode fault */ -#define SPI_SR_OVR (1 << 6) /* Bit 6: Overrun flag */ -#define SPI_SR_BSY (1 << 7) /* Bit 7: Busy flag */ - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -#ifndef __ASSEMBLY__ - -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" { -#else -#define EXTERN extern -#endif - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ - -#endif /* __ARCH_ARM_STC_STM32_STM32_SPI_H */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define STM32_SPI_CR1_OFFSET 0x0000 /* SPI Control Register 1 (16-bit) */ +#define STM32_SPI_CR2_OFFSET 0x0004 /* SPI control register 2 (16-bit) */ +#define STM32_SPI_SR_OFFSET 0x0008 /* SPI status register (16-bit) */ +#define STM32_SPI_DR_OFFSET 0x000c /* SPI data register (16-bit) */ +#define STM32_SPI_CRCPR_OFFSET 0x0010 /* SPI CRC polynomial register (16-bit) */ +#define STM32_SPI_RXCRCR_OFFSET 0x0014 /* SPI Rx CRC register (16-bit) */ +#define STM32_SPI_TXCRCR_OFFSET 0x0018 /* SPI Tx CRC register (16-bit) */ + +/* Register Addresses ***************************************************************/ + +#if STM32_NSPI > 0 +# define STM32_SPI1_CR1 (STM32_SPI1_BASE+STM32_SPI_CR1_OFFSET) +# define STM32_SPI1_CR2 (STM32_SPI1_BASE+STM32_SPI_CR2_OFFSET) +# define STM32_SPI1_SR (STM32_SPI1_BASE+STM32_SPI_SR_OFFSET) +# define STM32_SPI1_DR (STM32_SPI1_BASE+STM32_SPI_DR_OFFSET) +# define STM32_SPI1_CRCPR (STM32_SPI1_BASE+STM32_SPI_CRCPR_OFFSET) +# define STM32_SPI1_RXCRCR (STM32_SPI1_BASE+STM32_SPI_RXCRCR_OFFSET) +# define STM32_SPI1_TXCRCR (STM32_SPI1_BASE+STM32_SPI_TXCRCR_OFFSET) +#endif + +#if STM32_NSPI > 1 +# define STM32_SPI2_CR1 (STM32_SPI2_BASE+STM32_SPI_CR1_OFFSET) +# define STM32_SPI2_CR2 (STM32_SPI2_BASE+STM32_SPI_CR2_OFFSET) +# define STM32_SPI2_SR (STM32_SPI2_BASE+STM32_SPI_SR_OFFSET) +# define STM32_SPI2_DR (STM32_SPI2_BASE+STM32_SPI_DR_OFFSET) +# define STM32_SPI2_CRCPR (STM32_SPI2_BASE+STM32_SPI_CRCPR_OFFSET) +# define STM32_SPI2_RXCRCR (STM32_SPI2_BASE+STM32_SPI_RXCRCR_OFFSET) +# define STM32_SPI2_TXCRCR (STM32_SPI2_BASE+STM32_SPI_TXCRCR_OFFSET) +#endif + +/* Register Bitfield Definitions ****************************************************/ + +/* SPI Control Register 1 */ + +#define SPI_CR1_CPHA (1 << 0) /* Bit 0: Clock Phase */ +#define SPI_CR1_CPOL (1 << 1) /* Bit 1: Clock Polarity */ +#define SPI_CR1_MSTR (1 << 2) /* Bit 2: Master Selection */ +#define SPI_CR1_BR_SHIFT (3) /* Bits 5:3 Baud Rate Control */ +#define SPI_CR1_BR_MASK (7 << SPI_CR1_BR_SHIFT) +# define SPI_CR1_FPCLCKd2 (0 << SPI_CR1_BR_SHIFT) /* 000: fPCLK/2 */ +# define SPI_CR1_FPCLCKd4 (1 << SPI_CR1_BR_SHIFT) /* 001: fPCLK/4 */ +# define SPI_CR1_FPCLCKd8 (2 << SPI_CR1_BR_SHIFT) /* 010: fPCLK/8 */ +# define SPI_CR1_FPCLCKd16 (3 << SPI_CR1_BR_SHIFT) /* 011: fPCLK/16 */ +# define SPI_CR1_FPCLCKd32 (4 << SPI_CR1_BR_SHIFT) /* 100: fPCLK/32 */ +# define SPI_CR1_FPCLCKd64 (5 << SPI_CR1_BR_SHIFT) /* 101: fPCLK/64 */ +# define SPI_CR1_FPCLCKd128 (6 << SPI_CR1_BR_SHIFT) /* 110: fPCLK/128 */ +# define SPI_CR1_FPCLCKd256 (7 << SPI_CR1_BR_SHIFT) /* 111: fPCLK/256 */ +#define SPI_CR1_SPE (1 << 6) /* Bit 6: SPI Enable */ +#define SPI_CR1_LSBFIRST (1 << 7) /* Bit 7: Frame Format */ +#define SPI_CR1_SSI (1 << 8) /* Bit 8: Internal slave select */ +#define SPI_CR1_SSM (1 << 9) /* Bit 9: Software slave management */ +#define SPI_CR1_RXONLY (1 << 10) /* Bit 10: Receive only */ +#define SPI_CR1_DFF (1 << 11) /* Bit 11: Data Frame Format */ +#define SPI_CR1_CRCNEXT (1 << 12) /* Bit 12: Transmit CRC next */ +#define SPI_CR1_CRCEN (1 << 13) /* Bit 13: Hardware CRC calculation enable */ +#define SPI_CR1_BIDIOE (1 << 14) /* Bit 14: Output enable in bidirectional mode */ +#define SPI_CR1_BIDIMODE (1 << 15) /* Bit 15: Bidirectional data mode enable */ + +/* SPI Control Register 2 */ + +#define SPI_CR2_RXDMAEN (1 << 0) /* Bit 0: Rx Buffer DMA Enable */ +#define SPI_CR2_TXDMAEN (1 << 1) /* Bit 1: Tx Buffer DMA Enable */ +#define SPI_CR2_SSOE (1 << 2) /* Bit 2: SS Output Enable */ +#define SPI_CR2_ERRIE (1 << 5) /* Bit 5: Error interrupt enable */ +#define SPI_CR2_RXNEIE (1 << 6) /* Bit 6: RX buffer not empty interrupt enable */ +#define SPI_CR2_TXEIE (1 << 7) /* Bit 7: Tx buffer empty interrupt enable */ + +/* SPI status register */ + +#define SPI_SR_RXNE (1 << 0) /* Bit 0: Receive buffer not empty */ +#define SPI_SR_TXE (1 << 1) /* Bit 1: Transmit buffer empty */ +#define SPI_SR_CRCERR (1 << 4) /* Bit 4: CRC error flag */ +#define SPI_SR_MODF (1 << 5) /* Bit 5: Mode fault */ +#define SPI_SR_OVR (1 << 6) /* Bit 6: Overrun flag */ +#define SPI_SR_BSY (1 << 7) /* Bit 7: Busy flag */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_STC_STM32_STM32_SPI_H */ diff --git a/arch/arm/src/stm32/stm32_start.c b/arch/arm/src/stm32/stm32_start.c index 6b9ed14951..7ed3c0851f 100644 --- a/arch/arm/src/stm32/stm32_start.c +++ b/arch/arm/src/stm32/stm32_start.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include -#include +#include #include #include @@ -94,8 +94,8 @@ void __start(void) { - const uint32 *src; - uint32 *dest; + const uint32_t *src; + uint32_t *dest; /* Configure the uart so that we can get debug output as soon as possible */ diff --git a/arch/arm/src/stm32/stm32_tim.h b/arch/arm/src/stm32/stm32_tim.h index 2e665b55fa..21b37bb72e 100644 --- a/arch/arm/src/stm32/stm32_tim.h +++ b/arch/arm/src/stm32/stm32_tim.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32_timerisr.c b/arch/arm/src/stm32/stm32_timerisr.c index b784fd2ab1..93cca02aca 100644 --- a/arch/arm/src/stm32/stm32_timerisr.c +++ b/arch/arm/src/stm32/stm32_timerisr.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include #include @@ -105,7 +106,7 @@ * ****************************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { /* Process timer interrupt */ @@ -124,7 +125,7 @@ int up_timerisr(int irq, uint32 *regs) void up_timerinit(void) { - uint32 regval; + uint32_t regval; /* Set the SysTick interrupt to the default priority */ diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h index 6a1213ca10..1562296fa1 100755 --- a/arch/arm/src/stm32/stm32_uart.h +++ b/arch/arm/src/stm32/stm32_uart.h @@ -1,211 +1,211 @@ -/************************************************************************************ - * arch/arm/src/stm32/stm32_uart.h - * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_STC_STM32_STM32_UART_H -#define __ARCH_ARM_STC_STM32_STM32_UART_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - +/************************************************************************************ + * arch/arm/src/stm32/stm32_uart.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_STC_STM32_STM32_UART_H +#define __ARCH_ARM_STC_STM32_STM32_UART_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + #include -#include + #include "chip.h" - -/************************************************************************************ - * Definitions - ************************************************************************************/ - -/* Register Offsets *****************************************************************/ - -#define STM32_USART_SR_OFFSET 0x0000 /* Status register (32-bits) */ -#define STM32_USART_DR_OFFSET 0x0004 /* Data register (32-bits) */ -#define STM32_USART_BRR_OFFSET 0x0008 /* Baud Rate Register (32-bits) */ -#define STM32_USART_CR1_OFFSET 0x000c /* Control register 1 (32-bits) */ -#define STM32_USART_CR2_OFFSET 0x0010 /* Control register 2 (32-bits) */ -#define STM32_USART_CR3_OFFSET 0x0014 /* Control register 3 (32-bits) */ -#define STM32_USART_GTPR_OFFSET 0x0018 /* Guard time and prescaler register (32-bits) */ - -/* Register Addresses ***************************************************************/ - -#if STM32_NUSART > 0 -# define STM32_USART1_SR (STM32_USART1_BASE+STM32_USART_SR_OFFSET) -# define STM32_USART1_DR (STM32_USART1_BASE+STM32_USART_DR_OFFSET) -# define STM32_USART1_BRR (STM32_USART1_BASE+STM32_USART_BRR_OFFSET) -# define STM32_USART1_CR1 (STM32_USART1_BASE+STM32_USART_CR1_OFFSET) -# define STM32_USART1_CR2 (STM32_USART1_BASE+STM32_USART_CR2_OFFSET) -# define STM32_USART1_CR3 (STM32_USART1_BASE+STM32_USART_CR3_OFFSET) -# define STM32_USART1_GTPR (STM32_USART1_BASE+STM32_USART_GTPR_OFFSET) -#endif - -#if STM32_NUSART > 1 -# define STM32_USART2_SR (STM32_USART2_BASE+STM32_USART_SR_OFFSET) -# define STM32_USART2_DR (STM32_USART2_BASE+STM32_USART_DR_OFFSET) -# define STM32_USART2_BRR (STM32_USART2_BASE+STM32_USART_BRR_OFFSET) -# define STM32_USART2_CR1 (STM32_USART2_BASE+STM32_USART_CR1_OFFSET) -# define STM32_USART2_CR2 (STM32_USART2_BASE+STM32_USART_CR2_OFFSET) -# define STM32_USART2_CR3 (STM32_USART2_BASE+STM32_USART_CR3_OFFSET) -# define STM32_USART2_GTPR (STM32_USART2_BASE+STM32_USART_GTPR_OFFSET) -#endif - -#if STM32_NUSART > 0 -# define STM32_USART3_SR (STM32_USART3_BASE+STM32_USART_SR_OFFSET) -# define STM32_USART3_DR (STM32_USART3_BASE+STM32_USART_DR_OFFSET) -# define STM32_USART3_BRR (STM32_USART3_BASE+STM32_USART_BRR_OFFSET) -# define STM32_USART3_CR1 (STM32_USART3_BASE+STM32_USART_CR1_OFFSET) -# define STM32_USART3_CR2 (STM32_USART3_BASE+STM32_USART_CR2_OFFSET) -# define STM32_USART3_CR3 (STM32_USART3_BASE+STM32_USART_CR3_OFFSET) -# define STM32_USART3_GTPR (STM32_USART3_BASE+STM32_USART_GTPR_OFFSET) -#endif - -#if STM32_NUSART > 3 -# define STM32_UART4_SR (STM32_UART4_BASE+STM32_USART_SR_OFFSET) -# define STM32_UART4_DR (STM32_UART4_BASE+STM32_USART_DR_OFFSET) -# define STM32_UART4_BRR (STM32_UART4_BASE+STM32_USART_BRR_OFFSET) -# define STM32_UART4_CR1 (STM32_UART4_BASE+STM32_USART_CR1_OFFSET) -# define STM32_UART4_CR2 (STM32_UART4_BASE+STM32_USART_CR2_OFFSET) -# define STM32_UART4_CR3 (STM32_UART4_BASE+STM32_USART_CR3_OFFSET) -#endif - -#if STM32_NUSART > 4 -# define STM32_UART5_SR (STM32_UART5_BASE+STM32_USART_SR_OFFSET) -# define STM32_UART5_DR (STM32_UART5_BASE+STM32_USART_DR_OFFSET) -# define STM32_UART5_BRR (STM32_UART5_BASE+STM32_USART_BRR_OFFSET) -# define STM32_UART5_CR1 (STM32_UART5_BASE+STM32_USART_CR1_OFFSET) -# define STM32_UART5_CR2 (STM32_UART5_BASE+STM32_USART_CR2_OFFSET) -# define STM32_UART5_CR3 (STM32_UART5_BASE+STM32_USART_CR3_OFFSET) -#endif - -/* Register Bitfield Definitions ****************************************************/ - -/* Status register */ - -#define USART_SR_PE (1 << 0) /* Bit 0: Parity Error */ -#define USART_SR_FE (1 << 1) /* Bit 1: Framing Error */ -#define USART_SR_NE (1 << 2) /* Bit 2: Noise Error Flag */ -#define USART_SR_ORE (1 << 3) /* Bit 3: OverRun Error */ -#define USART_SR_IDLE (1 << 4) /* Bit 4: IDLE line detected */ -#define USART_SR_RXNE (1 << 5) /* Bit 5: Read Data Register Not Empty */ -#define USART_SR_TC (1 << 6) /* Bit 6: Transmission Complete */ -#define USART_SR_TXE (1 << 7) /* Bit 7: Transmit Data Register Empty */ -#define USART_SR_LBD (1 << 8) /* Bit 8: LIN Break Detection Flag */ -#define USART_SR_CTS (1 << 9) /* Bit 9: CTS Flag */ - -#define USART_SR_ALLBITS (0x03ff) -#define USART_SR_CLRBITS (USART_SR_CTS|USART_SR_LBD) /* Cleared by SW write to SR */ - -/* Data register */ - -#define USART_DR_SHIFT (0) /* Bits 8:0: Data value */ -#define USART_DR_MASK (0xff << USART_DR_SHIFT) - -/* Baud Rate Register */ - -#define USART_BRR_FRAC_SHIFT (0) /* Bits 3-0: fraction of USARTDIV */ -#define USART_BRR_FRAC_MASK (0x0f << USART_BRR_FRAC_SHIFT) -#define USART_BRR_MANT_SHIFT (4) /* Bits 15-4: mantissa of USARTDIV */ -#define USART_BRR_MANT_MASK (0x0fff << USART_BRR_MANT_SHIFT) - -/* Control register 1 */ - -#define USART_CR1_SBK (1 << 0) /* Bit 0: Send Break */ -#define USART_CR1_RWU (1 << 1) /* Bit 1: Receiver wakeup */ -#define USART_CR1_RE (1 << 2) /* Bit 2: Receiver Enable */ -#define USART_CR1_TE (1 << 3) /* Bit 3: Transmitter Enable */ -#define USART_CR1_IDLEIE (1 << 4) /* Bit 4: IDLE Interrupt Enable */ -#define USART_CR1_RXNEIE (1 << 5) /* Bit 5: RXNE Interrupt Enable */ -#define USART_CR1_TCIE (1 << 6) /* Bit 6: Transmission Complete Interrupt Enable */ -#define USART_CR1_TXEIE (1 << 7) /* Bit 7: TXE Interrupt Enable */ -#define USART_CR1_PEIE (1 << 8) /* Bit 8: PE Interrupt Enable */ -#define USART_CR1_PS (1 << 9) /* Bit 9: Parity Selection */ -#define USART_CR1_PCE (1 << 10) /* Bit 10: Parity Control Enable */ -#define USART_CR1_WAKE (1 << 11) /* Bit 11: Wakeup method */ -#define USART_CR1_M (1 << 12) /* Bit 12: word length */ -#define USART_CR1_UE (1 << 13) /* Bit 13: USART Enable */ - -#define USART_CR1_ALLINTS (USART_CR1_IDLEIE|USART_CR1_RXNEIE|USART_CR1_TCIE|USART_CR1_PEIE) - -/* Control register 2 */ - -#define USART_CR2_ADD_SHIFT (0) /* Bits 3-0: Address of the USART node */ -#define USART_CR2_ADD_MASK (0x0f << USART_CR2_ADD_SHIFT) -#define USART_CR2_LBDL (1 << 6) /* Bit 5: LIN Break Detection Length */ -#define USART_CR2_LBDIE (1 << 7) /* Bit 6: LIN Break Detection Interrupt Enable */ -#define USART_CR2_LBCL (1 << 8) /* Bit 8: Last Bit Clock pulse */ -#define USART_CR2_CPHA (1 << 9) /* Bit 9: Clock Phase */ -#define USART_CR2_CPOL (1 << 10) /* Bit 10: Clock Polarity */ -#define USART_CR2_CLKEN (1 << 11) /* Bit 11: Clock Enable */ -#define USART_CR2_STOP_SHIFT (12) /* Bits 13-12: STOP bits */ -#define USART_CR2_STOP_MASK (3 << USART_CR2_STOP_SHIFT) -# define USART_CR2_STOP1 (0 << USART_CR2_STOP_SHIFT) /* 00: 1 Stop bit */ -# define USART_CR2_STOP0p5 (1 << USART_CR2_STOP_SHIFT) /* 01: 0.5 Stop bit */ -# define USART_CR2_STOP2 (2 << USART_CR2_STOP_SHIFT) /* 10: 2 Stop bits */ -# define USART_CR2_STOP1p5 (3 << USART_CR2_STOP_SHIFT) /* 11: 1.5 Stop bit */ -#define USART_CR2_LINEN (1 << 14) /* Bit 14: LIN mode enable */ - -/* Control register 3 */ - -#define USART_CR3_EIE (1 << 0) /* Bit 0: Error Interrupt Enable */ -#define USART_CR3_IREN (1 << 1) /* Bit 1: IrDA mode Enable */ -#define USART_CR3_IRLP (1 << 2) /* Bit 2: IrDA Low-Power */ -#define USART_CR3_HDSEL (1 << 3) /* Bit 3: Half-Duplex Selection */ -#define USART_CR3_NACK (1 << 4) /* Bit 4: Smartcard NACK enable */ -#define USART_CR3_SCEN (1 << 5) /* Bit 5: Smartcard mode enable */ -#define USART_CR3_DMAR (1 << 6) /* Bit 6: DMA Enable Receiver */ -#define USART_CR3_DMAT (1 << 7) /* Bit 7: DMA Enable Transmitter */ -#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */ -#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */ -#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */ - -/* Guard time and prescaler register */ - -#define USART_GTPR_GT_SHIFT (8) /* Bits 15-8: Guard time value */ -#define USART_GTPR_GT_MASK (0xff << USART_GTPR_GT_SHIFT) -#define USART_GTPR_PSC_SHIFT (0) /* Bits 7:0 [7:0]: Prescaler value */ -#define USART_GTPR_PSC_MASK (0xff << USART_GTPR_PSC_SHIFT) - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_STC_STM32_STM32_UART_H */ + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define STM32_USART_SR_OFFSET 0x0000 /* Status register (32-bits) */ +#define STM32_USART_DR_OFFSET 0x0004 /* Data register (32-bits) */ +#define STM32_USART_BRR_OFFSET 0x0008 /* Baud Rate Register (32-bits) */ +#define STM32_USART_CR1_OFFSET 0x000c /* Control register 1 (32-bits) */ +#define STM32_USART_CR2_OFFSET 0x0010 /* Control register 2 (32-bits) */ +#define STM32_USART_CR3_OFFSET 0x0014 /* Control register 3 (32-bits) */ +#define STM32_USART_GTPR_OFFSET 0x0018 /* Guard time and prescaler register (32-bits) */ + +/* Register Addresses ***************************************************************/ + +#if STM32_NUSART > 0 +# define STM32_USART1_SR (STM32_USART1_BASE+STM32_USART_SR_OFFSET) +# define STM32_USART1_DR (STM32_USART1_BASE+STM32_USART_DR_OFFSET) +# define STM32_USART1_BRR (STM32_USART1_BASE+STM32_USART_BRR_OFFSET) +# define STM32_USART1_CR1 (STM32_USART1_BASE+STM32_USART_CR1_OFFSET) +# define STM32_USART1_CR2 (STM32_USART1_BASE+STM32_USART_CR2_OFFSET) +# define STM32_USART1_CR3 (STM32_USART1_BASE+STM32_USART_CR3_OFFSET) +# define STM32_USART1_GTPR (STM32_USART1_BASE+STM32_USART_GTPR_OFFSET) +#endif + +#if STM32_NUSART > 1 +# define STM32_USART2_SR (STM32_USART2_BASE+STM32_USART_SR_OFFSET) +# define STM32_USART2_DR (STM32_USART2_BASE+STM32_USART_DR_OFFSET) +# define STM32_USART2_BRR (STM32_USART2_BASE+STM32_USART_BRR_OFFSET) +# define STM32_USART2_CR1 (STM32_USART2_BASE+STM32_USART_CR1_OFFSET) +# define STM32_USART2_CR2 (STM32_USART2_BASE+STM32_USART_CR2_OFFSET) +# define STM32_USART2_CR3 (STM32_USART2_BASE+STM32_USART_CR3_OFFSET) +# define STM32_USART2_GTPR (STM32_USART2_BASE+STM32_USART_GTPR_OFFSET) +#endif + +#if STM32_NUSART > 0 +# define STM32_USART3_SR (STM32_USART3_BASE+STM32_USART_SR_OFFSET) +# define STM32_USART3_DR (STM32_USART3_BASE+STM32_USART_DR_OFFSET) +# define STM32_USART3_BRR (STM32_USART3_BASE+STM32_USART_BRR_OFFSET) +# define STM32_USART3_CR1 (STM32_USART3_BASE+STM32_USART_CR1_OFFSET) +# define STM32_USART3_CR2 (STM32_USART3_BASE+STM32_USART_CR2_OFFSET) +# define STM32_USART3_CR3 (STM32_USART3_BASE+STM32_USART_CR3_OFFSET) +# define STM32_USART3_GTPR (STM32_USART3_BASE+STM32_USART_GTPR_OFFSET) +#endif + +#if STM32_NUSART > 3 +# define STM32_UART4_SR (STM32_UART4_BASE+STM32_USART_SR_OFFSET) +# define STM32_UART4_DR (STM32_UART4_BASE+STM32_USART_DR_OFFSET) +# define STM32_UART4_BRR (STM32_UART4_BASE+STM32_USART_BRR_OFFSET) +# define STM32_UART4_CR1 (STM32_UART4_BASE+STM32_USART_CR1_OFFSET) +# define STM32_UART4_CR2 (STM32_UART4_BASE+STM32_USART_CR2_OFFSET) +# define STM32_UART4_CR3 (STM32_UART4_BASE+STM32_USART_CR3_OFFSET) +#endif + +#if STM32_NUSART > 4 +# define STM32_UART5_SR (STM32_UART5_BASE+STM32_USART_SR_OFFSET) +# define STM32_UART5_DR (STM32_UART5_BASE+STM32_USART_DR_OFFSET) +# define STM32_UART5_BRR (STM32_UART5_BASE+STM32_USART_BRR_OFFSET) +# define STM32_UART5_CR1 (STM32_UART5_BASE+STM32_USART_CR1_OFFSET) +# define STM32_UART5_CR2 (STM32_UART5_BASE+STM32_USART_CR2_OFFSET) +# define STM32_UART5_CR3 (STM32_UART5_BASE+STM32_USART_CR3_OFFSET) +#endif + +/* Register Bitfield Definitions ****************************************************/ + +/* Status register */ + +#define USART_SR_PE (1 << 0) /* Bit 0: Parity Error */ +#define USART_SR_FE (1 << 1) /* Bit 1: Framing Error */ +#define USART_SR_NE (1 << 2) /* Bit 2: Noise Error Flag */ +#define USART_SR_ORE (1 << 3) /* Bit 3: OverRun Error */ +#define USART_SR_IDLE (1 << 4) /* Bit 4: IDLE line detected */ +#define USART_SR_RXNE (1 << 5) /* Bit 5: Read Data Register Not Empty */ +#define USART_SR_TC (1 << 6) /* Bit 6: Transmission Complete */ +#define USART_SR_TXE (1 << 7) /* Bit 7: Transmit Data Register Empty */ +#define USART_SR_LBD (1 << 8) /* Bit 8: LIN Break Detection Flag */ +#define USART_SR_CTS (1 << 9) /* Bit 9: CTS Flag */ + +#define USART_SR_ALLBITS (0x03ff) +#define USART_SR_CLRBITS (USART_SR_CTS|USART_SR_LBD) /* Cleared by SW write to SR */ + +/* Data register */ + +#define USART_DR_SHIFT (0) /* Bits 8:0: Data value */ +#define USART_DR_MASK (0xff << USART_DR_SHIFT) + +/* Baud Rate Register */ + +#define USART_BRR_FRAC_SHIFT (0) /* Bits 3-0: fraction of USARTDIV */ +#define USART_BRR_FRAC_MASK (0x0f << USART_BRR_FRAC_SHIFT) +#define USART_BRR_MANT_SHIFT (4) /* Bits 15-4: mantissa of USARTDIV */ +#define USART_BRR_MANT_MASK (0x0fff << USART_BRR_MANT_SHIFT) + +/* Control register 1 */ + +#define USART_CR1_SBK (1 << 0) /* Bit 0: Send Break */ +#define USART_CR1_RWU (1 << 1) /* Bit 1: Receiver wakeup */ +#define USART_CR1_RE (1 << 2) /* Bit 2: Receiver Enable */ +#define USART_CR1_TE (1 << 3) /* Bit 3: Transmitter Enable */ +#define USART_CR1_IDLEIE (1 << 4) /* Bit 4: IDLE Interrupt Enable */ +#define USART_CR1_RXNEIE (1 << 5) /* Bit 5: RXNE Interrupt Enable */ +#define USART_CR1_TCIE (1 << 6) /* Bit 6: Transmission Complete Interrupt Enable */ +#define USART_CR1_TXEIE (1 << 7) /* Bit 7: TXE Interrupt Enable */ +#define USART_CR1_PEIE (1 << 8) /* Bit 8: PE Interrupt Enable */ +#define USART_CR1_PS (1 << 9) /* Bit 9: Parity Selection */ +#define USART_CR1_PCE (1 << 10) /* Bit 10: Parity Control Enable */ +#define USART_CR1_WAKE (1 << 11) /* Bit 11: Wakeup method */ +#define USART_CR1_M (1 << 12) /* Bit 12: word length */ +#define USART_CR1_UE (1 << 13) /* Bit 13: USART Enable */ + +#define USART_CR1_ALLINTS (USART_CR1_IDLEIE|USART_CR1_RXNEIE|USART_CR1_TCIE|USART_CR1_PEIE) + +/* Control register 2 */ + +#define USART_CR2_ADD_SHIFT (0) /* Bits 3-0: Address of the USART node */ +#define USART_CR2_ADD_MASK (0x0f << USART_CR2_ADD_SHIFT) +#define USART_CR2_LBDL (1 << 6) /* Bit 5: LIN Break Detection Length */ +#define USART_CR2_LBDIE (1 << 7) /* Bit 6: LIN Break Detection Interrupt Enable */ +#define USART_CR2_LBCL (1 << 8) /* Bit 8: Last Bit Clock pulse */ +#define USART_CR2_CPHA (1 << 9) /* Bit 9: Clock Phase */ +#define USART_CR2_CPOL (1 << 10) /* Bit 10: Clock Polarity */ +#define USART_CR2_CLKEN (1 << 11) /* Bit 11: Clock Enable */ +#define USART_CR2_STOP_SHIFT (12) /* Bits 13-12: STOP bits */ +#define USART_CR2_STOP_MASK (3 << USART_CR2_STOP_SHIFT) +# define USART_CR2_STOP1 (0 << USART_CR2_STOP_SHIFT) /* 00: 1 Stop bit */ +# define USART_CR2_STOP0p5 (1 << USART_CR2_STOP_SHIFT) /* 01: 0.5 Stop bit */ +# define USART_CR2_STOP2 (2 << USART_CR2_STOP_SHIFT) /* 10: 2 Stop bits */ +# define USART_CR2_STOP1p5 (3 << USART_CR2_STOP_SHIFT) /* 11: 1.5 Stop bit */ +#define USART_CR2_LINEN (1 << 14) /* Bit 14: LIN mode enable */ + +/* Control register 3 */ + +#define USART_CR3_EIE (1 << 0) /* Bit 0: Error Interrupt Enable */ +#define USART_CR3_IREN (1 << 1) /* Bit 1: IrDA mode Enable */ +#define USART_CR3_IRLP (1 << 2) /* Bit 2: IrDA Low-Power */ +#define USART_CR3_HDSEL (1 << 3) /* Bit 3: Half-Duplex Selection */ +#define USART_CR3_NACK (1 << 4) /* Bit 4: Smartcard NACK enable */ +#define USART_CR3_SCEN (1 << 5) /* Bit 5: Smartcard mode enable */ +#define USART_CR3_DMAR (1 << 6) /* Bit 6: DMA Enable Receiver */ +#define USART_CR3_DMAT (1 << 7) /* Bit 7: DMA Enable Transmitter */ +#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */ +#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */ +#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */ + +/* Guard time and prescaler register */ + +#define USART_GTPR_GT_SHIFT (8) /* Bits 15-8: Guard time value */ +#define USART_GTPR_GT_MASK (0xff << USART_GTPR_GT_SHIFT) +#define USART_GTPR_PSC_SHIFT (0) /* Bits 7:0 [7:0]: Prescaler value */ +#define USART_GTPR_PSC_MASK (0xff << USART_GTPR_PSC_SHIFT) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_ARM_STC_STM32_STM32_UART_H */ diff --git a/arch/arm/src/stm32/stm32_usbdev.c b/arch/arm/src/stm32/stm32_usbdev.c index 9dd75cf97a..7fbcd3ef7a 100644 --- a/arch/arm/src/stm32/stm32_usbdev.c +++ b/arch/arm/src/stm32/stm32_usbdev.c @@ -44,6 +44,8 @@ #include #include +#include +#include #include #include #include @@ -267,15 +269,15 @@ enum stm32_rsmstate_e union wb_u { - uint16 w; - ubyte b[2]; + uint16_t w; + uint8_t b[2]; }; /* A container for a request so that the request make be retained in a list */ struct stm32_req_s { - struct usbdev_req_s req; /* Standard USB request */ + struct usbdev_req_s req; /* Standard USB request */ struct stm32_req_s *flink; /* Supports a singly linked list */ }; @@ -295,11 +297,11 @@ struct stm32_ep_s struct stm32_usbdev_s *dev; /* Reference to private driver data */ struct stm32_req_s *head; /* Request list for this endpoint */ struct stm32_req_s *tail; - ubyte bufno; /* Allocated buffer number */ - ubyte stalled:1; /* TRUE: Endpoint is stalled */ - ubyte halted:1; /* TRUE: Endpoint feature halted */ - ubyte txbusy:1; /* TRUE: TX endpoint FIFO full */ - ubyte txnullpkt:1; /* Null packet needed at end of transfer */ + uint8_t bufno; /* Allocated buffer number */ + uint8_t stalled:1; /* true: Endpoint is stalled */ + uint8_t halted:1; /* true: Endpoint feature halted */ + uint8_t txbusy:1; /* true: TX endpoint FIFO full */ + uint8_t txnullpkt:1; /* Null packet needed at end of transfer */ }; struct stm32_usbdev_s @@ -318,16 +320,16 @@ struct stm32_usbdev_s /* STM32-specific fields */ struct usb_ctrlreq_s ctrl; /* Last EP0 request */ - ubyte devstate; /* Driver state (see enum stm32_devstate_e) */ - ubyte rsmstate; /* Resume state (see enum stm32_rsmstate_e) */ - ubyte nesofs; /* ESOF counter (for resume support) */ - ubyte rxpending:1; /* 1: OUT data in PMA, but no read requests */ - ubyte selfpowered:1; /* 1: Device is self powered */ - ubyte epavail; /* Bitset of available endpoints */ - ubyte bufavail; /* Bitset of available buffers */ - uint16 rxstatus; /* Saved during interrupt processing */ - uint16 txstatus; /* " " " " " " " " */ - uint16 imask; /* Current interrupt mask */ + uint8_t devstate; /* Driver state (see enum stm32_devstate_e) */ + uint8_t rsmstate; /* Resume state (see enum stm32_rsmstate_e) */ + uint8_t nesofs; /* ESOF counter (for resume support) */ + uint8_t rxpending:1; /* 1: OUT data in PMA, but no read requests */ + uint8_t selfpowered:1; /* 1: Device is self powered */ + uint8_t epavail; /* Bitset of available endpoints */ + uint8_t bufavail; /* Bitset of available buffers */ + uint16_t rxstatus; /* Saved during interrupt processing */ + uint16_t txstatus; /* " " " " " " " " */ + uint16_t imask; /* Current interrupt mask */ /* The endpoint list */ @@ -341,8 +343,8 @@ struct stm32_usbdev_s /* Register operations ******************************************************/ #if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint16 stm32_getreg(uint32 addr); -static void stm32_putreg(uint16 val, uint32 addr); +static uint16_t stm32_getreg(uint32_t addr); +static void stm32_putreg(uint16_t val, uint32_t addr); static void stm32_checksetup(void); static void stm32_dumpep(int epno); #else @@ -355,42 +357,42 @@ static void stm32_dumpep(int epno); /* Low-Level Helpers ********************************************************/ static inline void - stm32_seteptxcount(ubyte epno, uint16 count); + stm32_seteptxcount(uint8_t epno, uint16_t count); static inline void - stm32_seteptxaddr(ubyte epno, uint16 addr); -static inline uint16 - stm32_geteptxaddr(ubyte epno); -static void stm32_seteprxcount(ubyte epno, uint16 count); -static inline uint16 - stm32_geteprxcount(ubyte epno); + stm32_seteptxaddr(uint8_t epno, uint16_t addr); +static inline uint16_t + stm32_geteptxaddr(uint8_t epno); +static void stm32_seteprxcount(uint8_t epno, uint16_t count); +static inline uint16_t + stm32_geteprxcount(uint8_t epno); static inline void - stm32_seteprxaddr(ubyte epno, uint16 addr); -static inline uint16 - stm32_geteprxaddr(ubyte epno); + stm32_seteprxaddr(uint8_t epno, uint16_t addr); +static inline uint16_t + stm32_geteprxaddr(uint8_t epno); static inline void - stm32_setepaddress(ubyte epno, uint16 addr); + stm32_setepaddress(uint8_t epno, uint16_t addr); static inline void - stm32_seteptype(ubyte epno, uint16 type); + stm32_seteptype(uint8_t epno, uint16_t type); static inline void - stm32_seteptxaddr(ubyte epno, uint16 addr); + stm32_seteptxaddr(uint8_t epno, uint16_t addr); static inline void - stm32_setstatusout(ubyte epno); + stm32_setstatusout(uint8_t epno); static inline void - stm32_clrstatusout(ubyte epno); -static void stm32_clrrxdtog(ubyte epno); -static void stm32_clrtxdtog(ubyte epno); -static void stm32_clrepctrrx(ubyte epno); -static void stm32_clrepctrtx(ubyte epno); -static void stm32_seteptxstatus(ubyte epno, uint16 state); -static void stm32_seteprxstatus(ubyte epno, uint16 state); -static inline uint16 - stm32_geteptxstatus(ubyte epno); -static inline uint16 - stm32_geteprxstatus(ubyte epno); -static uint16 stm32_eptxstalled(ubyte epno); -static uint16 stm32_eprxstalled(ubyte epno); -static void stm32_setimask(struct stm32_usbdev_s *priv, uint16 setbits, - uint16 clrbits); + stm32_clrstatusout(uint8_t epno); +static void stm32_clrrxdtog(uint8_t epno); +static void stm32_clrtxdtog(uint8_t epno); +static void stm32_clrepctrrx(uint8_t epno); +static void stm32_clrepctrtx(uint8_t epno); +static void stm32_seteptxstatus(uint8_t epno, uint16_t state); +static void stm32_seteprxstatus(uint8_t epno, uint16_t state); +static inline uint16_t + stm32_geteptxstatus(uint8_t epno); +static inline uint16_t + stm32_geteprxstatus(uint8_t epno); +static uint16_t stm32_eptxstalled(uint8_t epno); +static uint16_t stm32_eprxstalled(uint8_t epno); +static void stm32_setimask(struct stm32_usbdev_s *priv, uint16_t setbits, + uint16_t clrbits); /* Suspend/Resume Helpers ***************************************************/ @@ -400,20 +402,20 @@ static void stm32_esofpoll(struct stm32_usbdev_s *priv) ; /* Request Helpers **********************************************************/ -static void stm32_copytopma(const ubyte *buffer, uint16 pma, - uint16 nbytes); +static void stm32_copytopma(const uint8_t *buffer, uint16_t pma, + uint16_t nbytes); static inline void - stm32_copyfrompma(ubyte *buffer, uint16 pma, uint16 nbytes); + stm32_copyfrompma(uint8_t *buffer, uint16_t pma, uint16_t nbytes); static struct stm32_req_s * stm32_rqdequeue(struct stm32_ep_s *privep); static void stm32_rqenqueue(struct stm32_ep_s *privep, struct stm32_req_s *req); static inline void stm32_abortrequest(struct stm32_ep_s *privep, - struct stm32_req_s *privreq, sint16 result); -static void stm32_reqcomplete(struct stm32_ep_s *privep, sint16 result); + struct stm32_req_s *privreq, int16_t result); +static void stm32_reqcomplete(struct stm32_ep_s *privep, int16_t result); static void stm32_epwrite(struct stm32_usbdev_s *buf, - struct stm32_ep_s *privep, const ubyte *data, uint32 nbytes); + struct stm32_ep_s *privep, const uint8_t *data, uint32_t nbytes); static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep); static int stm32_rdrequest(struct stm32_usbdev_s *priv, @@ -423,13 +425,13 @@ static void stm32_cancelrequests(struct stm32_ep_s *privep); /* Interrupt level processing ***********************************************/ static void stm32_dispatchrequest(struct stm32_usbdev_s *priv); -static void stm32_epdone(struct stm32_usbdev_s *priv, ubyte epno); -static void stm32_setdevaddr(struct stm32_usbdev_s *priv, ubyte value); +static void stm32_epdone(struct stm32_usbdev_s *priv, uint8_t epno); +static void stm32_setdevaddr(struct stm32_usbdev_s *priv, uint8_t value); static void stm32_ep0setup(struct stm32_usbdev_s *priv); static void stm32_ep0out(struct stm32_usbdev_s *priv); static void stm32_ep0in(struct stm32_usbdev_s *priv); static inline void - stm32_ep0done(struct stm32_usbdev_s *priv, uint16 istr); + stm32_ep0done(struct stm32_usbdev_s *priv, uint16_t istr); static void stm32_lptransfer(struct stm32_usbdev_s *priv); static int stm32_hpinterrupt(int irq, void *context); static int stm32_lpinterrupt(int irq, void *context); @@ -437,11 +439,11 @@ static int stm32_lpinterrupt(int irq, void *context); /* Endpoint helpers *********************************************************/ static inline struct stm32_ep_s * - stm32_epreserve(struct stm32_usbdev_s *priv, ubyte epset); + stm32_epreserve(struct stm32_usbdev_s *priv, uint8_t epset); static inline void stm32_epunreserve(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep); -static inline boolean +static inline bool stm32_epreserved(struct stm32_usbdev_s *priv, int epno); static int stm32_epallocpma(struct stm32_usbdev_s *priv); static inline void @@ -451,7 +453,7 @@ static inline void /* Endpoint operations ******************************************************/ static int stm32_epconfigure(struct usbdev_ep_s *ep, - const struct usb_epdesc_s *desc, boolean last); + const struct usb_epdesc_s *desc, bool last); static int stm32_epdisable(struct usbdev_ep_s *ep); static struct usbdev_req_s * stm32_epallocreq(struct usbdev_ep_s *ep); @@ -461,17 +463,17 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req); static int stm32_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req); -static int stm32_epstall(struct usbdev_ep_s *ep, boolean resume); +static int stm32_epstall(struct usbdev_ep_s *ep, bool resume); /* USB device controller operations *****************************************/ static struct usbdev_ep_s * - stm32_allocep(struct usbdev_s *dev, ubyte epno, boolean in, - ubyte eptype); + stm32_allocep(struct usbdev_s *dev, uint8_t epno, bool in, + uint8_t eptype); static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep); static int stm32_getframe(struct usbdev_s *dev); static int stm32_wakeup(struct usbdev_s *dev); -static int stm32_selfpowered(struct usbdev_s *dev, boolean selfpowered); +static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered); /* Initialization/Reset *****************************************************/ @@ -525,15 +527,15 @@ static const struct usbdev_ops_s g_devops = ****************************************************************************/ #if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static uint16 stm32_getreg(uint32 addr) +static uint16_t stm32_getreg(uint32_t addr) { - static uint32 prevaddr = 0; - static uint16 preval = 0; - static uint32 count = 0; + static uint32_t prevaddr = 0; + static uint16_t preval = 0; + static uint32_t count = 0; /* Read the value from the register */ - uint16 val = getreg16(addr); + uint16_t val = getreg16(addr); /* Is this the same value that we read from the same register last time? * Are we polling the register? If so, suppress some of the output. @@ -583,7 +585,7 @@ static uint16 stm32_getreg(uint32 addr) ****************************************************************************/ #if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) -static void stm32_putreg(uint16 val, uint32 addr) +static void stm32_putreg(uint16_t val, uint32_t addr) { /* Show the register value being written */ @@ -602,7 +604,7 @@ static void stm32_putreg(uint16 val, uint32 addr) #if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) static void stm32_dumpep(int epno) { - uint32 addr; + uint32_t addr; /* Common registers */ @@ -645,9 +647,9 @@ static void stm32_dumpep(int epno) #if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG) static void stm32_checksetup(void) { - uint32 cfgr = getreg32(STM32_RCC_CFGR); - uint32 apb1rstr = getreg32(STM32_RCC_APB1RSTR); - uint32 apb1enr = getreg32(STM32_RCC_APB1ENR); + uint32_t cfgr = getreg32(STM32_RCC_CFGR); + uint32_t apb1rstr = getreg32(STM32_RCC_APB1RSTR); + uint32_t apb1enr = getreg32(STM32_RCC_APB1ENR); lldbg("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr); @@ -666,9 +668,9 @@ static void stm32_checksetup(void) * Name: stm32_seteptxcount ****************************************************************************/ -static inline void stm32_seteptxcount(ubyte epno, uint16 count) +static inline void stm32_seteptxcount(uint8_t epno, uint16_t count) { - volatile uint32 *epaddr = (uint32*)STM32_USB_COUNT_TX(epno); + volatile uint32_t *epaddr = (uint32_t*)STM32_USB_COUNT_TX(epno); *epaddr = count; } @@ -676,9 +678,9 @@ static inline void stm32_seteptxcount(ubyte epno, uint16 count) * Name: stm32_seteptxaddr ****************************************************************************/ -static inline void stm32_seteptxaddr(ubyte epno, uint16 addr) +static inline void stm32_seteptxaddr(uint8_t epno, uint16_t addr) { - volatile uint32 *txaddr = (uint32*)STM32_USB_ADDR_TX(epno); + volatile uint32_t *txaddr = (uint32_t*)STM32_USB_ADDR_TX(epno); *txaddr = addr; } @@ -686,21 +688,21 @@ static inline void stm32_seteptxaddr(ubyte epno, uint16 addr) * Name: stm32_geteptxaddr ****************************************************************************/ -static inline uint16 stm32_geteptxaddr(ubyte epno) +static inline uint16_t stm32_geteptxaddr(uint8_t epno) { - volatile uint32 *txaddr = (uint32*)STM32_USB_ADDR_TX(epno); - return (uint16)*txaddr; + volatile uint32_t *txaddr = (uint32_t*)STM32_USB_ADDR_TX(epno); + return (uint16_t)*txaddr; } /**************************************************************************** * Name: stm32_seteprxcount ****************************************************************************/ -static void stm32_seteprxcount(ubyte epno, uint16 count) +static void stm32_seteprxcount(uint8_t epno, uint16_t count) { - volatile uint32 *epaddr = (uint32*)STM32_USB_COUNT_RX(epno); - uint32 rxcount = 0; - uint16 nblocks; + volatile uint32_t *epaddr = (uint32_t*)STM32_USB_COUNT_RX(epno); + uint32_t rxcount = 0; + uint16_t nblocks; /* The upper bits of the RX COUNT value contain the size of allocated * RX buffer. This is based on a block size of 2 or 32: @@ -726,7 +728,7 @@ static void stm32_seteprxcount(ubyte epno, uint16 count) nblocks = (count >> 5) - 1 ; DEBUGASSERT(nblocks <= 0x0f); - rxcount = (uint32)((nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT) | USB_COUNT_RX_BL_SIZE); + rxcount = (uint32_t)((nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT) | USB_COUNT_RX_BL_SIZE); } else if (count > 0) { @@ -734,7 +736,7 @@ static void stm32_seteprxcount(ubyte epno, uint16 count) nblocks = (count + 1) >> 1; DEBUGASSERT(nblocks > 0 && nblocks < 0x1f); - rxcount = (uint32)(nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT); + rxcount = (uint32_t)(nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT); } *epaddr = rxcount; } @@ -743,9 +745,9 @@ static void stm32_seteprxcount(ubyte epno, uint16 count) * Name: stm32_geteprxcount ****************************************************************************/ -static inline uint16 stm32_geteprxcount(ubyte epno) +static inline uint16_t stm32_geteprxcount(uint8_t epno) { - volatile uint32 *epaddr = (uint32*)STM32_USB_COUNT_RX(epno); + volatile uint32_t *epaddr = (uint32_t*)STM32_USB_COUNT_RX(epno); return (*epaddr) & USB_COUNT_RX_MASK; } @@ -753,9 +755,9 @@ static inline uint16 stm32_geteprxcount(ubyte epno) * Name: stm32_seteprxaddr ****************************************************************************/ -static inline void stm32_seteprxaddr(ubyte epno, uint16 addr) +static inline void stm32_seteprxaddr(uint8_t epno, uint16_t addr) { - volatile uint32 *rxaddr = (uint32*)STM32_USB_ADDR_RX(epno); + volatile uint32_t *rxaddr = (uint32_t*)STM32_USB_ADDR_RX(epno); *rxaddr = addr; } @@ -763,20 +765,20 @@ static inline void stm32_seteprxaddr(ubyte epno, uint16 addr) * Name: stm32_seteprxaddr ****************************************************************************/ -static inline uint16 stm32_geteprxaddr(ubyte epno) +static inline uint16_t stm32_geteprxaddr(uint8_t epno) { - volatile uint32 *rxaddr = (uint32*)STM32_USB_ADDR_RX(epno); - return (uint16)*rxaddr; + volatile uint32_t *rxaddr = (uint32_t*)STM32_USB_ADDR_RX(epno); + return (uint16_t)*rxaddr; } /**************************************************************************** * Name: stm32_setepaddress ****************************************************************************/ -static inline void stm32_setepaddress(ubyte epno, uint16 addr) +static inline void stm32_setepaddress(uint8_t epno, uint16_t addr) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr); regval &= EPR_NOTOG_MASK; @@ -789,10 +791,10 @@ static inline void stm32_setepaddress(ubyte epno, uint16 addr) * Name: stm32_seteptype ****************************************************************************/ -static inline void stm32_seteptype(ubyte epno, uint16 type) +static inline void stm32_seteptype(uint8_t epno, uint16_t type) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr); regval &= EPR_NOTOG_MASK; @@ -805,10 +807,10 @@ static inline void stm32_seteptype(ubyte epno, uint16 type) * Name: stm32_setstatusout ****************************************************************************/ -static inline void stm32_setstatusout(ubyte epno) +static inline void stm32_setstatusout(uint8_t epno) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; /* For a BULK endpoint the EP_KIND bit is used to enabled double buffering; * for a CONTROL endpoint, it is set to indicate that a status OUT @@ -825,10 +827,10 @@ static inline void stm32_setstatusout(ubyte epno) * Name: stm32_clrstatusout ****************************************************************************/ -static inline void stm32_clrstatusout(ubyte epno) +static inline void stm32_clrstatusout(uint8_t epno) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; /* For a BULK endpoint the EP_KIND bit is used to enabled double buffering; * for a CONTROL endpoint, it is set to indicate that a status OUT @@ -845,10 +847,10 @@ static inline void stm32_clrstatusout(ubyte epno) * Name: stm32_clrrxdtog ****************************************************************************/ -static void stm32_clrrxdtog(ubyte epno) +static void stm32_clrrxdtog(uint8_t epno) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr); if ((regval & USB_EPR_DTOG_RX) != 0) @@ -863,10 +865,10 @@ static void stm32_clrrxdtog(ubyte epno) * Name: stm32_clrtxdtog ****************************************************************************/ -static void stm32_clrtxdtog(ubyte epno) +static void stm32_clrtxdtog(uint8_t epno) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr); if ((regval & USB_EPR_DTOG_TX) != 0) @@ -881,10 +883,10 @@ static void stm32_clrtxdtog(ubyte epno) * Name: stm32_clrepctrrx ****************************************************************************/ -static void stm32_clrepctrrx(ubyte epno) +static void stm32_clrepctrrx(uint8_t epno) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr); regval &= EPR_NOTOG_MASK; @@ -896,10 +898,10 @@ static void stm32_clrepctrrx(ubyte epno) * Name: stm32_clrepctrtx ****************************************************************************/ -static void stm32_clrepctrtx(ubyte epno) +static void stm32_clrepctrtx(uint8_t epno) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr); regval &= EPR_NOTOG_MASK; @@ -911,16 +913,16 @@ static void stm32_clrepctrtx(ubyte epno) * Name: stm32_geteptxstatus ****************************************************************************/ -static inline uint16 stm32_geteptxstatus(ubyte epno) +static inline uint16_t stm32_geteptxstatus(uint8_t epno) { - return (uint16)(stm32_getreg(STM32_USB_EPR(epno)) & USB_EPR_STATTX_MASK); + return (uint16_t)(stm32_getreg(STM32_USB_EPR(epno)) & USB_EPR_STATTX_MASK); } /**************************************************************************** * Name: stm32_geteprxstatus ****************************************************************************/ -static inline uint16 stm32_geteprxstatus(ubyte epno) +static inline uint16_t stm32_geteprxstatus(uint8_t epno) { return (stm32_getreg(STM32_USB_EPR(epno)) & USB_EPR_STATRX_MASK); } @@ -929,10 +931,10 @@ static inline uint16 stm32_geteprxstatus(ubyte epno) * Name: stm32_seteptxstatus ****************************************************************************/ -static void stm32_seteptxstatus(ubyte epno, uint16 state) +static void stm32_seteptxstatus(uint8_t epno, uint16_t state) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr) & EPR_TXDTOG_MASK; @@ -957,10 +959,10 @@ static void stm32_seteptxstatus(ubyte epno, uint16 state) * Name: stm32_seteprxstatus ****************************************************************************/ -static void stm32_seteprxstatus(ubyte epno, uint16 state) +static void stm32_seteprxstatus(uint8_t epno, uint16_t state) { - uint32 epaddr = STM32_USB_EPR(epno); - uint16 regval; + uint32_t epaddr = STM32_USB_EPR(epno); + uint16_t regval; regval = stm32_getreg(epaddr) & EPR_RXDTOG_MASK; @@ -985,7 +987,7 @@ static void stm32_seteprxstatus(ubyte epno, uint16 state) * Name: stm32_eptxstalled ****************************************************************************/ -static inline uint16 stm32_eptxstalled(ubyte epno) +static inline uint16_t stm32_eptxstalled(uint8_t epno) { return (stm32_geteptxstatus(epno) == USB_EPR_STATTX_STALL); } @@ -994,7 +996,7 @@ static inline uint16 stm32_eptxstalled(ubyte epno) * Name: stm32_eprxstalled ****************************************************************************/ -static inline uint16 stm32_eprxstalled(ubyte epno) +static inline uint16_t stm32_eprxstalled(uint8_t epno) { return (stm32_geteprxstatus(epno) == USB_EPR_STATRX_STALL); } @@ -1006,27 +1008,27 @@ static inline uint16 stm32_eprxstalled(ubyte epno) * Name: stm32_copytopma ****************************************************************************/ -static void stm32_copytopma(const ubyte *buffer, uint16 pma, uint16 nbytes) +static void stm32_copytopma(const uint8_t *buffer, uint16_t pma, uint16_t nbytes) { - uint16 *dest; - uint16 ms; - uint16 ls; + uint16_t *dest; + uint16_t ms; + uint16_t ls; int nwords = (nbytes + 1) >> 1; int i; /* Copy loop. Source=user buffer, Dest=packet memory */ - dest = (uint16*)(STM32_USBCANRAM_BASE + ((uint32)pma << 1)); + dest = (uint16_t*)(STM32_USBCANRAM_BASE + ((uint32_t)pma << 1)); for (i = nwords; i != 0; i--) { /* Read two bytes and pack into on 16-bit word */ - ls = (uint16)(*buffer++); - ms = (uint16)(*buffer++); + ls = (uint16_t)(*buffer++); + ms = (uint16_t)(*buffer++); *dest = ms << 8 | ls; - /* Source address increments by 2*sizeof(ubyte) = 2; Dest address - * increments by 2*sizeof(uint16) = 4. + /* Source address increments by 2*sizeof(uint8_t) = 2; Dest address + * increments by 2*sizeof(uint16_t) = 4. */ dest += 2; @@ -1038,23 +1040,23 @@ static void stm32_copytopma(const ubyte *buffer, uint16 pma, uint16 nbytes) ****************************************************************************/ static inline void -stm32_copyfrompma(ubyte *buffer, uint16 pma, uint16 nbytes) +stm32_copyfrompma(uint8_t *buffer, uint16_t pma, uint16_t nbytes) { - uint32 *src; + uint32_t *src; int nwords = (nbytes + 1) >> 1; int i; /* Copy loop. Source=packet memory, Dest=user buffer */ - src = (uint32*)(STM32_USBCANRAM_BASE + ((uint32)pma << 1)); + src = (uint32_t*)(STM32_USBCANRAM_BASE + ((uint32_t)pma << 1)); for (i = nwords; i != 0; i--) { /* Copy 16-bits from packet memory to user buffer. */ - *(uint16*)buffer = *src++; + *(uint16_t*)buffer = *src++; - /* Source address increments by 1*sizeof(uint32) = 4; Dest address - * increments by 2*sizeof(ubyte) = 2. + /* Source address increments by 1*sizeof(uint32_t) = 4; Dest address + * increments by 2*sizeof(uint8_t) = 2. */ buffer += 2; @@ -1108,9 +1110,9 @@ static void stm32_rqenqueue(struct stm32_ep_s *privep, ****************************************************************************/ static inline void -stm32_abortrequest(struct stm32_ep_s *privep, struct stm32_req_s *privreq, sint16 result) +stm32_abortrequest(struct stm32_ep_s *privep, struct stm32_req_s *privreq, int16_t result) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_REQABORTED), (uint16)USB_EPNO(privep->ep.eplog)); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_REQABORTED), (uint16_t)USB_EPNO(privep->ep.eplog)); /* Save the result in the request structure */ @@ -1125,7 +1127,7 @@ stm32_abortrequest(struct stm32_ep_s *privep, struct stm32_req_s *privreq, sint1 * Name: stm32_reqcomplete ****************************************************************************/ -static void stm32_reqcomplete(struct stm32_ep_s *privep, sint16 result) +static void stm32_reqcomplete(struct stm32_ep_s *privep, int16_t result) { struct stm32_req_s *privreq; irqstate_t flags; @@ -1142,7 +1144,7 @@ static void stm32_reqcomplete(struct stm32_ep_s *privep, sint16 result) * in the callback. */ - boolean stalled = privep->stalled; + bool stalled = privep->stalled; if (USB_EPNO(privep->ep.eplog) == EP0) { privep->stalled = (privep->dev->devstate == DEVSTATE_STALLED); @@ -1169,9 +1171,9 @@ static void stm32_reqcomplete(struct stm32_ep_s *privep, sint16 result) static void stm32_epwrite(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep, - const ubyte *buf, uint32 nbytes) + const uint8_t *buf, uint32_t nbytes) { - ubyte epno = USB_EPNO(privep->ep.eplog); + uint8_t epno = USB_EPNO(privep->ep.eplog); usbtrace(TRACE_WRITE(epno), nbytes); /* Check for a zero-length packet */ @@ -1194,7 +1196,7 @@ static void stm32_epwrite(struct stm32_usbdev_s *priv, * when the next data out interrupt is received. */ - privep->txbusy = TRUE; + privep->txbusy = true; } /**************************************************************************** @@ -1204,8 +1206,8 @@ static void stm32_epwrite(struct stm32_usbdev_s *priv, static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep) { struct stm32_req_s *privreq; - ubyte *buf; - ubyte epno; + uint8_t *buf; + uint8_t epno; int nbytes; int bytesleft; @@ -1213,7 +1215,7 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive * there is no TX transfer in progress. */ - privep->txbusy = FALSE; + privep->txbusy = false; /* Check the request from the head of the endpoint request queue */ @@ -1299,9 +1301,9 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive static int stm32_rdrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep) { struct stm32_req_s *privreq; - uint32 src; - ubyte *dest; - ubyte epno; + uint32_t src; + uint8_t *dest; + uint8_t epno; int pmalen; int readlen; @@ -1333,7 +1335,7 @@ static int stm32_rdrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive usbtrace(TRACE_READ(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); - /* Get the source and desintion transfer addresses */ + /* Get the source and destination transfer addresses */ dest = privreq->req.buf + privreq->req.xfrd; src = stm32_geteprxaddr(epno); @@ -1412,10 +1414,10 @@ static void stm32_dispatchrequest(struct stm32_usbdev_s *priv) * Name: stm32_epdone ****************************************************************************/ -static void stm32_epdone(struct stm32_usbdev_s *priv, ubyte epno) +static void stm32_epdone(struct stm32_usbdev_s *priv, uint8_t epno) { struct stm32_ep_s *privep; - uint16 epr; + uint16_t epr; /* Decode and service non control endpoints interrupt */ @@ -1444,14 +1446,14 @@ static void stm32_epdone(struct stm32_usbdev_s *priv, ubyte epno) } else { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUTPENDING), (uint16)epno); + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUTPENDING), (uint16_t)epno); /* Mark the RX processing as pending and NAK any OUT actions * on this endpoint */ priv->rxstatus = USB_EPR_STATRX_NAK; - priv->rxpending = TRUE; + priv->rxpending = true; } /* Clear the interrupt status and set the new RX status */ @@ -1486,7 +1488,7 @@ static void stm32_epdone(struct stm32_usbdev_s *priv, ubyte epno) * Name: stm32_setdevaddr ****************************************************************************/ -static void stm32_setdevaddr(struct stm32_usbdev_s *priv, ubyte value) +static void stm32_setdevaddr(struct stm32_usbdev_s *priv, uint8_t value) { int epno; @@ -1496,7 +1498,7 @@ static void stm32_setdevaddr(struct stm32_usbdev_s *priv, ubyte value) { if (stm32_epreserved(priv, epno)) { - stm32_setepaddress((ubyte)epno, (ubyte)epno); + stm32_setepaddress((uint8_t)epno, (uint8_t)epno); } } @@ -1518,8 +1520,8 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) union wb_u index; union wb_u len; union wb_u response; - boolean handled = FALSE; - ubyte epno; + bool handled = false; + uint8_t epno; int nbytes = 0; /* Assume zero-length packet */ int ret; @@ -1529,7 +1531,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) while (!stm32_rqempty(ep0)) { - sint16 result = OK; + int16_t result = OK; if (privreq->req.xfrd != privreq->req.len) { result = -EPROTO; @@ -1546,7 +1548,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) /* Get a 32-bit PMA address and use that to get the 8-byte setup request */ - stm32_copyfrompma((ubyte*)&priv->ctrl, stm32_geteprxaddr(EP0), USB_SIZEOF_CTRLREQ); + stm32_copyfrompma((uint8_t*)&priv->ctrl, stm32_geteprxaddr(EP0), USB_SIZEOF_CTRLREQ); /* And extract the little-endian 16-bit values to host order */ @@ -1693,7 +1695,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) */ stm32_dispatchrequest(priv); - handled = TRUE; + handled = true; } else { @@ -1705,7 +1707,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) { privep = &priv->eplist[epno]; privep->halted = 0; - ret = stm32_epstall(&privep->ep, TRUE); + ret = stm32_epstall(&privep->ep, true); } else { @@ -1737,7 +1739,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) /* The class driver handles all recipients except recipient=endpoint */ stm32_dispatchrequest(priv); - handled = TRUE; + handled = true; } else { @@ -1749,7 +1751,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) { privep = &priv->eplist[epno]; privep->halted = 1; - ret = stm32_epstall(&privep->ep, FALSE); + ret = stm32_epstall(&privep->ep, false); } else { @@ -1803,7 +1805,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) /* The request seems valid... let the class implementation handle it */ stm32_dispatchrequest(priv); - handled = TRUE; + handled = true; } else { @@ -1828,7 +1830,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) /* The request seems valid... let the class implementation handle it */ stm32_dispatchrequest(priv); - handled = TRUE; + handled = true; } else { @@ -1853,7 +1855,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) /* The request seems valid... let the class implementation handle it */ stm32_dispatchrequest(priv); - handled = TRUE; + handled = true; } else { @@ -1881,7 +1883,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSETIF), priv->ctrl.type); stm32_dispatchrequest(priv); - handled = TRUE; + handled = true; } break; @@ -1912,7 +1914,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv) * must be sent (may be a zero length packet). * 2. The request was successfully handled by the class implementation. In * case, the EP0 IN response has already been queued and the local variable - * 'handled' will be set to TRUE and devstate != DEVSTATE_STALLED; + * 'handled' will be set to true and devstate != DEVSTATE_STALLED; * 3. An error was detected in either the above logic or by the class implementation * logic. In either case, priv->state will be set DEVSTATE_STALLED * to indicate this case. @@ -1948,7 +1950,7 @@ static void stm32_ep0in(struct stm32_usbdev_s *priv) { /* There is no longer anything in the EP0 TX packet memory */ - priv->eplist[EP0].txbusy = FALSE; + priv->eplist[EP0].txbusy = false; /* Are we processing the completion of one packet of an outgoing request * from the class driver? @@ -2009,9 +2011,9 @@ static void stm32_ep0out(struct stm32_usbdev_s *priv) * Name: stm32_ep0done ****************************************************************************/ -static inline void stm32_ep0done(struct stm32_usbdev_s *priv, uint16 istr) +static inline void stm32_ep0done(struct stm32_usbdev_s *priv, uint16_t istr) { - uint16 epr; + uint16_t epr; /* Initialize RX and TX status. We shouldn't have to actually look at the * status because the hardware is supposed to set the both RX and TX status @@ -2134,18 +2136,18 @@ static inline void stm32_ep0done(struct stm32_usbdev_s *priv, uint16 istr) static void stm32_lptransfer(struct stm32_usbdev_s *priv) { - ubyte epno; - uint16 istr; + uint8_t epno; + uint16_t istr; /* Stay in loop while LP interrupts are pending */ while (((istr = stm32_getreg(STM32_USB_ISTR)) & USB_ISTR_CTR) != 0) { - stm32_putreg((uint16)~USB_ISTR_CTR, STM32_USB_ISTR); + stm32_putreg((uint16_t)~USB_ISTR_CTR, STM32_USB_ISTR); /* Extract highest priority endpoint number */ - epno = (ubyte)(istr & USB_ISTR_EPID_MASK); + epno = (uint8_t)(istr & USB_ISTR_EPID_MASK); /* Handle EP0 completion events */ @@ -2175,8 +2177,8 @@ static int stm32_hpinterrupt(int irq, void *context) */ struct stm32_usbdev_s *priv = &g_usbdev; - uint16 istr; - ubyte epno; + uint16_t istr; + uint8_t epno; /* High priority interrupts are only triggered by a correct transfer event * for isochronous and double-buffer bulk transfers. @@ -2186,11 +2188,11 @@ static int stm32_hpinterrupt(int irq, void *context) usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_HPINTERRUPT), istr); while ((istr & USB_ISTR_CTR) != 0) { - stm32_putreg((uint16)~USB_ISTR_CTR, STM32_USB_ISTR); + stm32_putreg((uint16_t)~USB_ISTR_CTR, STM32_USB_ISTR); /* Extract highest priority endpoint number */ - epno = (ubyte)(istr & USB_ISTR_EPID_MASK); + epno = (uint8_t)(istr & USB_ISTR_EPID_MASK); /* And handle the completion event */ @@ -2217,7 +2219,7 @@ static int stm32_lpinterrupt(int irq, void *context) */ struct stm32_usbdev_s *priv = &g_usbdev; - uint16 istr = stm32_getreg(STM32_USB_ISTR); + uint16_t istr = stm32_getreg(STM32_USB_ISTR); usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_LPINTERRUPT), istr); @@ -2306,9 +2308,9 @@ exit_lpinterrupt: ****************************************************************************/ static void -stm32_setimask(struct stm32_usbdev_s *priv, uint16 setbits, uint16 clrbits) +stm32_setimask(struct stm32_usbdev_s *priv, uint16_t setbits, uint16_t clrbits) { - uint16 regval; + uint16_t regval; /* Adjust the interrupt mask bits in the shadow copy first */ @@ -2334,7 +2336,7 @@ stm32_setimask(struct stm32_usbdev_s *priv, uint16 setbits, uint16 clrbits) static void stm32_suspend(struct stm32_usbdev_s *priv) { - uint16 regval; + uint16_t regval; /* Disable ESOF polling, disable the SUSP interrupt, and enable the WKUP * interrupt. Clear any pending WKUP interrupt. @@ -2369,7 +2371,7 @@ static void stm32_suspend(struct stm32_usbdev_s *priv) * state */ - stm32_usbsuspend((struct usbdev_s *)priv, FALSE); + stm32_usbsuspend((struct usbdev_s *)priv, false); } /**************************************************************************** @@ -2378,7 +2380,7 @@ static void stm32_suspend(struct stm32_usbdev_s *priv) static void stm32_initresume(struct stm32_usbdev_s *priv) { - uint16 regval; + uint16_t regval; /* This function is called when either (1) a WKUP interrupt is received from * the host PC, or (2) the class device implementation calls the wakeup() @@ -2396,7 +2398,7 @@ static void stm32_initresume(struct stm32_usbdev_s *priv) /* Restore full power -- whatever that means for this particular board */ - stm32_usbsuspend((struct usbdev_s *)priv, TRUE); + stm32_usbsuspend((struct usbdev_s *)priv, true); /* Reset FSUSP bit and enable normal interrupt handling */ @@ -2409,7 +2411,7 @@ static void stm32_initresume(struct stm32_usbdev_s *priv) static void stm32_esofpoll(struct stm32_usbdev_s *priv) { - uint16 regval; + uint16_t regval; /* Called periodically from ESOF interrupt after RSMSTATE_STARTED */ @@ -2462,7 +2464,7 @@ static void stm32_esofpoll(struct stm32_usbdev_s *priv) ****************************************************************************/ static inline struct stm32_ep_s * -stm32_epreserve(struct stm32_usbdev_s *priv, ubyte epset) +stm32_epreserve(struct stm32_usbdev_s *priv, uint8_t epset) { struct stm32_ep_s *privep = NULL; irqstate_t flags; @@ -2478,7 +2480,7 @@ stm32_epreserve(struct stm32_usbdev_s *priv, ubyte epset) for (epndx = 1; epndx < STM32_NENDPOINTS; epndx++) { - ubyte bit = STM32_ENDP_BIT(epndx); + uint8_t bit = STM32_ENDP_BIT(epndx); if ((epset & bit) != 0) { /* Mark the endpoint no longer available */ @@ -2513,7 +2515,7 @@ stm32_epunreserve(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep) * Name: stm32_epreserved ****************************************************************************/ -static inline boolean +static inline bool stm32_epreserved(struct stm32_usbdev_s *priv, int epno) { return ((priv->epavail & STM32_ENDP_BIT(epno)) == 0); @@ -2534,7 +2536,7 @@ static int stm32_epallocpma(struct stm32_usbdev_s *priv) { /* Check if this buffer is available */ - ubyte bit = STM32_BUFFER_BIT(bufndx); + uint8_t bit = STM32_BUFFER_BIT(bufndx); if ((priv->bufavail & bit) != 0) { /* Yes.. Mark the endpoint no longer available */ @@ -2573,13 +2575,13 @@ stm32_epfreepma(struct stm32_usbdev_s *priv, struct stm32_ep_s *privep) static int stm32_epconfigure(struct usbdev_ep_s *ep, const struct usb_epdesc_s *desc, - boolean last) + bool last) { struct stm32_ep_s *privep = (struct stm32_ep_s *)ep; - uint16 pma; - uint16 setting; - uint16 maxpacket; - ubyte epno; + uint16_t pma; + uint16_t setting; + uint16_t maxpacket; + uint8_t epno; #ifdef CONFIG_DEBUG if (!ep || !desc) @@ -2593,7 +2595,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep, /* Get the unadorned endpoint address */ epno = USB_EPNO(desc->addr); - usbtrace(TRACE_EPCONFIGURE, (uint16)epno); + usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno); DEBUGASSERT(epno == USB_EPNO(ep->eplog)); /* Set the requested type */ @@ -2618,7 +2620,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep, break; default: - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPTYPE), (uint16)desc->type); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPTYPE), (uint16_t)desc->type); return -EINVAL; } @@ -2675,7 +2677,7 @@ static int stm32_epdisable(struct usbdev_ep_s *ep) { struct stm32_ep_s *privep = (struct stm32_ep_s *)ep; irqstate_t flags; - ubyte epno; + uint8_t epno; #ifdef CONFIG_DEBUG if (!ep) @@ -2762,7 +2764,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) struct stm32_ep_s *privep = (struct stm32_ep_s *)ep; struct stm32_usbdev_s *priv; irqstate_t flags; - ubyte epno; + uint8_t epno; int ret = OK; #ifdef CONFIG_DEBUG @@ -2847,7 +2849,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) /* Clear the pending interrupt status */ stm32_clrepctrrx(epno); - priv->rxpending = FALSE; + priv->rxpending = false; /* Set the new RX status */ @@ -2889,12 +2891,12 @@ static int stm32_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) * Name: stm32_epstall ****************************************************************************/ -static int stm32_epstall(struct usbdev_ep_s *ep, boolean resume) +static int stm32_epstall(struct usbdev_ep_s *ep, bool resume) { struct stm32_ep_s *privep; struct stm32_usbdev_s *priv; - ubyte epno = USB_EPNO(ep->eplog); - uint16 status; + uint8_t epno = USB_EPNO(ep->eplog); + uint16_t status; irqstate_t flags; #ifdef CONFIG_DEBUG @@ -2940,7 +2942,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, boolean resume) /* Resuming a stalled endpoint */ usbtrace(TRACE_EPRESUME, epno); - privep->stalled = FALSE; + privep->stalled = false; if (USB_ISEPIN(ep->eplog)) { @@ -2988,7 +2990,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, boolean resume) else { usbtrace(TRACE_EPSTALL, epno); - privep->stalled = TRUE; + privep->stalled = true; if (USB_ISEPIN(ep->eplog)) { @@ -3017,15 +3019,15 @@ static int stm32_epstall(struct usbdev_ep_s *ep, boolean resume) * Name: stm32_allocep ****************************************************************************/ -static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, ubyte epno, - boolean in, ubyte eptype) +static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, uint8_t epno, + bool in, uint8_t eptype) { struct stm32_usbdev_s *priv = (struct stm32_usbdev_s *)dev; struct stm32_ep_s *privep = NULL; - ubyte epset = STM32_ENDP_ALLSET; + uint8_t epset = STM32_ENDP_ALLSET; int bufno; - usbtrace(TRACE_DEVALLOCEP, (uint16)epno); + usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno); #ifdef CONFIG_DEBUG if (!dev) { @@ -3051,7 +3053,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, ubyte epno, if (epno >= STM32_NENDPOINTS) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPNO), (uint16)epno); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPNO), (uint16_t)epno); return NULL; } @@ -3068,7 +3070,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, ubyte epno, privep = stm32_epreserve(priv, epset); if (!privep) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPRESERVE), (uint16)epset); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPRESERVE), (uint16_t)epset); goto errout; } epno = USB_EPNO(privep->ep.eplog); @@ -3082,7 +3084,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, ubyte epno, usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPBUFFER), 0); goto errout_with_ep; } - privep->bufno = (ubyte)bufno; + privep->bufno = (uint8_t)bufno; return &privep->ep; errout_with_ep: @@ -3109,7 +3111,7 @@ static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep) #endif priv = (struct stm32_usbdev_s *)dev; privep = (struct stm32_ep_s *)ep; - usbtrace(TRACE_DEVFREEEP, (uint16)USB_EPNO(ep->eplog)); + usbtrace(TRACE_DEVFREEEP, (uint16_t)USB_EPNO(ep->eplog)); if (priv && privep) { @@ -3129,7 +3131,7 @@ static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep) static int stm32_getframe(struct usbdev_s *dev) { - uint16 fnr; + uint16_t fnr; #ifdef CONFIG_DEBUG if (!dev) @@ -3188,11 +3190,11 @@ static int stm32_wakeup(struct usbdev_s *dev) * Name: stm32_selfpowered ****************************************************************************/ -static int stm32_selfpowered(struct usbdev_s *dev, boolean selfpowered) +static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered) { struct stm32_usbdev_s *priv = (struct stm32_usbdev_s *)dev; - usbtrace(TRACE_DEVSELFPOWERED, (uint16)selfpowered); + usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered); #ifdef CONFIG_DEBUG if (!dev) @@ -3232,7 +3234,7 @@ static void stm32_reset(struct stm32_usbdev_s *priv) priv->devstate = DEVSTATE_IDLE; priv->rsmstate = RSMSTATE_IDLE; - priv->rxpending = FALSE; + priv->rxpending = false; /* Reset endpoints */ @@ -3252,10 +3254,10 @@ static void stm32_reset(struct stm32_usbdev_s *priv) /* Reset endpoint status */ - privep->stalled = FALSE; - privep->halted = FALSE; - privep->txbusy = FALSE; - privep->txnullpkt = FALSE; + privep->stalled = false; + privep->halted = false; + privep->txbusy = false; + privep->txnullpkt = false; } /* Re-configure the USB controller in its initial, unconnected state */ @@ -3345,7 +3347,7 @@ void up_usbinitialize(void) * host to enumerate us until the class driver is registered. */ - stm32_usbpullup(&priv->usbdev, FALSE); + stm32_usbpullup(&priv->usbdev, false); /* Initialize the device state structure. NOTE: many fields * have the initial value of zero and, hence, are not explicitly @@ -3416,14 +3418,14 @@ void up_usbinitialize(void) if (irq_attach(STM32_IRQ_USBHPCANTX, stm32_hpinterrupt) != 0) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_IRQREGISTRATION), - (uint16)STM32_IRQ_USBHPCANTX); + (uint16_t)STM32_IRQ_USBHPCANTX); goto errout; } if (irq_attach(STM32_IRQ_USBLPCANRX0, stm32_lpinterrupt) != 0) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_IRQREGISTRATION), - (uint16)STM32_IRQ_USBLPCANRX0); + (uint16_t)STM32_IRQ_USBLPCANRX0); goto errout; } return; @@ -3452,7 +3454,7 @@ void up_usbuninitialize(void) */ struct stm32_usbdev_s *priv = &g_usbdev; - uint16 regval; + uint16_t regval; irqstate_t flags; usbtrace(TRACE_DEVUNINIT, 0); @@ -3483,7 +3485,7 @@ void up_usbuninitialize(void) /* Disconnect the device / disable the pull-up */ - stm32_usbpullup(&priv->usbdev, FALSE); + stm32_usbpullup(&priv->usbdev, false); /* Power down the USB controller */ @@ -3536,7 +3538,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) ret = CLASS_BIND(driver, &priv->usbdev); if (ret) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BINDFAILED), (uint16)-ret); + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BINDFAILED), (uint16_t)-ret); priv->driver = NULL; } else @@ -3559,7 +3561,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) * some time after this */ - stm32_usbpullup(&priv->usbdev, TRUE); + stm32_usbpullup(&priv->usbdev, true); priv->usbdev.speed = USB_SPEED_FULL; } return ret; diff --git a/arch/arm/src/stm32/stm32_usbdev.h b/arch/arm/src/stm32/stm32_usbdev.h index 2774e49c82..ae2df5dc16 100644 --- a/arch/arm/src/stm32/stm32_usbdev.h +++ b/arch/arm/src/stm32/stm32_usbdev.h @@ -41,7 +41,7 @@ ************************************************************************************/ #include -#include +#include #include "chip.h" /************************************************************************************ @@ -77,7 +77,7 @@ #define STM32_USB_ADDR_RX_WOFFSET (4) /* Reception buffer address n (16-bits) */ #define STM32_USB_COUNT_RX_WOFFSET (6) /* Reception byte count n (16-bits) */ -#define STM32_USB_BTABLE_RADDR(ep,o) ((((uint32)getreg16(STM32_USB_BTABLE) + ((ep) << 3)) + (o)) << 1) +#define STM32_USB_BTABLE_RADDR(ep,o) ((((uint32_t)getreg16(STM32_USB_BTABLE) + ((ep) << 3)) + (o)) << 1) #define STM32_USB_ADDR_TX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_ADDR_TX_WOFFSET) #define STM32_USB_COUNT_TX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_COUNT_TX_WOFFSET) #define STM32_USB_ADDR_RX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_ADDR_RX_WOFFSET) diff --git a/arch/arm/src/stm32/stm32_wdg.h b/arch/arm/src/stm32/stm32_wdg.h index 0e574e3be1..d5a1ee2df7 100644 --- a/arch/arm/src/stm32/stm32_wdg.h +++ b/arch/arm/src/stm32/stm32_wdg.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/stm32/stm32f103ze_pinmap.h b/arch/arm/src/stm32/stm32f103ze_pinmap.h index c2b8473f4b..93f7e9d846 100644 --- a/arch/arm/src/stm32/stm32f103ze_pinmap.h +++ b/arch/arm/src/stm32/stm32f103ze_pinmap.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Alternate Pin Functions: */ diff --git a/arch/arm/src/stm32/stm32f107vc_pinmap.h b/arch/arm/src/stm32/stm32f107vc_pinmap.h index a35ff741ff..1e81e1434d 100755 --- a/arch/arm/src/stm32/stm32f107vc_pinmap.h +++ b/arch/arm/src/stm32/stm32f107vc_pinmap.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Alternate Pin Functions: */ diff --git a/arch/arm/src/str71x/chip.h b/arch/arm/src/str71x/chip.h index abd9c5e26a..9451419930 100644 --- a/arch/arm/src/str71x/chip.h +++ b/arch/arm/src/str71x/chip.h @@ -41,7 +41,6 @@ ************************************************************************************/ #include -#include #include "str71x_map.h" /* Memory map */ #include "str71x_emi.h" /* External memory interface */ @@ -63,7 +62,7 @@ #include "str71x_flash.h" /* Flash */ /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /************************************************************************************ diff --git a/arch/arm/src/str71x/str71x_adc12.h b/arch/arm/src/str71x/str71x_adc12.h index a4393ee949..1f15adfb71 100644 --- a/arch/arm/src/str71x/str71x_adc12.h +++ b/arch/arm/src/str71x/str71x_adc12.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_adc12.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* ADC12 registers ******************************************************************/ diff --git a/arch/arm/src/str71x/str71x_apb.h b/arch/arm/src/str71x/str71x_apb.h index f5453dc2b5..4b8efe2a92 100644 --- a/arch/arm/src/str71x/str71x_apb.h +++ b/arch/arm/src/str71x/str71x_apb.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_apb.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* APB register offsets *************************************************************/ diff --git a/arch/arm/src/str71x/str71x_bspi.h b/arch/arm/src/str71x/str71x_bspi.h index 967b31dbe4..537563c3d6 100644 --- a/arch/arm/src/str71x/str71x_bspi.h +++ b/arch/arm/src/str71x/str71x_bspi.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_bspi.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Register Offsets *****************************************************************/ diff --git a/arch/arm/src/str71x/str71x_can.h b/arch/arm/src/str71x/str71x_can.h index a4dab4e2ac..a38630d660 100644 --- a/arch/arm/src/str71x/str71x_can.h +++ b/arch/arm/src/str71x/str71x_can.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_can.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Registers ************************************************************************/ diff --git a/arch/arm/src/str71x/str71x_decodeirq.c b/arch/arm/src/str71x/str71x_decodeirq.c index ac53bf0deb..035ec5318d 100644 --- a/arch/arm/src/str71x/str71x_decodeirq.c +++ b/arch/arm/src/str71x/str71x_decodeirq.c @@ -38,7 +38,8 @@ ********************************************************************************/ #include -#include + +#include #include #include #include @@ -50,7 +51,7 @@ #include "chip.h" /******************************************************************************** - * Definitions + * Pre-procesor Definitions ********************************************************************************/ /******************************************************************************** @@ -84,7 +85,7 @@ * ********************************************************************************/ -void up_decodeirq(uint32 *regs) +void up_decodeirq(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS up_ledon(LED_INIRQ); diff --git a/arch/arm/src/str71x/str71x_eic.h b/arch/arm/src/str71x/str71x_eic.h index 74cf592574..7b0301695a 100644 --- a/arch/arm/src/str71x/str71x_eic.h +++ b/arch/arm/src/str71x/str71x_eic.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_eic.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Enhanced Interupt Controller (EIC) register offsets ******************************/ diff --git a/arch/arm/src/str71x/str71x_emi.h b/arch/arm/src/str71x/str71x_emi.h index 27972c5b4c..68c35cd07e 100644 --- a/arch/arm/src/str71x/str71x_emi.h +++ b/arch/arm/src/str71x/str71x_emi.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_emi.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* External Memory Interfac (EMI) register offset ***********************************/ diff --git a/arch/arm/src/str71x/str71x_flash.h b/arch/arm/src/str71x/str71x_flash.h index c21c34c88e..352972d482 100644 --- a/arch/arm/src/str71x/str71x_flash.h +++ b/arch/arm/src/str71x/str71x_flash.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_flash.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Flash registers ******************************************************************/ diff --git a/arch/arm/src/str71x/str71x_gpio.h b/arch/arm/src/str71x/str71x_gpio.h index d8e307ec3e..dbcd3cdeb0 100644 --- a/arch/arm/src/str71x/str71x_gpio.h +++ b/arch/arm/src/str71x/str71x_gpio.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* GPIO register offsets ************************************************************/ diff --git a/arch/arm/src/str71x/str71x_i2c.h b/arch/arm/src/str71x/str71x_i2c.h index e1a8ab6867..8a0cd498f0 100644 --- a/arch/arm/src/str71x/str71x_i2c.h +++ b/arch/arm/src/str71x/str71x_i2c.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_i2c.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Register offets ******************************************************************/ diff --git a/arch/arm/src/str71x/str71x_internal.h b/arch/arm/src/str71x/str71x_internal.h index 5dea598de1..468c48600c 100644 --- a/arch/arm/src/str71x/str71x_internal.h +++ b/arch/arm/src/str71x/str71x_internal.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_internal.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Calculate the values of PCLK1 and PCLK2 from settings in board.h. diff --git a/arch/arm/src/str71x/str71x_irq.c b/arch/arm/src/str71x/str71x_irq.c index d9804e1748..2f9570d029 100644 --- a/arch/arm/src/str71x/str71x_irq.c +++ b/arch/arm/src/str71x/str71x_irq.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include #include @@ -49,14 +50,14 @@ #include "chip.h" /**************************************************************************** - * Definitions + * Pre-procesor Definitions ****************************************************************************/ /**************************************************************************** * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data @@ -116,7 +117,7 @@ void up_irqinitialize(void) void up_disable_irq(int irq) { - uint32 reg32; + uint32_t reg32; if ((unsigned)irq < NR_IRQS) { @@ -138,7 +139,7 @@ void up_disable_irq(int irq) void up_enable_irq(int irq) { - uint32 reg32; + uint32_t reg32; if ((unsigned)irq < NR_IRQS) { @@ -160,7 +161,7 @@ void up_enable_irq(int irq) void up_maskack_irq(int irq) { - uint32 reg32; + uint32_t reg32; if ((unsigned)irq < NR_IRQS) { @@ -190,8 +191,8 @@ void up_maskack_irq(int irq) int up_prioritize_irq(int irq, int priority) { - uint32 addr; - uint32 reg32; + uint32_t addr; + uint32_t reg32; /* The current interrupt priority (CIP) is always zero, so a minimum prioriy * of one is enforced to prevent disabling the interrupt. diff --git a/arch/arm/src/str71x/str71x_lowputc.c b/arch/arm/src/str71x/str71x_lowputc.c index ae20cbb266..bf81f5b663 100644 --- a/arch/arm/src/str71x/str71x_lowputc.c +++ b/arch/arm/src/str71x/str71x_lowputc.c @@ -1,7 +1,7 @@ /************************************************************************** * arch/arm/src/str71x/str71x_lowputc.c * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,7 +38,7 @@ **************************************************************************/ #include -#include +#include #include "up_internal.h" #include "up_arch.h" @@ -47,7 +47,7 @@ #include "str71x_internal.h" /************************************************************************** - * Private Definitions + * Pre-procesor Definitions **************************************************************************/ /* Configuration **********************************************************/ @@ -259,7 +259,7 @@ void up_lowputc(char ch) /* Then send the character */ - putreg16((uint16)ch, STR71X_UART_TXBUFR(STR71X_UART_BASE)); + putreg16((uint16_t)ch, STR71X_UART_TXBUFR(STR71X_UART_BASE)); #endif } @@ -277,12 +277,12 @@ void up_lowsetup(void) { #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) - uint16 reg16; + uint16_t reg16; /* Enable the selected console device */ /* Set the UART baud rate */ - putreg16((uint16)UART_BAUDRATE, STR71X_UART_BR(STR71X_UART_BASE)); + putreg16((uint16_t)UART_BAUDRATE, STR71X_UART_BR(STR71X_UART_BASE)); /* Configure the UART control registers */ diff --git a/arch/arm/src/str71x/str71x_map.h b/arch/arm/src/str71x/str71x_map.h index 67abd49d7d..ad29e4d8d2 100644 --- a/arch/arm/src/str71x/str71x_map.h +++ b/arch/arm/src/str71x/str71x_map.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include -#include /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Memory Map ***********************************************************************/ diff --git a/arch/arm/src/str71x/str71x_pcu.h b/arch/arm/src/str71x/str71x_pcu.h index 9883b3331b..19050253e0 100644 --- a/arch/arm/src/str71x/str71x_pcu.h +++ b/arch/arm/src/str71x/str71x_pcu.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Power Control Unit (PCU) register offsets ****************************************/ diff --git a/arch/arm/src/str71x/str71x_prccu.c b/arch/arm/src/str71x/str71x_prccu.c index f439585392..61cee03dde 100644 --- a/arch/arm/src/str71x/str71x_prccu.c +++ b/arch/arm/src/str71x/str71x_prccu.c @@ -38,8 +38,8 @@ ********************************************************************************/ #include -#include +#include #include #include @@ -51,7 +51,7 @@ #include "str71x_internal.h" /******************************************************************************** - * Definitions + * Pre-procesor Definitions ********************************************************************************/ /* Select set of peripherals to be enabled */ @@ -359,8 +359,8 @@ void str71x_prccuinit(void) { - uint32 reg32; - uint16 reg16; + uint32_t reg32; + uint16_t reg16; /* Divide RCLK to obtain PCLK1 & 2 clock for the APB1 & 2 peripherals. The divider * values are provided in board.h diff --git a/arch/arm/src/str71x/str71x_rccu.h b/arch/arm/src/str71x/str71x_rccu.h index 18bd448d06..858bd80892 100644 --- a/arch/arm/src/str71x/str71x_rccu.h +++ b/arch/arm/src/str71x/str71x_rccu.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Reset and Clock Control Unit (RCCU) register offsets *****************************/ diff --git a/arch/arm/src/str71x/str71x_rtc.h b/arch/arm/src/str71x/str71x_rtc.h index c9ac48d9eb..634638f7e3 100644 --- a/arch/arm/src/str71x/str71x_rtc.h +++ b/arch/arm/src/str71x/str71x_rtc.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_rtc.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* RTC Registers ********************************************************************/ diff --git a/arch/arm/src/str71x/str71x_serial.c b/arch/arm/src/str71x/str71x_serial.c index 481603875f..da4d280ebc 100644 --- a/arch/arm/src/str71x/str71x_serial.c +++ b/arch/arm/src/str71x/str71x_serial.c @@ -38,7 +38,10 @@ ****************************************************************************/ #include + #include +#include +#include #include #include #include @@ -56,7 +59,7 @@ #include "str71x_internal.h" /**************************************************************************** - * Definitions + * Pre-procesor Definitions ****************************************************************************/ /* Some sanity checks *******************************************************/ @@ -221,14 +224,14 @@ struct up_dev_s { - uint32 uartbase; /* Base address of UART registers */ - uint32 baud; /* Configured baud */ - uint16 ier; /* Saved IER value */ - uint16 sr; /* Saved SR value (only used during interrupt processing) */ - ubyte irq; /* IRQ associated with this UART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - boolean stopbits2; /* TRUE: Configure with 2 stop bits instead of 1 */ + uint32_t uartbase; /* Base address of UART registers */ + uint32_t baud; /* Configured baud */ + uint16_t ier; /* Saved IER value */ + uint16_t sr; /* Saved SR value (only used during interrupt processing) */ + uint8_t irq; /* IRQ associated with this UART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ }; /**************************************************************************** @@ -237,29 +240,29 @@ struct up_dev_s /* Internal Helpers */ -static inline uint16 up_serialin(struct up_dev_s *priv, int offset); -static inline void up_serialout(struct up_dev_s *priv, int offset, uint16 value); -static inline void up_disableuartint(struct up_dev_s *priv, uint16 *ier); -static inline void up_restoreuartint(struct up_dev_s *priv, uint16 ier); +static inline uint16_t up_serialin(struct up_dev_s *priv, int offset); +static inline void up_serialout(struct up_dev_s *priv, int offset, uint16_t value); +static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier); +static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier); #ifdef HAVE_CONSOLE static inline void up_waittxnotfull(struct up_dev_s *priv); #endif /* Serial Driver Methods */ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -428,7 +431,7 @@ static uart_dev_t g_uart3port = * Name: up_serialin ****************************************************************************/ -static inline uint16 up_serialin(struct up_dev_s *priv, int offset) +static inline uint16_t up_serialin(struct up_dev_s *priv, int offset) { return getreg16(priv->uartbase + offset); } @@ -437,7 +440,7 @@ static inline uint16 up_serialin(struct up_dev_s *priv, int offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, int offset, uint16 value) +static inline void up_serialout(struct up_dev_s *priv, int offset, uint16_t value) { putreg16(value, priv->uartbase + offset); } @@ -446,7 +449,7 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint16 value) * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, uint16 *ier) +static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier) { if (ier) { @@ -461,7 +464,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint16 *ier) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, uint16 ier) +static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier) { priv->ier = ier; up_serialout(priv, STR71X_UART_IER_OFFSET, ier); @@ -505,9 +508,9 @@ static int up_setup(struct uart_dev_s *dev) { #ifndef CONFIG_SUPPRESS_UART_CONFIG struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 divisor; - uint32 baud; - uint16 cr; + uint32_t divisor; + uint32_t baud; + uint16_t cr; /* Set the BAUD rate */ @@ -663,7 +666,7 @@ static int up_interrupt(int irq, void *context) struct uart_dev_s *dev = NULL; struct up_dev_s *priv; int passes; - boolean handled; + bool handled; #ifdef CONFIG_STR71X_UART0 if (g_uart0priv.irq == irq) @@ -704,10 +707,10 @@ static int up_interrupt(int irq, void *context) * until we have been looping for a long time. */ - handled = TRUE; + handled = true; for (passes = 0; passes < 256 && handled; passes++) { - handled = FALSE; + handled = false; /* Get the current UART status */ @@ -721,7 +724,7 @@ static int up_interrupt(int irq, void *context) /* Rx buffer not empty ... process incoming bytes */ uart_recvchars(dev); - handled = TRUE; + handled = true; } /* Handle outgoing, transmit bytes */ @@ -732,7 +735,7 @@ static int up_interrupt(int irq, void *context) /* Tx FIFO not full ... process outgoing bytes */ uart_xmitchars(dev); - handled = TRUE; + handled = true; } } @@ -787,13 +790,13 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint16 rxbufr; + uint16_t rxbufr; rxbufr = up_serialin(priv, STR71X_UART_RXBUFR_OFFSET); - *status = (uint32)priv->sr << 16 | rxbufr; + *status = (uint32_t)priv->sr << 16 | rxbufr; return rxbufr & 0xff; } @@ -805,7 +808,7 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -829,11 +832,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & RXAVAILABLE_BITS) != 0); @@ -850,7 +853,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16)ch); + up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)ch); } /**************************************************************************** @@ -861,7 +864,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -885,11 +888,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TF) == 0); @@ -899,11 +902,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TE) != 0); @@ -945,7 +948,7 @@ void up_earlyserialinit(void) /* Configuration whichever one is the console */ #ifdef HAVE_CONSOLE - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); #endif } @@ -993,11 +996,11 @@ int up_putc(int ch) { #ifdef HAVE_CONSOLE struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint16 ier; + uint16_t ier; up_disableuartint(priv, &ier); up_waittxnotfull(priv); - up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16)ch); + up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)ch); /* Check for LF */ @@ -1006,7 +1009,7 @@ int up_putc(int ch) /* Add CR */ up_waittxnotfull(priv); - up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16)'\r'); + up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)'\r'); } up_waittxnotfull(priv); diff --git a/arch/arm/src/str71x/str71x_timer.h b/arch/arm/src/str71x/str71x_timer.h index 331c538de6..2076a1d1d6 100644 --- a/arch/arm/src/str71x/str71x_timer.h +++ b/arch/arm/src/str71x/str71x_timer.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_timer.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Register offsets *****************************************************************/ diff --git a/arch/arm/src/str71x/str71x_timerisr.c b/arch/arm/src/str71x/str71x_timerisr.c index 7add001c8c..238e0eb77e 100644 --- a/arch/arm/src/str71x/str71x_timerisr.c +++ b/arch/arm/src/str71x/str71x_timerisr.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include -#include + +#include #include #include #include @@ -52,7 +53,7 @@ #include "str71x_internal.h" /**************************************************************************** - * Definitions + * Pre-procesor Definitions ****************************************************************************/ /* Configuration */ @@ -131,9 +132,9 @@ * ****************************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { - uint16 ocar; + uint16_t ocar; /* Clear all the output compare A interrupt status bit */ diff --git a/arch/arm/src/str71x/str71x_uart.h b/arch/arm/src/str71x/str71x_uart.h index 4bf95db61d..9178062c43 100644 --- a/arch/arm/src/str71x/str71x_uart.h +++ b/arch/arm/src/str71x/str71x_uart.h @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Registers offsets ****************************************************************/ diff --git a/arch/arm/src/str71x/str71x_usb.h b/arch/arm/src/str71x/str71x_usb.h index de32637b92..7fcbf57277 100644 --- a/arch/arm/src/str71x/str71x_usb.h +++ b/arch/arm/src/str71x/str71x_usb.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_usb.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* USB registers ********************************************************************/ diff --git a/arch/arm/src/str71x/str71x_wdog.h b/arch/arm/src/str71x/str71x_wdog.h index 36059e58c5..75b89ab891 100644 --- a/arch/arm/src/str71x/str71x_wdog.h +++ b/arch/arm/src/str71x/str71x_wdog.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_wdog.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* Registers ************************************************************************/ diff --git a/arch/arm/src/str71x/str71x_xti.h b/arch/arm/src/str71x/str71x_xti.h index 45f8778af9..bbe3c46e05 100644 --- a/arch/arm/src/str71x/str71x_xti.h +++ b/arch/arm/src/str71x/str71x_xti.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/str71x/str71x_xti.h * - * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,11 +41,11 @@ ************************************************************************************/ #include -#include + #include "str71x_map.h" /************************************************************************************ - * Definitions + * Pre-procesor Definitions ************************************************************************************/ /* External Interupt Controller (XTI) registers *************************************/