arch/arm/src/nrf52: Add nrf52_gpio_read

This commit is contained in:
Janne Rosberg 2018-03-27 07:34:31 -06:00 committed by Gregory Nutt
parent d393f43caa
commit 99e04a2d39
3 changed files with 55 additions and 9 deletions

View File

@ -74,7 +74,14 @@
#define NRF52_GPIO0_DIR (NRF52_GPIO_P0_BASE + NRF52_GPIO_DIR_OFFSET)
#define NRF52_GPIO0_DIRSET (NRF52_GPIO_P0_BASE + NRF52_GPIO_DIRSET_OFFSET)
#define NRF52_GPIO0_DIRCLR (NRF52_GPIO_P0_BASE + NRF52_GPIO_DIRCLR_OFFSET)
#define NRF52_GPIO0_CNF(n) (NRF52_GPIO_P0_BASE + NRF52_GPIO_PIN_CNF_OFFSET(n))
/* Register bit definitions *********************************************************/
#define NRF52_GPIO_CNF_PULL_SHIFT (2)
#define NRF52_GPIO_CNF_PULL_MASK (0x3 << NRF52_GPIO_CNF_PULL_SHIFT)
# define NRF52_GPIO_CNF_PULL_DISABLED (0 << NRF52_GPIO_CNF_PULL_SHIFT)
# define NRF52_GPIO_CNF_PULL_DOWN (1 << NRF52_GPIO_CNF_PULL_SHIFT)
# define NRF52_GPIO_CNF_PULL_UP (3 << NRF52_GPIO_CNF_PULL_SHIFT)
#endif /* __ARCH_ARM_SRC_NRF52_CHIP_NRF52_GPIO_H */

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@ -69,7 +69,7 @@ static inline void nrf52_gpio_input(unsigned int port, unsigned int pin)
if (port == 0)
{
putreg32(1 << pin, NRF52_GPIO0_DIRCLR);
putreg32(1U << pin, NRF52_GPIO0_DIRCLR);
}
}
@ -89,9 +89,42 @@ static inline void nrf52_gpio_output(nrf52_pinset_t cfgset,
/* Configure the pin as an output */
if (port == 0)
{
putreg32(1 << pin, NRF52_GPIO0_DIRSET);
}
{
putreg32(1U << pin, NRF52_GPIO0_DIRSET);
}
}
/****************************************************************************
* Name: nrf52_gpio_mode
*
* Description:
* Configure a GPIO mode based on bit-encoded description of the pin.
*
****************************************************************************/
static inline void nrf52_gpio_mode(nrf52_pinset_t cfgset,
unsigned int port, unsigned int pin)
{
uint32_t mode;
uint32_t regval;
mode = cfgset & GPIO_MODE_MASK;
regval = getreg32(NRF52_GPIO0_CNF(pin));
regval &= NRF52_GPIO_CNF_PULL_MASK;
if (mode == GPIO_PULLUP)
{
regval &= NRF52_GPIO_CNF_PULL_MASK;
regval |= NRF52_GPIO_CNF_PULL_UP;
}
else if (mode == GPIO_PULLDOWN)
{
regval &= NRF52_GPIO_CNF_PULL_MASK;
regval |= NRF52_GPIO_CNF_PULL_DOWN;
}
putreg32(regval, NRF52_GPIO0_CNF(pin));
}
/****************************************************************************
@ -131,7 +164,7 @@ int nrf52_gpio_config(nrf52_pinset_t cfgset)
/* Set the mode bits */
//nrf52_gpio_iocon(cfgset, port, pin);
nrf52_gpio_mode(cfgset, port, pin);
/* Handle according to pin function */
@ -194,5 +227,11 @@ void nrf52_gpio_write(nrf52_pinset_t pinset, bool value)
bool nrf52_gpio_read(nrf52_pinset_t pinset)
{
#warning Missing implementation!
uint32_t regval;
unsigned int pin;
pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
regval = getreg32(NRF52_GPIO0_IN);
return (regval >> pin) & 1UL;
}

View File

@ -112,9 +112,9 @@
#define GPIO_MODE_SHIFT (7) /* Bits 7-8: Pin pull-up mode */
#define GPIO_MODE_MASK (0x3 << GPIO_MODE_SHIFT)
# define GPIO_FLOAT (GPIO_MODE_FLOAT << GPIO_MODE_SHIFT) /* Neither pull-up nor -down */
# define GPIO_PULLDOWN (GPIO_MODE_PULLDOWN << GPIO_MODE_SHIFT) /* Pull-down resistor enabled */
# define GPIO_PULLUP (GPIO_MODE_PULLUP << GPIO_MODE_SHIFT) /* Pull-up resistor enabled */
# define GPIO_FLOAT (0 << GPIO_MODE_SHIFT) /* Neither pull-up nor -down */
# define GPIO_PULLDOWN (1 << GPIO_MODE_SHIFT) /* Pull-down resistor enabled */
# define GPIO_PULLUP (2 << GPIO_MODE_SHIFT) /* Pull-up resistor enabled */
/* Initial value: V
*