From 99e4c14ee16838fd7550d9d75b714079ce0a7a2d Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 26 May 2015 15:03:35 -0600
Subject: [PATCH] Basic support for the Kinetis K20 architecture. Taken from
PX4. This is the work of Jakob Odersky.
---
arch/arm/include/kinetis/chip.h | 63 +++++++-
arch/arm/include/kinetis/irq.h | 86 ++++++++++-
arch/arm/src/kinetis/Kconfig | 8 +
arch/arm/src/kinetis/kinetis_ftm.h | 8 +-
arch/arm/src/kinetis/kinetis_k20pinmux.h | 81 ++++++++++
arch/arm/src/kinetis/kinetis_memorymap.h | 121 ++++++++++++++-
arch/arm/src/kinetis/kinetis_pinmux.h | 4 +-
arch/arm/src/kinetis/kinetis_vectors.S | 181 ++++++++++++++++++++++-
8 files changed, 538 insertions(+), 14 deletions(-)
create mode 100644 arch/arm/src/kinetis/kinetis_k20pinmux.h
diff --git a/arch/arm/include/kinetis/chip.h b/arch/arm/include/kinetis/chip.h
index bd9909050c..0e8f216d04 100644
--- a/arch/arm/include/kinetis/chip.h
+++ b/arch/arm/include/kinetis/chip.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/include/kinetis/chip.h
*
- * Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -48,8 +48,50 @@
/* Get customizations for each supported chip */
-#if defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
+#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+# define KINETIS_K20 1 /* Kinetics K20 family */
+# undef KINETIS_K40 /* Not Kinetics K40 family */
+# undef KINETIS_K60 /* Not Kinetis K60 family */
+# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
+# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
+# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
+# undef KINETIS_MPU /* No memory protection unit */
+# undef KINETIS_EXTBUS /* No external bus interface */
+# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
+# undef KINETIS_NENET /* No Ethernet controller */
+# define KINETIS_NUSBHOST 1 /* One USB host controller */
+# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
+# define KINETIS_NUSBDEV 1 /* One USB device controller */
+# undef KINETIS_NSDHC /* No SD host controller */
+# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
+# define KINETIS_NI2C 2 /* Two I2C modules */
+# undef KINETIS_NISO7816 /* No UART with ISO-786 */
+# define KINETIS_NUART 3 /* Three UARTs */
+# define KINETIS_NSPI 1 /* One SPI module */
+# define KINETIS_NCAN 1 /* Two CAN controller */
+# define KINETIS_NI2S 1 /* One I2S module */
+# undef KINETIS_NSLCD /* No segment LCD interface (up to 25x8/29x4) */
+# define KINETIS_NADC16 2 /* Two 16-bit ADC */
+# undef KINETIS_NADC12 /* No 12-channel ADC */
+# undef KINETIS_NADC13 /* No 13-channel ADC */
+# undef KINETIS_NADC15 /* No 15-channel ADC */
+# undef KINETIS_NADC18 /* No 18-channel ADC */
+# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
+# define KINETIS_NCMP 3 /* Three analog comparators */
+# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
+# define KINETIS_NDAC12 1 /* One 12-bit DAC */
+# define KINETIS_NVREF 1 /* Voltage reference */
+# define KINETIS_NTIMERS12 2 /* Two 12 channel timers */
+# undef KINETIS_NTIMERS20 /* No 20 channel timers */
+# undef KINETIS_NRNG /* No random number generator */
+# define KINETIS_NRTC 1 /* Real time clock */
+# undef KINETIS_NMMCAU /* No hardware encryption */
+# undef KINETIS_NTAMPER /* No tamper detect */
+# undef KINETIS_NCRC /* CRC */
+
+#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (64*1024) /* 64Kb */
@@ -99,6 +141,7 @@
defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
@@ -140,6 +183,7 @@
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -180,6 +224,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
@@ -220,6 +265,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -262,6 +308,7 @@
#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
@@ -302,6 +349,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -345,6 +393,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -388,6 +437,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
@@ -431,6 +481,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -474,6 +525,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -517,6 +569,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
@@ -560,6 +613,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -603,6 +657,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -646,6 +701,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
@@ -689,6 +745,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -732,6 +789,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
@@ -775,6 +833,7 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
+# undef KINETIS_K20 /* Not Kinetis K20 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
diff --git a/arch/arm/include/kinetis/irq.h b/arch/arm/include/kinetis/irq.h
index c69bce4511..bac9491890 100644
--- a/arch/arm/include/kinetis/irq.h
+++ b/arch/arm/include/kinetis/irq.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/include/kinetis/irq.h
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -77,13 +77,92 @@
#define KINETIS_IRQ_EXTINT (16)
+/* K20 Family ***********************************************************************
+ *
+ * The interrupt vectors for the following parts is defined in Freescale document
+ * K20P64M72SF1RM
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
+# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
+# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
+# define KINETIS_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
+# define KINETIS_IRQ_DMACH4 (20) /* Vector 20: DMA channel 4 transfer complete */
+# define KINETIS_IRQ_DMACH5 (21) /* Vector 21: DMA channel 5 transfer complete */
+# define KINETIS_IRQ_DMACH6 (22) /* Vector 22: DMA channel 6 transfer complete */
+# define KINETIS_IRQ_DMACH7 (23) /* Vector 23: DMA channel 7 transfer complete */
+# define KINETIS_IRQ_DMACH8 (24) /* Vector 24: DMA channel 8 transfer complete */
+# define KINETIS_IRQ_DMACH9 (25) /* Vector 25: DMA channel 9 transfer complete */
+# define KINETIS_IRQ_DMACH10 (26) /* Vector 26: DMA channel 10 transfer complete */
+# define KINETIS_IRQ_DMACH11 (27) /* Vector 27: DMA channel 11 transfer complete */
+# define KINETIS_IRQ_DMACH12 (28) /* Vector 28: DMA channel 12 transfer complete */
+# define KINETIS_IRQ_DMACH13 (29) /* Vector 29: DMA channel 13 transfer complete */
+# define KINETIS_IRQ_DMACH14 (30) /* Vector 30: DMA channel 14 transfer complete */
+# define KINETIS_IRQ_DMACH15 (31) /* Vector 31: DMA channel 15 transfer complete */
+# define KINETIS_IRQ_DMAERR (32) /* Vector 32: DMA error interrupt channels 0-15 */
+# define KINETIS_IRQ_FLASHCC (34) /* Vector 34: Flash memory command complete */
+# define KINETIS_IRQ_FLASHRC (35) /* Vector 35: Flash memory read collision */
+# define KINETIS_IRQ_SMCLVD (36) /* Vector 36: Mode Controller low-voltage
+ * detect, low-voltage warning */
+# define KINETIS_IRQ_LLWU (37) /* Vector 37: LLWU Normal Low Leakage Wakeup */
+# define KINETIS_IRQ_WDOG (38) /* Vector 38: Watchdog */
+# define KINETIS_IRQ_I2C0 (40) /* Vector 40: I2C0 */
+# define KINETIS_IRQ_I2C1 (41) /* Vector 41: I2C1 */
+# define KINETIS_IRQ_SPI0 (42) /* Vector 42: SPI0 all sources */
+# define KINETIS_IRQ_SPI1 (43) /* Vector 43: SPI1 all sources */
+# define KINETIS_IRQ_CAN0MB (45) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
+# define KINETIS_IRQ_CAN0BO (46) /* Vector 46: CAN0 Bus Off */
+# define KINETIS_IRQ_CAN0ERR (47) /* Vector 47: CAN0 Error */
+# define KINETIS_IRQ_CAN0TW (48) /* Vector 48: CAN0 Transmit Warning */
+# define KINETIS_IRQ_CAN0RW (49) /* Vector 49: CAN0 Receive Warning */
+# define KINETIS_IRQ_CAN0WU (50) /* Vector 50: CAN0 Wake UP */
+//TODO UART0_LON
+# define KINETIS_IRQ_UART0S (61) /* Vector 61: UART0 status */
+# define KINETIS_IRQ_UART0E (62) /* Vector 62: UART0 error */
+# define KINETIS_IRQ_UART1S (63) /* Vector 63: UART1 status */
+# define KINETIS_IRQ_UART1E (64) /* Vector 64: UART1 error */
+# define KINETIS_IRQ_UART2S (65) /* Vector 65: UART2 status */
+# define KINETIS_IRQ_UART2E (66) /* Vector 66: UART2 error */
+# define KINETIS_IRQ_ADC0 (73) /* Vector 73: ADC0 */
+# define KINETIS_IRQ_ADC1 (74) /* Vector 74: ADC1 */
+# define KINETIS_IRQ_CMP0 (75) /* Vector 75: CMP0 */
+# define KINETIS_IRQ_CMP1 (76) /* Vector 76: CMP1 */
+# define KINETIS_IRQ_CMP2 (77) /* Vector 77: CMP2 */
+# define KINETIS_IRQ_FTM0 (78) /* Vector 78: FTM0 all sources */
+# define KINETIS_IRQ_FTM1 (79) /* Vector 79: FTM1 all sources */
+# define KINETIS_IRQ_FTM2 (80) /* Vector 80: FTM2 all sources */
+# define KINETIS_IRQ_CMT (81) /* Vector 81: CMT */
+# define KINETIS_IRQ_RTC (82) /* Vector 82: RTC alarm interrupt */
+//TODO RTC_SECOND
+# define KINETIS_IRQ_PITCH0 (84) /* Vector 84: PIT channel 0 */
+# define KINETIS_IRQ_PITCH1 (85) /* Vector 85: PIT channel 1 */
+# define KINETIS_IRQ_PITCH2 (86) /* Vector 86: PIT channel 2 */
+# define KINETIS_IRQ_PITCH3 (87) /* Vector 87: PIT channel 3 */
+# define KINETIS_IRQ_PDB (88) /* Vector 88: PDB */
+# define KINETIS_IRQ_USBOTG (89) /* Vector 88: USB OTG */
+# define KINETIS_IRQ_USBCD (90) /* Vector 90: USB charger detect */
+# define KINETIS_IRQ_DAC0 (97) /* Vector 97: DAC0 */
+# define KINETIS_IRQ_TSI (99) /* Vector 97: TSI all sources */
+# define KINETIS_IRQ_MCG (100) /* Vector 100: MCG */
+# define KINETIS_IRQ_LPT (101) /* Vector 101: Low power timer */
+# define KINETIS_IRQ_PORTA (103) /* Vector 103: Pin detect port A */
+# define KINETIS_IRQ_PORTB (104) /* Vector 104: Pin detect port B */
+# define KINETIS_IRQ_PORTC (105) /* Vector 105: Pin detect port C */
+# define KINETIS_IRQ_PORTD (106) /* Vector 106: Pin detect port D */
+# define KINETIS_IRQ_PORTE (107) /* Vector 107: Pin detect port E */
+# define KINETIS_IRQ_SWI (110) /* Vector 110: Software interrupt */
+
+# define NR_VECTORS (111) /* 111 vectors */
+# define NR_IRQS (111) /* 94 interrupts but 111 IRQ numbers */
+
/* K40 Family ***********************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale document
* K40P144M100SF2RM
*/
-#if defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
@@ -324,7 +403,8 @@
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
#else
#define EXTERN extern
#endif
diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig
index 786ab20027..ff1fd735c6 100644
--- a/arch/arm/src/kinetis/Kconfig
+++ b/arch/arm/src/kinetis/Kconfig
@@ -10,6 +10,10 @@ choice
default ARCH_CHIP_MK60N512VMD100
depends on ARCH_CHIP_KINETIS
+config ARCH_CHIP_MK20DX256VLH7
+ bool "MK20DX256VLH7"
+ select ARCH_FAMILY_K20
+
config ARCH_CHIP_MK40N512VLQ100
bool "MK40N512VLQ100"
select ARCH_FAMILY_K40
@@ -62,6 +66,10 @@ endchoice
# Chip families
+config ARCH_FAMILY_K20
+ bool
+ default n
+
config ARCH_FAMILY_K40
bool
default n
diff --git a/arch/arm/src/kinetis/kinetis_ftm.h b/arch/arm/src/kinetis/kinetis_ftm.h
index 52f782855b..2f031b5dd9 100644
--- a/arch/arm/src/kinetis/kinetis_ftm.h
+++ b/arch/arm/src/kinetis/kinetis_ftm.h
@@ -54,8 +54,8 @@
#define KINETIS_FTM_CNT_OFFSET 0x0004 /* Counter */
#define KINETIS_FTM_MOD_OFFSET 0x0008 /* Modulo */
-#define KINETIS_FTM_CSC_OFFSET(n) (0x000c+((n)<<3) /* Channel (n) Status and Control */
-#define KINETIS_FTM_CV_OFFSET(n) (0x0010+((n)<<3) /* Channel (n) Value */
+#define KINETIS_FTM_CSC_OFFSET(n) (0x000c+((n)<<3)) /* Channel (n) Status and Control */
+#define KINETIS_FTM_CV_OFFSET(n) (0x0010+((n)<<3)) /* Channel (n) Value */
#define KINETIS_FTM_C0SC_OFFSET 0x000c /* Channel 0 Status and Control */
#define KINETIS_FTM_C0V_OFFSET 0x0010 /* Channel 0 Value */
#define KINETIS_FTM_C1SC_OFFSET 0x0014 /* Channel 1 Status and Control */
@@ -479,7 +479,7 @@
/* Bits 4-31: Reserved */
/* FTM Software Output Control */
-#define FTM_SWOCTRL_CH7OC(n) (1 << (n)) /* Bits 0-7: Channel (n) Software Output Control Enable */
+#define FTM_SWOCTRL_CHOC(n) (1 << (n)) /* Bits 0-7: Channel (n) Software Output Control Enable */
#define FTM_SWOCTRL_CH0OC (1 << 0) /* Bit 0: Channel 0 Software Output Control Enable */
#define FTM_SWOCTRL_CH1OC (1 << 1) /* Bit 1: Channel 1 Software Output Control Enable */
#define FTM_SWOCTRL_CH2OC (1 << 2) /* Bit 2: Channel 2 Software Output Control Enable */
@@ -500,7 +500,7 @@
/* Bits 16-31: Reserved */
/* FTM PWM Load */
-#define FTM_PWMLOAD_CH7SEL(n) (1 << (n)) /* Bits 0-7: Channel (n) Select */
+#define FTM_PWMLOAD_CHSEL(n) (1 << (n)) /* Bits 0-7: Channel (n) Select */
#define FTM_PWMLOAD_CH0SEL (1 << 0) /* Bit 0: Channel 0 Select */
#define FTM_PWMLOAD_CH1SEL (1 << 1) /* Bit 1: Channel 1 Select */
#define FTM_PWMLOAD_CH2SEL (1 << 2) /* Bit 2: Channel 2 Select */
diff --git a/arch/arm/src/kinetis/kinetis_k20pinmux.h b/arch/arm/src/kinetis/kinetis_k20pinmux.h
new file mode 100644
index 0000000000..131ef49ec0
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_k20pinmux.h
@@ -0,0 +1,81 @@
+/********************************************************************************************
+ * arch/arm/src/kinetis/kinetis_k40pinmux.h
+ *
+ * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ * Jakob Odersky
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H
+
+/********************************************************************************************
+ * Included Files
+ ********************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+
+/********************************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************************/
+/* Reference: Paragraph 10.3.1, p 207, of FreeScale document K20P64M72SF1RM
+ *
+ * In most cases, there are alternative configurations for various pins. Those alternative
+ * pins are labeled with a suffix like _1, _2, etc. in order to distinguish them. Logic in
+ * the board.h file must select the correct pin configuration for the board by defining a pin
+ * configuration (with no suffix) that maps to the correct alternative.
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+
+/* Pin configurations are deferred to board configuration */
+
+#else
+ /* The pin muxing for other K20 parts is defined in other documents */
+
+# error "No pin multiplexing for this Kinetis K20 part"
+#endif
+
+/********************************************************************************************
+ * Public Types
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Data
+ ********************************************************************************************/
+
+/********************************************************************************************
+ * Public Functions
+ ********************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H */
diff --git a/arch/arm/src/kinetis/kinetis_memorymap.h b/arch/arm/src/kinetis/kinetis_memorymap.h
index ef1d222656..f9f1e736d4 100644
--- a/arch/arm/src/kinetis/kinetis_memorymap.h
+++ b/arch/arm/src/kinetis/kinetis_memorymap.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/kinetis/kinetis_memorymap.h
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -48,6 +48,122 @@
* Pre-processor Definitions
************************************************************************************/
+/* Memory Map ***********************************************************************/
+/* K20 Family
+ *
+ * The memory map for the following parts is defined in Freescale document
+ * K20P64M72SF1RM
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+
+# define KINETIS_FLASH_BASE 0x00000000 /* –0x0fffffff Program flash and read-
+ * only data (Includes exception
+ * vectors in first 1024 bytes) */
+# if !defined(KINETIS_FLEXMEM_SIZE)
+# define KINETIS_FLEXNVM_BASE 0x10000000 /* –0x13ffffff FlexNVM */
+# define KINETIS_FLEXRAM_BASE 0x14000000 /* –0x17ffffff FlexRAM */
+# endif
+ /* 0x18000000 * –0x1bffffff Reserved */
+# define KINETIS_SRAML_BASE 0x1C000000 /* –0x1fffffff SRAM_L: Lower SRAM
+ * (ICODE/DCODE) */
+# define KINETIS_SRAMU_BASE 0x20000000 /* –0x200fffff SRAM_U: Upper SRAM bitband
+ * region */
+ /* 0x20100000 * –0x21ffffff Reserved */
+# define KINETIS_SALIAS_BASE 0x22000000 /* –0x23ffffff Aliased to SRAM_U bitband */
+ /* 0x24000000 * –0x3fffffff Reserved */
+# define KINETIS_BRIDGE0_BASE 0x40000000 /* –0x4007ffff Bitband region for peripheral
+ * bridge 0 (AIPS-Lite0) */
+# define KINETIS_BRIDGE1_BASE 0x40080000 /* –0x400fffff Bitband region for peripheral
+ * bridge 1 (AIPS-Lite1) */
+# define KINETIS_GPIOBB_BASE 0x400ff000 /* –0x400fffff Bitband region for general
+ * purpose input/output (GPIO) */
+ /* 0x40100000 * –0x41ffffff Reserved */
+# define KINETIS_PALIAS_BASE 0x42000000 /* –0x43ffffff Aliased to peripheral bridge
+ * (AIPS-Lite) and general purpose
+ * input/output (GPIO) bitband */
+ /* 0x44000000 * –0xdfffffff Reserved */
+# define KINETIS_PERIPH_BASE 0xe0000000 /* –0xe00fffff Private peripherals */
+ /* 0xe0100000 * –0xffffffff Reserved */
+
+/* Peripheral Bridge 0 Memory Map ***************************************************/
+
+# define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
+# define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */
+# define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */
+# define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */
+# define KINETIS_FMC_BASE 0x4001f000 /* Flash memory controller */
+# define KINETIS_FTFL_BASE 0x40020000 /* Flash memory */
+# define KINETIS_DMAMUX0_BASE 0x40021000 /* DMA channel mutiplexer 0 */
+# define KINETIS_CAN0_BASE 0x40024000 /* FlexCAN 0 */
+# define KINETIS_SPI0_BASE 0x4002c000 /* SPI 0 */
+# define KINETIS_SPI1_BASE 0x4002d000 /* SPI 1 */
+# define KINETIS_I2S0_BASE 0x4002f000 /* I2S 0 */
+# define KINETIS_CRC_BASE 0x40032000 /* CRC */
+# define KINETIS_USBDCD_BASE 0x40035000 /* USB DCD */
+# define KINETIS_PDB0_BASE 0x40036000 /* Programmable delay block */
+# define KINETIS_PIT_BASE 0x40037000 /* Periodic interrupt timers (PIT) */
+# define KINETIS_FTM0_BASE 0x40038000 /* FlexTimer 0 */
+# define KINETIS_FTM1_BASE 0x40039000 /* FlexTimer 1 */
+# define KINETIS_ADC0_BASE 0x4003b000 /* Analog-to-digital converter (ADC) 0 */
+# define KINETIS_RTC_BASE 0x4003d000 /* Real time clock */
+# define KINETIS_VBATR_BASE 0x4003e000 /* VBAT register file */
+# define KINETIS_LPTMR_BASE 0x40040000 /* Low power timer */
+# define KINETIS_SYSR_BASE 0x40041000 /* System register file */
+# define KINETIS_TSI0_BASE 0x40045000 /* Touch sense interface */
+# define KINETIS_SIMLP_BASE 0x40047000 /* SIM low-power logic */
+# define KINETIS_SIM_BASE 0x40048000 /* System integration module (SIM) */
+# define KINETIS_PORT_BASE(n) (0x40049000 + ((n) << 12))
+# define KINETIS_PORTA_BASE 0x40049000 /* Port A multiplexing control */
+# define KINETIS_PORTB_BASE 0x4004a000 /* Port B multiplexing control */
+# define KINETIS_PORTC_BASE 0x4004b000 /* Port C multiplexing control */
+# define KINETIS_PORTD_BASE 0x4004c000 /* Port D multiplexing control */
+# define KINETIS_PORTE_BASE 0x4004d000 /* Port E multiplexing control */
+# define KINETIS_WDOG_BASE 0x40052000 /* Software watchdog */
+# define KINETIS_EWM_BASE 0x40061000 /* External watchdog */
+# define KINETIS_CMT_BASE 0x40062000 /* Carrier modulator timer (CMT) */
+# define KINETIS_MCG_BASE 0x40064000 /* Multi-purpose Clock Generator (MCG) */
+# define KINETIS_OSC_BASE 0x40065000 /* System oscillator (OSC) */
+# define KINETIS_I2C0_BASE 0x40066000 /* I2C 0 */
+# define KINETIS_I2C1_BASE 0x40067000 /* I2C 1 */
+# define KINETIS_UART0_BASE 0x4006a000 /* UART0 */
+# define KINETIS_UART1_BASE 0x4006b000 /* UART1 */
+# define KINETIS_UART2_BASE 0x4006c000 /* UART2 */
+# define KINETIS_USB0_BASE 0x40072000 /* USB OTG FS/LS */
+# define KINETIS_CMP_BASE 0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
+# define KINETIS_VREF_BASE 0x40074000 /* Voltage reference (VREF) */
+# define KINETIS_LLWU_BASE 0x4007c000 /* Low-leakage wakeup unit (LLWU) */
+# define KINETIS_PMC_BASE 0x4007d000 /* Power management controller (PMC) */
+# define KINETIS_SMC_BASE 0x4007e000 /* System Mode controller (SMC) */
+
+/* Peripheral Bridge 1 Memory Map ***************************************************/
+
+# define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
+# define KINETIS_FTM2_BASE 0x400b8000 /* FlexTimer 2 */
+# define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
+# define KINETIS_DAC0_BASE 0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
+
+# define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
+ * purpose input/output module that shares the
+ * crossbar switch slave port with the AIPS-Lite
+ * is accessed at this address. */
+# define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
+# define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
+# define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
+# define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
+# define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
+# define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
+
+/* Private Peripheral Bus (PPB) Memory Map ******************************************/
+
+# define KINETIS_ITM_BASE 0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
+# define KINETIS_DWT_BASE 0xe0001000 /* Data Watchpoint and Trace (DWT) */
+# define KINETIS_FPB_BASE 0xe0002000 /* Flash Patch and Breakpoint (FPB) */
+# define KINETIS_SCS_BASE 0xe000e000 /* System Control Space (SCS) (for NVIC) */
+# define KINETIS_TPIU_BASE 0xe0040000 /* Trace Port Interface Unit (TPIU) */
+# define KINETIS_MCM_BASE 0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
+# define KINETIS_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
+
/* Memory Map ***********************************************************************/
/* K40 Family
*
@@ -55,7 +171,7 @@
* K40P144M100SF2RM
*/
-#if defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
@@ -185,6 +301,7 @@
# define KINETIS_MCM_BASE 0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
# define KINETIS_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
+/* Memory Map ***********************************************************************/
/* K60 Family
*
* The memory map for the following parts is defined in Freescale document
diff --git a/arch/arm/src/kinetis/kinetis_pinmux.h b/arch/arm/src/kinetis/kinetis_pinmux.h
index 9c791539f6..4359728b66 100644
--- a/arch/arm/src/kinetis/kinetis_pinmux.h
+++ b/arch/arm/src/kinetis/kinetis_pinmux.h
@@ -48,7 +48,9 @@
* by the logic in chip.h.
*/
-#if defined(KINETIS_K40)
+#if defined(KINETIS_K20)
+# include "kinetis_k20pinmux.h"
+#elif defined(KINETIS_K40)
# include "kinetis_k40pinmux.h"
#elif defined(KINETIS_K60)
# include "kinetis_k60pinmux.h"
diff --git a/arch/arm/src/kinetis/kinetis_vectors.S b/arch/arm/src/kinetis/kinetis_vectors.S
index ce51838c83..fd4986c897 100644
--- a/arch/arm/src/kinetis/kinetis_vectors.S
+++ b/arch/arm/src/kinetis/kinetis_vectors.S
@@ -154,13 +154,116 @@ _vectors:
.word kinetis_systick /* Vector 15: System tick */
/* External Interrupts **************************************************************************/
+/* K20 Family ***********************************************************************************
+ *
+ * The interrupt vectors for the following parts is defined in Freescale document
+ * K20P64M72SF1RM
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+ .word kinetis_dmach0 /* Vector 16: DMA channel 0 transfer complete */
+ .word kinetis_dmach1 /* Vector 17: DMA channel 1 transfer complete */
+ .word kinetis_dmach2 /* Vector 18: DMA channel 2 transfer complete */
+ .word kinetis_dmach3 /* Vector 19: DMA channel 3 transfer complete */
+ .word kinetis_dmach4 /* Vector 20: DMA channel 4 transfer complete */
+ .word kinetis_dmach5 /* Vector 21: DMA channel 5 transfer complete */
+ .word kinetis_dmach6 /* Vector 22: DMA channel 6 transfer complete */
+ .word kinetis_dmach7 /* Vector 23: DMA channel 7 transfer complete */
+ .word kinetis_dmach8 /* Vector 24: DMA channel 8 transfer complete */
+ .word kinetis_dmach9 /* Vector 25: DMA channel 9 transfer complete */
+ .word kinetis_dmach10 /* Vector 26: DMA channel 10 transfer complete */
+ .word kinetis_dmach11 /* Vector 27: DMA channel 11 transfer complete */
+ .word kinetis_dmach12 /* Vector 28: DMA channel 12 transfer complete */
+ .word kinetis_dmach13 /* Vector 29: DMA channel 13 transfer complete */
+ .word kinetis_dmach14 /* Vector 30: DMA channel 14 transfer complete */
+ .word kinetis_dmach15 /* Vector 31: DMA channel 15 transfer complete */
+ .word kinetis_dmaerr /* Vector 32: DMA error interrupt channels 0-15 */
+ .word kinetis_reserved /* Vector 33: Reserved */
+ .word kinetis_flashcc /* Vector 34: Flash memory command complete */
+ .word kinetis_flashrc /* Vector 35: Flash memory read collision */
+ .word kinetis_smclvd /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+ .word kinetis_llwu /* Vector 37: LLWU Normal Low Leakage Wakeup */
+ .word kinetis_wdog /* Vector 38: Watchdog */
+ .word kinetis_reserved /* Vector 39: Reserved */
+ .word kinetis_i2c0 /* Vector 40: I2C0 */
+ .word kinetis_i2c1 /* Vector 41: I2C1 */
+ .word kinetis_spi0 /* Vector 42: SPI0 all sources */
+ .word kinetis_spi1 /* Vector 43: SPI1 all sources */
+ .word kinetis_reserved /* Vector 44: Reserved */
+ .word kinetis_can0mb /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
+ .word kinetis_can0bo /* Vector 46: CAN0 Bus Off */
+ .word kinetis_can0err /* Vector 47: CAN0 Error */
+ .word kinetis_can0tw /* Vector 48: CAN0 Transmit Warning */
+ .word kinetis_can0rw /* Vector 49: CAN0 Receive Warning */
+ .word kinetis_can0wu /* Vector 50: CAN0 Wake UP */
+ .word kinetis_reserved /* Vector 51: Reserved */
+ .word kinetis_reserved /* Vector 52: Reserved */
+ .word kinetis_reserved /* Vector 53: Reserved */
+ .word kinetis_reserved /* Vector 54: Reserved */
+ .word kinetis_reserved /* Vector 55: Reserved */
+ .word kinetis_reserved /* Vector 56: Reserved */
+ .word kinetis_reserved /* Vector 57: Reserved */
+ .word kinetis_reserved /* Vector 58: Reserved */
+ .word kinetis_reserved /* Vector 59: Reserved */
+ .word kinetis_reserved /* Vector 60: Reserved */
+ .word kinetis_uart0s /* Vector 61: UART0 status */
+ .word kinetis_uart0e /* Vector 62: UART0 error */
+ .word kinetis_uart1s /* Vector 63: UART1 status */
+ .word kinetis_uart1e /* Vector 64: UART1 error */
+ .word kinetis_uart2s /* Vector 65: UART2 status */
+ .word kinetis_uart2e /* Vector 66: UART2 error */
+ .word kinetis_reserved /* Vector 67: Reserved */
+ .word kinetis_reserved /* Vector 68: Reserved */
+ .word kinetis_reserved /* Vector 69: Reserved */
+ .word kinetis_reserved /* Vector 70: Reserved */
+ .word kinetis_reserved /* Vector 71: Reserved */
+ .word kinetis_reserved /* Vector 72: Reserved */
+ .word kinetis_adc0 /* Vector 73: ADC0 */
+ .word kinetis_adc1 /* Vector 74: ADC1 */
+ .word kinetis_cmp0 /* Vector 75: CMP0 */
+ .word kinetis_cmp1 /* Vector 76: CMP1 */
+ .word kinetis_cmp2 /* Vector 77: CMP2 */
+ .word kinetis_ftm0 /* Vector 78: FTM0 all sources */
+ .word kinetis_ftm1 /* Vector 79: FTM1 all sources */
+ .word kinetis_ftm2 /* Vector 80: FTM2 all sources */
+ .word kinetis_cmt /* Vector 81: CMT */
+ .word kinetis_rtc /* Vector 82: RTC alarm interrupt */
+ .word kinetis_reserved /* Vector 83: Reserved */
+ .word kinetis_pitch0 /* Vector 84: PIT channel 0 */
+ .word kinetis_pitch1 /* Vector 85: PIT channel 1 */
+ .word kinetis_pitch2 /* Vector 86: PIT channel 2 */
+ .word kinetis_pitch3 /* Vector 87: PIT channel 3 */
+ .word kinetis_pdb /* Vector 88: PDB */
+ .word kinetis_usbotg /* Vector 88: USB OTG */
+ .word kinetis_usbcd /* Vector 90: USB charger detect */
+ .word kinetis_reserved /* Vector 91: Reserved */
+ .word kinetis_reserved /* Vector 92: Reserved */
+ .word kinetis_reserved /* Vector 93: Reserved */
+ .word kinetis_reserved /* Vector 94: Reserved */
+ .word kinetis_reserved /* Vector 95: Reserved */
+ .word kinetis_reserved /* Vector 96: Reserved */
+ .word kinetis_dac0 /* Vector 97: DAC0 */
+ .word kinetis_reserved /* Vector 98: Reserved */
+ .word kinetis_tsi /* Vector 99: TSI all sources */
+ .word kinetis_mcg /* Vector 100: MCG */
+ .word kinetis_lpt /* Vector 101: Low power timer */
+ .word kinetis_reserved /* Vector 102: Reserved */
+ .word kinetis_porta /* Vector 103: Pin detect port A */
+ .word kinetis_portb /* Vector 104: Pin detect port B */
+ .word kinetis_portc /* Vector 105: Pin detect port C */
+ .word kinetis_portd /* Vector 106: Pin detect port D */
+ .word kinetis_porte /* Vector 107: Pin detect port E */
+ .word kinetis_reserved /* Vector 108: Reserved */
+ .word kinetis_reserved /* Vector 109: Reserved */
+ .word kinetis_swi /* Vector 110: Software interrupt */
+
/* K40 Family ***********************************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale document
* K40P144M100SF2RM
*/
-#if defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
@@ -401,13 +504,87 @@ handlers:
HANDLER kinetis_systick, KINETIS_IRQ_SYSTICK /* Vector 15: System tick */
/* External Interrupts **************************************************************************/
+/* K40 Family ***********************************************************************************
+ *
+ * The interrupt vectors for the following parts is defined in Freescale document
+ * K20P64M72SF1RM
+ */
+
+#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
+
+ HANDLER kinetis_dmach0, KINETIS_IRQ_DMACH0 /* Vector 16: DMA channel 0 transfer complete */
+ HANDLER kinetis_dmach1, KINETIS_IRQ_DMACH1 /* Vector 17: DMA channel 1 transfer complete */
+ HANDLER kinetis_dmach2, KINETIS_IRQ_DMACH2 /* Vector 18: DMA channel 2 transfer complete */
+ HANDLER kinetis_dmach3, KINETIS_IRQ_DMACH3 /* Vector 19: DMA channel 3 transfer complete */
+ HANDLER kinetis_dmach4, KINETIS_IRQ_DMACH4 /* Vector 20: DMA channel 4 transfer complete */
+ HANDLER kinetis_dmach5, KINETIS_IRQ_DMACH5 /* Vector 21: DMA channel 5 transfer complete */
+ HANDLER kinetis_dmach6, KINETIS_IRQ_DMACH6 /* Vector 22: DMA channel 6 transfer complete */
+ HANDLER kinetis_dmach7, KINETIS_IRQ_DMACH7 /* Vector 23: DMA channel 7 transfer complete */
+ HANDLER kinetis_dmach8, KINETIS_IRQ_DMACH8 /* Vector 24: DMA channel 8 transfer complete */
+ HANDLER kinetis_dmach9, KINETIS_IRQ_DMACH9 /* Vector 25: DMA channel 9 transfer complete */
+ HANDLER kinetis_dmach10, KINETIS_IRQ_DMACH10 /* Vector 26: DMA channel 10 transfer complete */
+ HANDLER kinetis_dmach11, KINETIS_IRQ_DMACH11 /* Vector 27: DMA channel 11 transfer complete */
+ HANDLER kinetis_dmach12, KINETIS_IRQ_DMACH12 /* Vector 28: DMA channel 12 transfer complete */
+ HANDLER kinetis_dmach13, KINETIS_IRQ_DMACH13 /* Vector 29: DMA channel 13 transfer complete */
+ HANDLER kinetis_dmach14, KINETIS_IRQ_DMACH14 /* Vector 30: DMA channel 14 transfer complete */
+ HANDLER kinetis_dmach15, KINETIS_IRQ_DMACH15 /* Vector 31: DMA channel 15 transfer complete */
+ HANDLER kinetis_dmaerr, KINETIS_IRQ_DMAERR /* Vector 32: DMA error interrupt channels 0-15 */
+ HANDLER kinetis_flashcc, KINETIS_IRQ_FLASHCC /* Vector 34: Flash memory command complete */
+ HANDLER kinetis_flashrc, KINETIS_IRQ_FLASHRC /* Vector 35: Flash memory read collision */
+ HANDLER kinetis_smclvd, KINETIS_IRQ_SMCLVD /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
+ HANDLER kinetis_llwu, KINETIS_IRQ_LLWU /* Vector 37: LLWU Normal Low Leakage Wakeup */
+ HANDLER kinetis_wdog, KINETIS_IRQ_WDOG /* Vector 38: Watchdog */
+ HANDLER kinetis_i2c0, KINETIS_IRQ_I2C0 /* Vector 40: I2C0 */
+ HANDLER kinetis_i2c1, KINETIS_IRQ_I2C1 /* Vector 41: I2C1 */
+ HANDLER kinetis_spi0, KINETIS_IRQ_SPI0 /* Vector 42: SPI0 all sources */
+ HANDLER kinetis_spi1, KINETIS_IRQ_SPI1 /* Vector 43: SPI1 all sources */
+ HANDLER kinetis_can0mb, KINETIS_IRQ_CAN0MB /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
+ HANDLER kinetis_can0bo, KINETIS_IRQ_CAN0BO /* Vector 46: CAN0 Bus Off */
+ HANDLER kinetis_can0err, KINETIS_IRQ_CAN0ERR /* Vector 47: CAN0 Error */
+ HANDLER kinetis_can0tw, KINETIS_IRQ_CAN0TW /* Vector 48: CAN0 Transmit Warning */
+ HANDLER kinetis_can0rw, KINETIS_IRQ_CAN0RW /* Vector 49: CAN0 Receive Warning */
+ HANDLER kinetis_can0wu, KINETIS_IRQ_CAN0WU /* Vector 50: CAN0 Wake UP */
+ HANDLER kinetis_uart0s, KINETIS_IRQ_UART0S /* Vector 61: UART0 status */
+ HANDLER kinetis_uart0e, KINETIS_IRQ_UART0E /* Vector 62: UART0 error */
+ HANDLER kinetis_uart1s, KINETIS_IRQ_UART1S /* Vector 63: UART1 status */
+ HANDLER kinetis_uart1e, KINETIS_IRQ_UART1E /* Vector 64: UART1 error */
+ HANDLER kinetis_uart2s, KINETIS_IRQ_UART2S /* Vector 65: UART2 status */
+ HANDLER kinetis_uart2e, KINETIS_IRQ_UART2E /* Vector 66: UART2 error */
+ HANDLER kinetis_adc0, KINETIS_IRQ_ADC0 /* Vector 73: ADC0 */
+ HANDLER kinetis_adc1, KINETIS_IRQ_ADC1 /* Vector 74: ADC1 */
+ HANDLER kinetis_cmp0, KINETIS_IRQ_CMP0 /* Vector 75: CMP0 */
+ HANDLER kinetis_cmp1, KINETIS_IRQ_CMP1 /* Vector 76: CMP1 */
+ HANDLER kinetis_cmp2, KINETIS_IRQ_CMP2 /* Vector 77: CMP2 */
+ HANDLER kinetis_ftm0, KINETIS_IRQ_FTM0 /* Vector 78: FTM0 all sources */
+ HANDLER kinetis_ftm1, KINETIS_IRQ_FTM1 /* Vector 79: FTM1 all sources */
+ HANDLER kinetis_ftm2, KINETIS_IRQ_FTM2 /* Vector 80: FTM2 all sources */
+ HANDLER kinetis_cmt, KINETIS_IRQ_CMT /* Vector 81: CMT */
+ HANDLER kinetis_rtc, KINETIS_IRQ_RTC /* Vector 82: RTC alarm interrupt */
+ HANDLER kinetis_pitch0, KINETIS_IRQ_PITCH0 /* Vector 84: PIT channel 0 */
+ HANDLER kinetis_pitch1, KINETIS_IRQ_PITCH1 /* Vector 85: PIT channel 1 */
+ HANDLER kinetis_pitch2, KINETIS_IRQ_PITCH2 /* Vector 86: PIT channel 2 */
+ HANDLER kinetis_pitch3, KINETIS_IRQ_PITCH3 /* Vector 87: PIT channel 3 */
+ HANDLER kinetis_pdb, KINETIS_IRQ_PDB /* Vector 88: PDB */
+ HANDLER kinetis_usbotg, KINETIS_IRQ_USBOTG /* Vector 88: USB OTG */
+ HANDLER kinetis_usbcd, KINETIS_IRQ_USBCD /* Vector 90: USB charger detect */
+ HANDLER kinetis_dac0, KINETIS_IRQ_DAC0 /* Vector 97: DAC0 */
+ HANDLER kinetis_tsi, KINETIS_IRQ_TSI /* Vector 97: TSI all sources */
+ HANDLER kinetis_mcg, KINETIS_IRQ_MCG /* Vector 100: MCG */
+ HANDLER kinetis_lpt, KINETIS_IRQ_LPT /* Vector 101: Low power timer */
+ HANDLER kinetis_porta, KINETIS_IRQ_PORTA /* Vector 103: Pin detect port A */
+ HANDLER kinetis_portb, KINETIS_IRQ_PORTB /* Vector 104: Pin detect port B */
+ HANDLER kinetis_portc, KINETIS_IRQ_PORTC /* Vector 105: Pin detect port C */
+ HANDLER kinetis_portd, KINETIS_IRQ_PORTD /* Vector 106: Pin detect port D */
+ HANDLER kinetis_porte, KINETIS_IRQ_PORTE /* Vector 107: Pin detect port E */
+ HANDLER kinetis_swi, KINETIS_IRQ_SWI /* Vector 110: Software interrupt */
+
/* K40 Family ***********************************************************************************
*
* The interrupt vectors for the following parts is defined in Freescale document
* K40P144M100SF2RM
*/
-#if defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
+#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)