nrf52832: add errata mitigation code for various RADIO issues
This commit is contained in:
Matias N
Brennan Ashton
parent
cfa5b82e09
commit
99f56b89df
@ -1,35 +1,20 @@
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/*****************************************************************************
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/****************************************************************************
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* arch/arm/src/nrf52/hardware/nrf52_ficr.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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@ -98,7 +83,7 @@
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#define NRF52_FICR_NFC_TAGHEADER2_OFFSET 0x458 /* Default header for NFC Tag */
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#define NRF52_FICR_NFC_TAGHEADER3_OFFSET 0x45c /* Default header for NFC Tag */
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/* FICR Register Addresses **************************************************************************/
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/* FICR Register Addresses **************************************************/
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#define NRF52_FICR_CODEPAGESIZE (NRF52_FICR_BASE + NRF52_FICR_CODEPAGESIZE_OFFSET)
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#define NRF52_FICR_CODESIZE (NRF52_FICR_BASE + NRF52_FICR_CODESIZE_OFFSET)
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@ -147,8 +132,19 @@
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#define NRF52_FICR_NFC_TAGHEADER2 (NRF52_FICR_BASE + NRF52_FICR_NFC_TAGHEADER2_OFFSET)
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#define NRF52_FICR_NFC_TAGHEADER3 (NRF52_FICR_BASE + NRF52_FICR_NFC_TAGHEADER3_OFFSET)
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/* FICR Register Bitfield Definitions **************************************************************/
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/* FICR Register Bitfield Definitions ***************************************/
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/* TODO: */
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/* These values are ASCII encoded definitions of each four letter
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* combination. The datasheet does not list all values, so we added a few
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* more.
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*/
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#define NRF52_FICR_INFO_VARIANT_AAAA (0x41414141)
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#define NRF52_FICR_INFO_VARIANT_AAAB (0x41414142)
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#define NRF52_FICR_INFO_VARIANT_AABA (0x41414241)
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#define NRF52_FICR_INFO_VARIANT_AABB (0x41414242)
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#define NRF52_FICR_INFO_VARIANT_AAB0 (0x41414230)
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#define NRF52_FICR_INFO_VARIANT_ABB0 (0x41424230)
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#define NRF52_FICR_INFO_VARIANT_AAE0 (0x41414530)
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#endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_FICR_H */
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98
arch/arm/src/nrf52/hardware/nrf52_temp.h
Normal file
98
arch/arm/src/nrf52/hardware/nrf52_temp.h
Normal file
@ -0,0 +1,98 @@
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/****************************************************************************
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* arch/arm/src/nrf52/hardware/nrf52_temp.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H
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#define __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Register offsets *********************************************************/
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#define NRF52_TEMP_TASKS_START_OFFSET 0x000000 /* Start temperature measurement */
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#define NRF52_TEMP_TASKS_STOP_OFFSET 0x000004 /* Stop temperature measurement */
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#define NRF52_TEMP_EVENTS_DATARDY_OFFSET 0x000100 /* Temperature measurement complete, data ready */
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#define NRF52_TEMP_INTENSET_OFFSET 0x000304 /* Enable interrupt */
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#define NRF52_TEMP_INTENCLR_OFFSET 0x000308 /* Disable interrupt */
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#define NRF52_TEMP_TEMP_OFFSET 0x000508 /* Temperature in degC */
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#define NRF52_TEMP_A0_OFFSET 0x000520 /* Slope of 1st piece wise linear function */
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#define NRF52_TEMP_A1_OFFSET 0x000524 /* Slope of 2nd piece wise linear function */
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#define NRF52_TEMP_A2_OFFSET 0x000528 /* Slope of 3rd piece wise linear function */
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#define NRF52_TEMP_A3_OFFSET 0x00052C /* Slope of 4th piece wise linear function */
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#define NRF52_TEMP_A4_OFFSET 0x000530 /* Slope of 5th piece wise linear function */
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#define NRF52_TEMP_A5_OFFSET 0x000534 /* Slope of 6th piece wise linear function */
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#define NRF52_TEMP_B0_OFFSET 0x000540 /* y-intercept of 1st piece wise linear function */
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#define NRF52_TEMP_B1_OFFSET 0x000544 /* y-intercept of 2nd piece wise linear function */
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#define NRF52_TEMP_B2_OFFSET 0x000548 /* y-intercept of 3rd piece wise linear function */
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#define NRF52_TEMP_B3_OFFSET 0x00054C /* y-intercept of 4th piece wise linear function */
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#define NRF52_TEMP_B4_OFFSET 0x000550 /* y-intercept of 5th piece wise linear function */
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#define NRF52_TEMP_B5_OFFSET 0x000554 /* y-intercept of 6th piece wise linear function */
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#define NRF52_TEMP_T0_OFFSET 0x000560 /* End point of 1st piece wise linear function */
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#define NRF52_TEMP_T1_OFFSET 0x000564 /* End point of 2nd piece wise linear function */
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#define NRF52_TEMP_T2_OFFSET 0x000568 /* End point of 3rd piece wise linear function */
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#define NRF52_TEMP_T3_OFFSET 0x00056C /* End point of 4th piece wise linear function */
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#define NRF52_TEMP_T4_OFFSET 0x000570 /* End point of 5th piece wise linear function */
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/* Register definitions *****************************************************/
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#define NRF52_TEMP_TASKS_START (NRF52_TEMP_BASE + NRF52_TEMP_TASKS_START_OFFSET)
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#define NRF52_TEMP_TASKS_STOP (NRF52_TEMP_BASE + NRF52_TEMP_TASKS_STOP_OFFSET)
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#define NRF52_TEMP_EVENTS_DATARDY (NRF52_TEMP_BASE + NRF52_TEMP_EVENTS_DATARDY_OFFSET)
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#define NRF52_TEMP_INTENSET (NRF52_TEMP_BASE + NRF52_TEMP_INTENSET_OFFSET)
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#define NRF52_TEMP_INTENCLR (NRF52_TEMP_BASE + NRF52_TEMP_INTENCLR_OFFSET)
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#define NRF52_TEMP_TEMP (NRF52_TEMP_BASE + NRF52_TEMP_TEMP_OFFSET)
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#define NRF52_TEMP_A0 (NRF52_TEMP_BASE + NRF52_TEMP_A0_OFFSET)
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#define NRF52_TEMP_A1 (NRF52_TEMP_BASE + NRF52_TEMP_A1_OFFSET)
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#define NRF52_TEMP_A2 (NRF52_TEMP_BASE + NRF52_TEMP_A2_OFFSET)
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#define NRF52_TEMP_A3 (NRF52_TEMP_BASE + NRF52_TEMP_A3_OFFSET)
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#define NRF52_TEMP_A4 (NRF52_TEMP_BASE + NRF52_TEMP_A4_OFFSET)
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#define NRF52_TEMP_A5 (NRF52_TEMP_BASE + NRF52_TEMP_A5_OFFSET)
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#define NRF52_TEMP_B0 (NRF52_TEMP_BASE + NRF52_TEMP_B0_OFFSET)
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#define NRF52_TEMP_B1 (NRF52_TEMP_BASE + NRF52_TEMP_B1_OFFSET)
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#define NRF52_TEMP_B2 (NRF52_TEMP_BASE + NRF52_TEMP_B2_OFFSET)
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#define NRF52_TEMP_B3 (NRF52_TEMP_BASE + NRF52_TEMP_B3_OFFSET)
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#define NRF52_TEMP_B4 (NRF52_TEMP_BASE + NRF52_TEMP_B4_OFFSET)
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#define NRF52_TEMP_B5 (NRF52_TEMP_BASE + NRF52_TEMP_B5_OFFSET)
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#define NRF52_TEMP_T0 (NRF52_TEMP_BASE + NRF52_TEMP_T0_OFFSET)
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#define NRF52_TEMP_T1 (NRF52_TEMP_BASE + NRF52_TEMP_T1_OFFSET)
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#define NRF52_TEMP_T2 (NRF52_TEMP_BASE + NRF52_TEMP_T2_OFFSET)
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#define NRF52_TEMP_T3 (NRF52_TEMP_BASE + NRF52_TEMP_T3_OFFSET)
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#define NRF52_TEMP_T4 (NRF52_TEMP_BASE + NRF52_TEMP_T4_OFFSET)
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/* Register bit definitions *************************************************/
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#define NRF52_TEMP_INTENSET_DATARDY (1 << 0) /* Read: Enabled */
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#define NRF52_TEMP_INTENCLR_DATARDY (1 << 0) /* Read: Enabled */
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#endif // __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H
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@ -54,6 +54,8 @@
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#include "chip.h"
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#include "hardware/nrf52_utils.h"
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#include "hardware/nrf52_rng.h"
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#include "hardware/nrf52_ficr.h"
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#include "hardware/nrf52_temp.h"
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#include "arm_internal.h"
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/****************************************************************************
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@ -100,6 +102,20 @@ static void nrf52832_errdata_16(void)
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}
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}
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static void nrf52832_errdata_102(void)
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{
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uint32_t regval = getreg32(NRF52_FICR_INFO_VARIANT);
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/* Also addresses erratas 106, 146. Revision 1 chips are affected */
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if (regval == NRF52_FICR_INFO_VARIANT_AAB0 ||
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regval == NRF52_FICR_INFO_VARIANT_ABB0)
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{
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*(volatile uint32_t *) 0x40001774 =
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((*(volatile uint32_t *) 0x40001774) & 0xfffffffe) | 0x01000000;
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}
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}
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static void nrf52832_errdata_66_temp(void)
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{
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/* Workaround for Errata 66 "TEMP: Linearity specification not met with
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@ -109,38 +125,30 @@ static void nrf52832_errdata_66_temp(void)
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if (errata_66())
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{
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uint32_t temp_offset = 0x520;
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uint32_t temp_ficr_offset = 0x404;
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int i;
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/* slot A : 6 totals */
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for (i = 0; i < 6; i++)
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{
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putreg32(getreg32(NRF52_FICR_BASE + temp_ficr_offset + i * 4),
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NRF52_TEMP_BASE + temp_offset + i * 4);
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putreg32(getreg32(NRF52_FICR_TEMP_A0 + i * 4),
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NRF52_TEMP_A0 + i * 4);
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}
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/* Slot B : 6 totals */
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temp_offset = 0x540;
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temp_ficr_offset = 0x41c;
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for (i = 0 ; i < 6; i++)
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{
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putreg32(getreg32(NRF52_FICR_BASE + temp_ficr_offset + i * 4),
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NRF52_TEMP_BASE + temp_offset + i * 4);
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putreg32(getreg32(NRF52_FICR_TEMP_B0 + i * 4),
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NRF52_TEMP_B0 + i * 4);
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}
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/* slot C : 5 totals */
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temp_offset = 0x560;
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temp_ficr_offset = 0x434;
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for (i = 0; i < 5; i++)
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{
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putreg32(getreg32(NRF52_FICR_BASE + temp_ficr_offset + i * 4),
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NRF52_TEMP_BASE + temp_offset + i * 4);
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putreg32(getreg32(NRF52_FICR_TEMP_T0 + i * 4),
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NRF52_TEMP_T0 + i * 4);
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}
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}
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}
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@ -154,4 +162,6 @@ void nrf52832_errdata_init(void)
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nrf52832_errdata_16();
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nrf52832_errdata_66_temp();
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nrf52832_errdata_102();
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}
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