arm-m: support zero interrupt back to game
Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
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946b01d4a8
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9a317472fd
@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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arm_ack_irq(irq);
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/* Set current regs for crash dump */
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up_set_current_regs(regs);
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if (irq == NVIC_IRQ_PENDSV)
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{
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#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
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/* Dispatch the PendSV interrupt */
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irq_dispatch(irq, regs);
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#endif
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up_irq_save();
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g_running_tasks[this_cpu()]->xcp.regs = regs;
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}
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else
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{
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/* Set current regs for crash dump */
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up_set_current_regs(regs);
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/* Dispatch irq */
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tcb->xcp.regs = regs;
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irq_dispatch(irq, regs);
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/* Clear current regs */
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up_set_current_regs(NULL);
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}
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/* If a context switch occurred while processing the interrupt then
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@ -110,6 +112,11 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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regs = tcb->xcp.regs;
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#endif
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/* Clear current regs */
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up_set_current_regs(NULL);
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board_autoled_off(LED_INIRQ);
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return regs;
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}
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@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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arm_ack_irq(irq);
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/* Set current regs for crash dump */
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up_set_current_regs(regs);
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if (irq == NVIC_IRQ_PENDSV)
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{
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#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
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/* Dispatch the PendSV interrupt */
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irq_dispatch(irq, regs);
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#endif
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up_irq_save();
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g_running_tasks[this_cpu()]->xcp.regs = regs;
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}
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else
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{
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/* Set current regs for crash dump */
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up_set_current_regs(regs);
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/* Dispatch irq */
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tcb->xcp.regs = regs;
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irq_dispatch(irq, regs);
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/* Clear current regs */
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up_set_current_regs(NULL);
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}
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/* If a context switch occurred while processing the interrupt then
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@ -110,6 +112,11 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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regs = tcb->xcp.regs;
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#endif
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/* Clear current regs */
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up_set_current_regs(NULL);
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board_autoled_off(LED_INIRQ);
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return regs;
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}
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@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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arm_ack_irq(irq);
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/* Set current regs for crash dump */
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up_set_current_regs(regs);
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if (irq == NVIC_IRQ_PENDSV)
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{
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#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
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/* Dispatch the PendSV interrupt */
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irq_dispatch(irq, regs);
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#endif
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up_irq_save();
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g_running_tasks[this_cpu()]->xcp.regs = regs;
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}
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else
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{
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/* Set current regs for crash dump */
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up_set_current_regs(regs);
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/* Dispatch irq */
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tcb->xcp.regs = regs;
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irq_dispatch(irq, regs);
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/* Clear current regs */
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up_set_current_regs(NULL);
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}
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/* If a context switch occurred while processing the interrupt then
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@ -110,6 +112,10 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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regs = tcb->xcp.regs;
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#endif
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/* Clear current regs */
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up_set_current_regs(NULL);
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board_autoled_off(LED_INIRQ);
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#ifdef CONFIG_ARMV8M_TRUSTZONE_HYBRID
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@ -137,9 +137,11 @@ static int lpc17_40_nmi(int irq, void *context, void *arg)
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static int lpc17_40_pendsv(int irq, void *context, void *arg)
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{
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#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
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up_irq_save();
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_err("PANIC!!! PendSV received\n");
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PANIC();
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#endif
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return 0;
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}
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@ -61,9 +61,11 @@ static int mps_nmi(int irq, void *context, void *arg)
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static int mps_pendsv(int irq, void *context, void *arg)
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{
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#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
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up_irq_save();
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_err("PANIC!!! PendSV received\n");
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PANIC();
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#endif
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return 0;
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}
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@ -143,9 +143,11 @@ static int nrf52_nmi(int irq, void *context, void *arg)
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static int nrf52_pendsv(int irq, void *context, void *arg)
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{
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#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
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up_irq_save();
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_err("PANIC!!! PendSV received\n");
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PANIC();
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#endif
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return 0;
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}
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@ -148,9 +148,11 @@ static int stm32_nmi(int irq, void *context, void *arg)
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static int stm32_pendsv(int irq, void *context, void *arg)
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{
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#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
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up_irq_save();
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_err("PANIC!!! PendSV received\n");
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PANIC();
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#endif
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return 0;
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}
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@ -145,9 +145,11 @@ static int stm32l4_nmi(int irq, void *context, void *arg)
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static int stm32l4_pendsv(int irq, void *context, void *arg)
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{
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#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
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up_irq_save();
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_err("PANIC!!! PendSV received\n");
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PANIC();
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#endif
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return 0;
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}
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