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arm-m: support zero interrupt back to game

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Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
ligd 2024-09-27 18:48:47 +08:00 committed by Xiang Xiao
parent 946b01d4a8
commit 9a317472fd
8 changed files with 54 additions and 24 deletions
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23
arch/arm/src/armv6-m/arm_doirq.c
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@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
arm_ack_irq(irq); arm_ack_irq(irq);
/* Set current regs for crash dump */
up_set_current_regs(regs);
if (irq == NVIC_IRQ_PENDSV) if (irq == NVIC_IRQ_PENDSV)
{ {
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* Dispatch the PendSV interrupt */
irq_dispatch(irq, regs);
#endif
up_irq_save(); up_irq_save();
g_running_tasks[this_cpu()]->xcp.regs = regs; g_running_tasks[this_cpu()]->xcp.regs = regs;
} }
else else
{ {
/* Set current regs for crash dump */
up_set_current_regs(regs);
/* Dispatch irq */ /* Dispatch irq */
tcb->xcp.regs = regs; tcb->xcp.regs = regs;
irq_dispatch(irq, regs); irq_dispatch(irq, regs);
/* Clear current regs */
up_set_current_regs(NULL);
} }
/* If a context switch occurred while processing the interrupt then /* If a context switch occurred while processing the interrupt then
@ -110,6 +112,11 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
regs = tcb->xcp.regs; regs = tcb->xcp.regs;
#endif #endif
/* Clear current regs */
up_set_current_regs(NULL);
board_autoled_off(LED_INIRQ); board_autoled_off(LED_INIRQ);
return regs; return regs;
} }

23
arch/arm/src/armv7-m/arm_doirq.c
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@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
arm_ack_irq(irq); arm_ack_irq(irq);
/* Set current regs for crash dump */
up_set_current_regs(regs);
if (irq == NVIC_IRQ_PENDSV) if (irq == NVIC_IRQ_PENDSV)
{ {
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* Dispatch the PendSV interrupt */
irq_dispatch(irq, regs);
#endif
up_irq_save(); up_irq_save();
g_running_tasks[this_cpu()]->xcp.regs = regs; g_running_tasks[this_cpu()]->xcp.regs = regs;
} }
else else
{ {
/* Set current regs for crash dump */
up_set_current_regs(regs);
/* Dispatch irq */ /* Dispatch irq */
tcb->xcp.regs = regs; tcb->xcp.regs = regs;
irq_dispatch(irq, regs); irq_dispatch(irq, regs);
/* Clear current regs */
up_set_current_regs(NULL);
} }
/* If a context switch occurred while processing the interrupt then /* If a context switch occurred while processing the interrupt then
@ -110,6 +112,11 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
regs = tcb->xcp.regs; regs = tcb->xcp.regs;
#endif #endif
/* Clear current regs */
up_set_current_regs(NULL);
board_autoled_off(LED_INIRQ); board_autoled_off(LED_INIRQ);
return regs; return regs;
} }

22
arch/arm/src/armv8-m/arm_doirq.c
View File

@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
arm_ack_irq(irq); arm_ack_irq(irq);
/* Set current regs for crash dump */
up_set_current_regs(regs);
if (irq == NVIC_IRQ_PENDSV) if (irq == NVIC_IRQ_PENDSV)
{ {
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* Dispatch the PendSV interrupt */
irq_dispatch(irq, regs);
#endif
up_irq_save(); up_irq_save();
g_running_tasks[this_cpu()]->xcp.regs = regs; g_running_tasks[this_cpu()]->xcp.regs = regs;
} }
else else
{ {
/* Set current regs for crash dump */
up_set_current_regs(regs);
/* Dispatch irq */ /* Dispatch irq */
tcb->xcp.regs = regs; tcb->xcp.regs = regs;
irq_dispatch(irq, regs); irq_dispatch(irq, regs);
/* Clear current regs */
up_set_current_regs(NULL);
} }
/* If a context switch occurred while processing the interrupt then /* If a context switch occurred while processing the interrupt then
@ -110,6 +112,10 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
regs = tcb->xcp.regs; regs = tcb->xcp.regs;
#endif #endif
/* Clear current regs */
up_set_current_regs(NULL);
board_autoled_off(LED_INIRQ); board_autoled_off(LED_INIRQ);
#ifdef CONFIG_ARMV8M_TRUSTZONE_HYBRID #ifdef CONFIG_ARMV8M_TRUSTZONE_HYBRID

2
arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c
View File

@ -137,9 +137,11 @@ static int lpc17_40_nmi(int irq, void *context, void *arg)
static int lpc17_40_pendsv(int irq, void *context, void *arg) static int lpc17_40_pendsv(int irq, void *context, void *arg)
{ {
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
up_irq_save(); up_irq_save();
_err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
#endif
return 0; return 0;
} }

2
arch/arm/src/mps/mps_irq.c
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@ -61,9 +61,11 @@ static int mps_nmi(int irq, void *context, void *arg)
static int mps_pendsv(int irq, void *context, void *arg) static int mps_pendsv(int irq, void *context, void *arg)
{ {
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
up_irq_save(); up_irq_save();
_err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
#endif
return 0; return 0;
} }

2
arch/arm/src/nrf52/nrf52_irq.c
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@ -143,9 +143,11 @@ static int nrf52_nmi(int irq, void *context, void *arg)
static int nrf52_pendsv(int irq, void *context, void *arg) static int nrf52_pendsv(int irq, void *context, void *arg)
{ {
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
up_irq_save(); up_irq_save();
_err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
#endif
return 0; return 0;
} }

2
arch/arm/src/stm32/stm32_irq.c
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@ -148,9 +148,11 @@ static int stm32_nmi(int irq, void *context, void *arg)
static int stm32_pendsv(int irq, void *context, void *arg) static int stm32_pendsv(int irq, void *context, void *arg)
{ {
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
up_irq_save(); up_irq_save();
_err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
#endif
return 0; return 0;
} }

2
arch/arm/src/stm32l4/stm32l4_irq.c
View File

@ -145,9 +145,11 @@ static int stm32l4_nmi(int irq, void *context, void *arg)
static int stm32l4_pendsv(int irq, void *context, void *arg) static int stm32l4_pendsv(int irq, void *context, void *arg)
{ {
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
up_irq_save(); up_irq_save();
_err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
#endif
return 0; return 0;
} }