SAMA5D4-EK: These configurations now use the fixed DRAM mapping for manipulating the page memory pool.
This commit is contained in:
Gregory Nutt
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df4682fd1f
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9a5640b542
119
arch/arm/src/armv7-a/pginline.h
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119
arch/arm/src/armv7-a/pginline.h
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/****************************************************************************
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* arch/arm/src/armv7/pginline.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_ARMV7_A_PGINLINE_H
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#define __ARCH_ARM_SRC_ARMV7_A_PGINLINE_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/addrenv.h>
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#include "mmu.h"
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#if defined(CONFIG_MM_PGALLOC) && defined(CONFIG_ARCH_USE_MMU)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_pgmap
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*
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* Description:
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* Map one page to a temporary, scratch virtual memory address
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*
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****************************************************************************/
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#ifndef CONFIG_ARCH_PGPOOL_MAPPING
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static inline uintptr_t arm_tmpmap(uintptr_t paddr, FAR uint32_t *l1save)
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{
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*l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
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return ((uintptr_t)ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
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}
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#endif
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/****************************************************************************
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* Name: arm_pgrestore
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*
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* Description:
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* Restore any previous L1 page table mapping that was in place when
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* arm_tmpmap() was called
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*
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****************************************************************************/
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#ifndef CONFIG_ARCH_PGPOOL_MAPPING
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static inline void arm_tmprestore(uint32_t l1save)
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{
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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}
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#endif
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/****************************************************************************
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* Name: arm_pgvaddr
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*
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* Description:
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* If the page memory pool is staticly mapped, then we do not have to
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* go through the the temporary mapping. We simply have to perform a
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* physical to virtual memory address mapping.
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*
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****************************************************************************/
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#ifdef CONFIG_ARCH_PGPOOL_MAPPING
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static inline uintptr_t arm_pgvaddr(uintptr_t paddr)
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{
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DEBUGASSERT(paddr >= CONFIG_ARCH_PGPOOL_PBASE &&
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paddr < CONFIG_ARCH_PGPOOL_PEND);
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return paddr - CONFIG_ARCH_PGPOOL_PBASE + CONFIG_ARCH_PGPOOL_VBASE;
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}
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#endif
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#endif /* CONFIG_MM_PGALLOC && CONFIG_ARCH_USE_MMU */
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#endif /* __ARCH_ARM_SRC_ARMV7_A_PGINLINE_H */
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@ -271,6 +271,10 @@ CONFIG_ARCH_TEXT_NPAGES=256
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CONFIG_ARCH_DATA_NPAGES=256
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CONFIG_ARCH_HEAP_NPAGES=256
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CONFIG_ARCH_STACK_NPAGES=256
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CONFIG_ARCH_PGPOOL_MAPPING=y
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CONFIG_ARCH_PGPOOL_PBASE=0x28000000
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CONFIG_ARCH_PGPOOL_VBASE=0x28000000
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CONFIG_ARCH_PGPOOL_SIZE=134217728
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# CONFIG_PAGING is not set
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# CONFIG_ARCH_IRQPRIO is not set
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CONFIG_ARCH_STACKDUMP=y
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@ -334,6 +338,7 @@ CONFIG_SAMA5D4_MB_REVC=y
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# CONFIG_SAMA5D4EK_396MHZ is not set
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CONFIG_SAMA5D4EK_528MHZ=y
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CONFIG_SAMA5D4EK_DRAM_BOOT=y
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# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set
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# CONFIG_SAMA5D4EK_SLOWCLOCK is not set
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#
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@ -363,6 +368,8 @@ CONFIG_PREALLOC_TIMERS=4
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#
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# Tasks and Scheduling
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#
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CONFIG_INIT_ENTRYPOINT=y
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# CONFIG_INIT_FILEPATH is not set
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CONFIG_USER_ENTRYPOINT="elf_main"
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CONFIG_RR_INTERVAL=200
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CONFIG_TASK_NAME_SIZE=32
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@ -241,10 +241,6 @@ CONFIG_SAMA5_HSMCI0_XDMAC0=y
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#
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# External Memory Configuration
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#
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# CONFIG_SAMA5_EBICS0 is not set
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# CONFIG_SAMA5_EBICS1 is not set
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# CONFIG_SAMA5_EBICS2 is not set
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# CONFIG_SAMA5_EBICS3 is not set
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# CONFIG_SAMA5_HAVE_NAND is not set
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# CONFIG_SAMA5_HAVE_PMECC is not set
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# CONFIG_SAMA5_BOOT_ISRAM is not set
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@ -286,6 +282,10 @@ CONFIG_ARCH_TEXT_NPAGES=256
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CONFIG_ARCH_DATA_NPAGES=256
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CONFIG_ARCH_HEAP_NPAGES=256
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CONFIG_ARCH_STACK_NPAGES=256
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CONFIG_ARCH_PGPOOL_MAPPING=y
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CONFIG_ARCH_PGPOOL_PBASE=0x28000000
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CONFIG_ARCH_PGPOOL_VBASE=0x28000000
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CONFIG_ARCH_PGPOOL_SIZE=134217728
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# CONFIG_PAGING is not set
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# CONFIG_ARCH_IRQPRIO is not set
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CONFIG_ARCH_STACKDUMP=y
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@ -355,6 +355,7 @@ CONFIG_SAMA5D4EK_HSMCI0_MOUNT=y
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CONFIG_SAMA5D4EK_HSMCI0_MOUNT_FSTYPE="vfat"
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CONFIG_SAMA5D4EK_HSMCI0_MOUNT_BLKDEV="/dev/mmcsd0"
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CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT="/bin"
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# CONFIG_SAMA5D4EK_ROMFS_MOUNT is not set
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# CONFIG_SAMA5D4EK_SLOWCLOCK is not set
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#
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@ -949,7 +950,6 @@ CONFIG_NSH_CONSOLE=y
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#
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# I2C tool
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#
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# CONFIG_SYSTEM_I2CTOOL is not set
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#
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# INI File Parser
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@ -266,6 +266,10 @@ CONFIG_ARCH_TEXT_NPAGES=256
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CONFIG_ARCH_DATA_NPAGES=256
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CONFIG_ARCH_HEAP_NPAGES=256
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CONFIG_ARCH_STACK_NPAGES=256
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CONFIG_ARCH_PGPOOL_MAPPING=y
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CONFIG_ARCH_PGPOOL_PBASE=0x28000000
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CONFIG_ARCH_PGPOOL_VBASE=0x28000000
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CONFIG_ARCH_PGPOOL_SIZE=134217728
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# CONFIG_PAGING is not set
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# CONFIG_ARCH_IRQPRIO is not set
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CONFIG_ARCH_STACKDUMP=y
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