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Beginnings of STM32 F4 OTG FS device driver

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4551 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-04-02 22:20:39 +00:00
parent 15555429ff
commit 9b0d4940d4
3 changed files with 15 additions and 7 deletions
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12
arch/arm/src/stm32/Make.defs
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@ -65,8 +65,16 @@ CHIP_ASRCS =
CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c \
stm32_gpio.c stm32_exti.c stm32_flash.c stm32_irq.c \
stm32_timerisr.c stm32_dma.c stm32_lowputc.c stm32_serial.c \
stm32_spi.c stm32_usbdev.c stm32_sdio.c stm32_tim.c stm32_i2c.c \
stm32_waste.c
stm32_spi.c stm32_sdio.c stm32_tim.c stm32_i2c.c stm32_waste.c
ifeq ($(CONFIG_USBDEV),y)
ifeq ($(CONFIG_STM32_USB),y)
CMN_CSRCS += stm32_usbdev.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CMN_CSRCS += stm32_otgfsdev.c
endif
endif
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CHIP_ASRCS += stm32_vectors.S

2
arch/arm/src/stm32/chip/stm32_usbotgfs.h
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@ -86,7 +86,7 @@
#define STM32_OTGFS_HCCHAR_OFFSET 0x0000 /* Host channel characteristics register */
#define STM32_OTGFS_HCINT_OFFSET 0x0008 /* Host channel interrupt register */
#define STM32_OTGFS_HCINTMSK_OFFSET 0x000c /* Host channel interrupt mask register */
#define STM32_OTGFS_HCTSIZ0_OFFSET 0x0010 /* Host channel interrupt register */
#define STM32_OTGFS_HCTSIZ_OFFSET 0x0010 /* Host channel interrupt register */
#define STM32_OTGFS_HCCHAR_OFFSET(n) (0x500 + ((n) << 5))
#define STM32_OTGFS_HCCHAR0_OFFSET 0x0500 /* Host channel-0 characteristics register */

8
arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
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@ -367,12 +367,12 @@
/* OTG FS/HS */
#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTGFS_ID (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTGFS_ID (GPIO_ALT|GPIO_PULLUP|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTGFS_SCL (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN8)
#define GPIO_OTGFS_SDA (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN9)
#define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTGHS_DM (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN14)
#define GPIO_OTGHS_DP (GPIO_ALT|GPIO_AF12|GPIO_PORTC|GPIO_PIN15)