STM32 OTG HS: A little research reveals that only the F2 RCC initialization set the OTGHSULPIEN bit and Photon is the only F2 board configuration that uses OTG . Therefore, we can simplify the conditional logic of the last PR. Negative logic was used (#ifndef BOARD_DISABLE_USBOTG_HSULPI) to prevent bad settings in other configurations. But give these facts, the preferred positive logic now makes more sense (#ifdef BOARD_ENABLE_USBOTG_HSULPI).
This commit is contained in:
parent
e0f7b9582a
commit
9b11187b2a
@ -193,9 +193,7 @@ static inline void rcc_enableahb1(void)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_OTGHS
|
||||
/* USB OTG HS */
|
||||
|
||||
#ifndef BOARD_DISABLE_USBOTG_HSULPI
|
||||
#ifdef BOARD_ENABLE_USBOTG_HSULPI
|
||||
/* Enable clocking for USB OTG HS and external PHY */
|
||||
|
||||
regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
|
||||
|
@ -215,7 +215,7 @@ static inline void rcc_enableahb1(void)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_OTGHS
|
||||
#if 0 /* ifndef BOARD_DISABLE_USBOTG_HSULPI */
|
||||
#ifdef BOARD_ENABLE_USBOTG_HSULPI
|
||||
/* Enable clocking for USB OTG HS and external PHY */
|
||||
|
||||
regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
|
||||
|
@ -225,7 +225,7 @@ static inline void rcc_enableahb1(void)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F7_OTGHS
|
||||
#if 0 /* ifndef BOARD_DISABLE_USBOTG_HSULPI */
|
||||
#ifdef BOARD_ENABLE_USBOTG_HSULPI
|
||||
/* Enable clocking for USB OTG HS and external PHY */
|
||||
|
||||
regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
|
||||
|
@ -221,7 +221,7 @@ static inline void rcc_enableahb1(void)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32F7_OTGHS
|
||||
#if 0 /* ifndef BOARD_DISABLE_USBOTG_HSULPI */
|
||||
#ifdef BOARD_ENABLE_USBOTG_HSULPI
|
||||
/* Enable clocking for USB OTG HS and external PHY */
|
||||
|
||||
regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
|
||||
|
@ -149,7 +149,7 @@
|
||||
/* USB OTG HS definitions ***********************************************************/
|
||||
/* Do not enable external PHY clock or OTG_HS module will not work */
|
||||
|
||||
#define BOARD_DISABLE_USBOTG_HSULPI 1
|
||||
#undef BOARD_ENABLE_USBOTG_HSULPI
|
||||
|
||||
/* LED definitions ******************************************************************/
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user