arm/src/lpc54xx/: Bring in the USB FS OHCI driver from LPC17. This is a quick'n'dirty port that I will finish sometime later (I hope). Currently, it is missing hardware clocking setup and is not even hooked into the build system yet. Needless to say it does not yet even compile.
This commit is contained in:
Gregory Nutt
parent
82cb456e02
commit
9b13eaf595
@ -150,7 +150,7 @@
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# error "Insufficent TDs"
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#endif
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/* Derived size of user trasnfer descriptor (TD) memory. */
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/* Derived size of user transfer descriptor (TD) memory. */
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#define LPC17_TDFREE_SIZE (CONFIG_LP17_USBHOST_NTDS * LPC17_TD_SIZE)
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@ -401,6 +401,12 @@ config LPC54_EMC
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bool "External Memory Controller (EMC)"
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default n
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config LPC54_OHCI
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bool "USB0 OHCI"
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select USBHOST
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select USBHOST_HAVE_ASYNCH
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default n
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config LPC54_ETHERNET
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bool "Ethernet"
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default n
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@ -686,6 +692,65 @@ config LPC54_SPI_WIDEDATA
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endmenu # SPI Master configuration
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menu "USB0 OHCI Options"
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depends on LPC54_OHCI
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config LPC54_OHCI_NEDS
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int "Number of Endpoint Descriptors"
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default 2
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---help---
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Number of endpoint descriptors. Default: 2
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config LPC54_OHCI_NTDS
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int "Number of transfer descriptors"
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default 3
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---help---
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Number of transfer descriptors. Default: 3
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config LPC54_OHCI_TDBUFFERS
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int "Number of descriptor buffers"
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default 2
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---help---
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Number of transfer descriptor buffers. Default: 2
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config LPC54_OHCI_TDBUFSIZE
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int "Descriptor buffer size"
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default 128
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---help---
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Size of one transfer descriptor buffer. Default 128
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config LPC54_OHCI_IOBUFSIZE
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int "I/O buffer size"
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default 512
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---help---
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Size of one end-user I/O buffer.
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config LPC54_OHCI_NIOBUFFERS
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int "Number of I/O buffer"
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default 8 if USBHOST_HUB
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default 4 if !USBHOST_HUB
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---help---
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Size of one end-user I/O buffer.
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config LPC54_OHCI_NPREALLOC
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int "Max concurrent transfers"
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default 8 if USBHOST_HUB
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default 4 if !USBHOST_HUB
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---help---
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This number represents a number of pre-allocated structures to support
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concurrent data transfers. This number limits that number of concurrent
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asynchronous IN endpoint transfer that can be supported.
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config LPC54_OHCI_REGDEBUG
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bool "Register level debug"
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depends on DEBUG_USB_INFO
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default n
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---help---
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Output detailed register-level USB host debug information. Requires
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also CONFIG_DEBUG_USB_INFO.
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endmenu
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menu "Ethernet configuration"
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depends on LPC54_ETHERNET
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129
arch/arm/src/lpc54xx/chip/lpc54_usb0_ohci.h
Normal file
129
arch/arm/src/lpc54xx/chip/lpc54_usb0_ohci.h
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@ -0,0 +1,129 @@
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/************************************************************************************
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* arch/arm/src/lpc54xx/chip/lpc54_usb0_ohci.h
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_USB0_OHCI_H
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#define __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_USB0_OHCI_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/usb/ohci.h>
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#include "chip.h"
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#include "chip/lpc54_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Register offsets *****************************************************************/
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/* USB Host Controller (OHCI). See include/nuttx/usb/ohci.h */
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/* Additional, non-standard register offsets */
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#define LPC54_OHCI_PORTMODE_OFFSET 0x005c /* Port mode register */
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/* Register addresses ***************************************************************/
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/* USB Host Controller (OHCI) */
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/* Control and status registers (section 7.1) */
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#define LPC54_OHCI_HCIREV (LPC54_FSUSBHOST_BASE + OHCI_HCIREV_OFFSET)
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#define LPC54_OHCI_CTRL (LPC54_FSUSBHOST_BASE + OHCI_CTRL_OFFSET)
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#define LPC54_OHCI_CMDST (LPC54_FSUSBHOST_BASE + OHCI_CMDST_OFFSET)
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#define LPC54_OHCI_INTST (LPC54_FSUSBHOST_BASE + OHCI_INTST_OFFSET)
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#define LPC54_OHCI_INTEN (LPC54_FSUSBHOST_BASE + OHCI_INTEN_OFFSET)
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#define LPC54_OHCI_INTDIS (LPC54_FSUSBHOST_BASE + OHCI_INTDIS_OFFSET)
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/* Memory pointers (section 7.2) */
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#define LPC54_OHCI_HCCA (LPC54_FSUSBHOST_BASE + OHCI_HCCA_OFFSET)
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#define LPC54_OHCI_PERED (LPC54_FSUSBHOST_BASE + OHCI_PERED_OFFSET)
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#define LPC54_OHCI_CTRLHEADED (LPC54_FSUSBHOST_BASE + OHCI_CTRLHEADED_OFFSET)
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#define LPC54_OHCI_CTRLED (LPC54_FSUSBHOST_BASE + OHCI_CTRLED_OFFSET)
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#define LPC54_OHCI_BULKHEADED (LPC54_FSUSBHOST_BASE + OHCI_BULKHEADED_OFFSET)
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#define LPC54_OHCI_BULKED (LPC54_FSUSBHOST_BASE + OHCI_BULKED_OFFSET)
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#define LPC54_OHCI_DONEHEAD (LPC54_FSUSBHOST_BASE + OHCI_DONEHEAD_OFFSET)
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/* Frame counters (section 7.3) */
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#define LPC54_OHCI_FMINT (LPC54_FSUSBHOST_BASE + OHCI_FMINT_OFFSET)
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#define LPC54_OHCI_FMREM (LPC54_FSUSBHOST_BASE + OHCI_FMREM_OFFSET)
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#define LPC54_OHCI_FMNO (LPC54_FSUSBHOST_BASE + OHCI_FMNO_OFFSET)
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#define LPC54_OHCI_PERSTART (LPC54_FSUSBHOST_BASE + OHCI_PERSTART_OFFSET)
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/* Root hub ports (section 7.4) */
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#define LPC54_OHCI_LSTHRES (LPC54_FSUSBHOST_BASE + OHCI_LSTHRES_OFFSET)
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#define LPC54_OHCI_RHDESCA (LPC54_FSUSBHOST_BASE + OHCI_RHDESCA_OFFSET)
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#define LPC54_OHCI_RHDESCB (LPC54_FSUSBHOST_BASE + OHCI_RHDESCB_OFFSET)
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#define LPC54_OHCI_RHSTATUS (LPC54_FSUSBHOST_BASE + OHCI_RHSTATUS_OFFSET)
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#define LPC54_OHCI_RHPORTST1 (LPC54_FSUSBHOST_BASE + OHCI_RHPORTST1_OFFSET)
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#define LPC54_OHCI_RHPORTST2 (LPC54_FSUSBHOST_BASE + OHCI_RHPORTST2_OFFSET)
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/* Non-standard Registers */
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#define LPC54_OHCI_PORTMODE (LPC54_FSUSBHOST_BASE + LPC54_OHCI_PORTMODE_OFFSET)
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/* Register bit definitions *********************************************************/
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/* USB Host Controller (OHCI). See include/nuttx/usb/ohci.h */
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/* Port mode register */
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#define OHCI_PORTMODE_ID (1 << 0) /* Bit 0: Port ID pin value */
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/* Bits 1-7: Reserved */
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#define OHCI_PORTMODE_IDEN (1 << 8) /* Bit 8: Port ID pull-up enable */
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/* Bits 9-15: Reserved */
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#define OHCI_PORTMODE_DEVENABLE (1 << 16) /* Bit 16: Device mode enable */
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/* Bits 17-31: Reserved */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_USB0_OHCI_H */
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3995
arch/arm/src/lpc54xx/lpc54_usb0_ohci.c
Normal file
3995
arch/arm/src/lpc54xx/lpc54_usb0_ohci.c
Normal file
File diff suppressed because it is too large
Load Diff
108
arch/arm/src/lpc54xx/lpc54_usb0_ohci.h
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108
arch/arm/src/lpc54xx/lpc54_usb0_ohci.h
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@ -0,0 +1,108 @@
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/************************************************************************************
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* arch/arm/src/lpc17xx/lpc17_usbhost.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC17XX_LPC17_USBHOST_H
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#define __ARCH_ARM_SRC_LPC17XX_LPC17_USBHOST_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/************************************************************************************
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* Public Types
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: lpc17_usbhost_initialize
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*
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* Description:
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* Initialize USB host device controller hardware.
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*
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* Input Parameters:
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* controller -- If the device supports more than USB host controller, then
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* this identifies which controller is being initializeed. Normally, this
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* is just zero.
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*
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* Returned Value:
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* And instance of the USB host interface. The controlling task should
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* use this interface to (1) call the wait() method to wait for a device
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* to be connected, and (2) call the enumerate() method to bind the device
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* to a class driver.
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*
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* Assumptions:
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* - This function should called in the initialization sequence in order
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* to initialize the USB device functionality.
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* - Class drivers should be initialized prior to calling this function.
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* Otherwise, there is a race condition if the device is already connected.
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*
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****************************************************************************/
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#ifdef CONFIG_USBHOST
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struct usbhost_connection_s;
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FAR struct usbhost_connection_s *lpc17_usbhost_initialize(int controller);
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_LPC17XX_LPC17_USBHOST_H */
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@ -23,6 +23,8 @@ CONFIG_FS_PROCFS=y
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CONFIG_FT5X06_POLLMODE=y
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CONFIG_FT5X06_SINGLEPOINT=y
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CONFIG_FT5X06_SWAPXY=y
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CONFIG_FT5X06_THRESHX=8
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CONFIG_FT5X06_THRESHY=8
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CONFIG_GRAPHICS_TWM4NX=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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