diff --git a/arch/arm64/src/common/arm64_cpupause.c b/arch/arm64/src/common/arm64_cpupause.c
index b8e85eed29..1692521bef 100644
--- a/arch/arm64/src/common/arm64_cpupause.c
+++ b/arch/arm64/src/common/arm64_cpupause.c
@@ -272,7 +272,7 @@ int up_cpu_pause(int cpu)
 
   /* Execute SGI2 */
 
-  ret = arm64_gic_raise_sgi(SGI_CPU_PAUSE, (1 << cpu));
+  ret = arm64_gic_raise_sgi(GIC_IRQ_SGI2, (1 << cpu));
   if (ret < 0)
     {
       /* What happened?  Unlock the g_cpu_wait spinlock */
diff --git a/arch/arm64/src/common/arm64_cpustart.c b/arch/arm64/src/common/arm64_cpustart.c
index 2492ee3612..4b7273cd69 100644
--- a/arch/arm64/src/common/arm64_cpustart.c
+++ b/arch/arm64/src/common/arm64_cpustart.c
@@ -258,8 +258,6 @@ void arm64_boot_secondary_c_routine(void)
 
   up_perf_init(NULL);
 
-  up_enable_irq(SGI_CPU_PAUSE);
-
   func  = cpu_boot_params.func;
   arg   = cpu_boot_params.arg;
   ARM64_DSB();
@@ -277,10 +275,3 @@ void arm64_boot_secondary_c_routine(void)
   func(arg);
 }
 
-int arm64_smp_sgi_init(void)
-{
-  irq_attach(SGI_CPU_PAUSE, arm64_pause_handler, 0);
-  up_enable_irq(SGI_CPU_PAUSE);
-
-  return 0;
-}
diff --git a/arch/arm64/src/common/arm64_doirq.c b/arch/arm64/src/common/arm64_doirq.c
index 949c49591f..d0ab7e011a 100644
--- a/arch/arm64/src/common/arm64_doirq.c
+++ b/arch/arm64/src/common/arm64_doirq.c
@@ -128,10 +128,6 @@ void up_irqinitialize(void)
 
   arm64_gic_initialize();   /* Initialization common to all CPUs */
 
-#ifdef CONFIG_SMP
-  arm64_smp_sgi_init();
-#endif
-
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
 
   /* And finally, enable interrupts */
diff --git a/arch/arm64/src/common/arm64_gic.h b/arch/arm64/src/common/arm64_gic.h
index 241e8392ab..374a2d54c5 100644
--- a/arch/arm64/src/common/arm64_gic.h
+++ b/arch/arm64/src/common/arm64_gic.h
@@ -311,8 +311,6 @@ int arm64_gic_raise_sgi(unsigned int sgi_id, uint16_t target_list);
 
 #ifdef CONFIG_SMP
 
-#define SGI_CPU_PAUSE             GIC_IRQ_SGI0
-
 /****************************************************************************
  * Name: arm64_pause_handler
  *
@@ -337,8 +335,6 @@ int arm64_pause_handler(int irq, void *context, void *arg);
 
 void arm64_gic_secondary_init(void);
 
-int arm64_smp_sgi_init(void);
-
 #endif
 
 #endif /* __ARCH_ARM64_SRC_COMMON_ARM64_GIC_H */
diff --git a/arch/arm64/src/common/arm64_gicv2.c b/arch/arm64/src/common/arm64_gicv2.c
index 7816350581..8a41a4fb79 100644
--- a/arch/arm64/src/common/arm64_gicv2.c
+++ b/arch/arm64/src/common/arm64_gicv2.c
@@ -819,8 +819,7 @@ static void arm_gic0_initialize(void)
 #ifdef CONFIG_SMP
   /* Attach SGI interrupt handlers. This attaches the handler to all CPUs. */
 
-  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI1, arm_start_handler, NULL));
-  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm_pause_handler, NULL));
+  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm64_pause_handler, NULL));
 #endif
 }
 
diff --git a/arch/arm64/src/common/arm64_gicv3.c b/arch/arm64/src/common/arm64_gicv3.c
index 4f8e06ed10..20ddd5edaf 100644
--- a/arch/arm64/src/common/arm64_gicv3.c
+++ b/arch/arm64/src/common/arm64_gicv3.c
@@ -554,6 +554,12 @@ static void gicv3_dist_init(void)
   putreg32(BIT(GICD_CTRL_ARE_NS) | BIT(GICD_CTLR_ENABLE_G1NS),
            GICD_CTLR);
 #endif
+
+#ifdef CONFIG_SMP
+  /* Attach SGI interrupt handlers. This attaches the handler to all CPUs. */
+
+  DEBUGVERIFY(irq_attach(GIC_IRQ_SGI2, arm64_pause_handler, NULL));
+#endif
 }
 
 void up_enable_irq(int irq)
@@ -790,6 +796,10 @@ static void arm64_gic_init(void)
   gicv3_rdist_enable(gic_get_rdist());
 
   gicv3_cpuif_init();
+
+#ifdef CONFIG_SMP
+  up_enable_irq(GIC_IRQ_SGI2);
+#endif
 }
 
 int arm64_gic_initialize(void)